169 lines
4.6 KiB
C
169 lines
4.6 KiB
C
/* $NetBSD: lock.h,v 1.28 2007/02/17 19:30:33 ad Exp $ */
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/*-
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* Copyright (c) 1998, 1999, 2006 The NetBSD Foundation, Inc.
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* All rights reserved.
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*
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* This code is derived from software contributed to The NetBSD Foundation
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* by Paul Kranenburg and Andrew Doran.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by the NetBSD
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* Foundation, Inc. and its contributors.
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* 4. Neither the name of The NetBSD Foundation nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef _MACHINE_LOCK_H
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#define _MACHINE_LOCK_H
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/*
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* Machine dependent spin lock operations.
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*/
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#if __SIMPLELOCK_UNLOCKED != 0
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#error __SIMPLELOCK_UNLOCKED must be 0 for this implementation
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#endif
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/* XXX So we can expose this to userland. */
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#ifdef __lint__
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#define __ldstub(__addr) (__addr)
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#else /* !__lint__ */
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static __inline int __ldstub(__cpu_simple_lock_t *addr);
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static __inline int __ldstub(__cpu_simple_lock_t *addr)
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{
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int v;
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__asm volatile("ldstub [%1],%0"
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: "=&r" (v)
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: "r" (addr)
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: "memory");
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return v;
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}
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#endif /* __lint__ */
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static __inline void __cpu_simple_lock_init(__cpu_simple_lock_t *)
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__attribute__((__unused__));
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static __inline int __cpu_simple_lock_try(__cpu_simple_lock_t *)
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__attribute__((__unused__));
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static __inline void __cpu_simple_unlock(__cpu_simple_lock_t *)
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__attribute__((__unused__));
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#ifndef __CPU_SIMPLE_LOCK_NOINLINE
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static __inline void __cpu_simple_lock(__cpu_simple_lock_t *)
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__attribute__((__unused__));
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#else
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extern void __cpu_simple_lock(__cpu_simple_lock_t *);
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#endif
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static __inline void
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__cpu_simple_lock_init(__cpu_simple_lock_t *alp)
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{
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*alp = __SIMPLELOCK_UNLOCKED;
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}
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#ifndef __CPU_SIMPLE_LOCK_NOINLINE
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static __inline void
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__cpu_simple_lock(__cpu_simple_lock_t *alp)
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{
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/*
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* If someone else holds the lock use simple reads until it
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* is released, then retry the atomic operation. This reduces
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* memory bus contention because the cache-coherency logic
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* does not have to broadcast invalidates on the lock while
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* we spin on it.
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*/
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while (__ldstub(alp) != __SIMPLELOCK_UNLOCKED) {
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while (*alp != __SIMPLELOCK_UNLOCKED)
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/* spin */ ;
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}
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}
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#endif /* __CPU_SIMPLE_LOCK_NOINLINE */
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static __inline int
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__cpu_simple_lock_try(__cpu_simple_lock_t *alp)
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{
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return (__ldstub(alp) == __SIMPLELOCK_UNLOCKED);
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}
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static __inline void
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__cpu_simple_unlock(__cpu_simple_lock_t *alp)
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{
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/*
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* Insert compiler barrier to prevent instruction re-ordering
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* around the lock release.
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*/
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__insn_barrier();
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*alp = __SIMPLELOCK_UNLOCKED;
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}
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#if defined(__sparc_v9__)
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static __inline void
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mb_read(void)
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{
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__asm __volatile("membar #LoadLoad" : : : "memory");
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}
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static __inline void
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mb_write(void)
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{
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__asm __volatile("" : : : "memory");
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}
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static __inline void
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mb_memory(void)
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{
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__asm __volatile("membar #MemIssue" : : : "memory");
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}
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#else /* __sparc_v9__ */
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static __inline void
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mb_read(void)
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{
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static volatile int junk;
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__asm volatile("st %%g0,[%0]"
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:
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: "r" (&junk)
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: "memory");
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}
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static __inline void
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mb_write(void)
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{
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__insn_barrier();
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}
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static __inline void
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mb_memory(void)
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{
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mb_read();
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}
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#endif /* __sparc_v9__ */
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#endif /* _MACHINE_LOCK_H */
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