594 lines
14 KiB
C
594 lines
14 KiB
C
/* $NetBSD: yeeloong_machdep.c,v 1.5 2013/02/28 13:22:36 macallan Exp $ */
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/* $OpenBSD: yeeloong_machdep.c,v 1.16 2011/04/15 20:40:06 deraadt Exp $ */
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/*
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* Copyright (c) 2009, 2010 Miodrag Vallat.
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*
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* Permission to use, copy, modify, and distribute this software for any
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* purpose with or without fee is hereby granted, provided that the above
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* copyright notice and this permission notice appear in all copies.
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*
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* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
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* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
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* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
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* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
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* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
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* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
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*/
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/*
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* Lemote {Fu,Lyn,Yee}loong specific code and configuration data.
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* (this file really ought to be named lemote_machdep.c by now)
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: yeeloong_machdep.c,v 1.5 2013/02/28 13:22:36 macallan Exp $");
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/device.h>
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#include <sys/types.h>
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#include <evbmips/loongson/autoconf.h>
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#include <mips/pmon/pmon.h>
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#include <evbmips/loongson/loongson_intr.h>
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#include <evbmips/loongson/loongson_bus_defs.h>
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#include <evbmips/loongson/loongson_isa.h>
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#include <dev/isa/isareg.h>
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#include <dev/isa/isavar.h>
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#include <dev/ic/i8259reg.h>
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#include <dev/pci/pcireg.h>
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#include <dev/pci/pcivar.h>
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#include <dev/pci/pcidevs.h>
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#include <mips/bonito/bonitoreg.h>
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#include <mips/bonito/bonitovar.h>
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#include <evbmips/loongson/dev/kb3310var.h>
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#include <evbmips/loongson/dev/glxreg.h>
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#include <evbmips/loongson/dev/glxvar.h>
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#include "com.h"
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#include "isa.h"
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#include "ykbec.h"
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#if NCOM > 0
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#include <sys/termios.h>
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#include <dev/ic/comvar.h>
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#endif
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#ifdef LOW_DEBUG
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#define DPRINTF(x) printf x
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#else
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#define DPRINTF(x)
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#endif
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void lemote_device_register(device_t, void *);
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void lemote_reset(void);
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void fuloong_powerdown(void);
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void fuloong_setup(void);
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void yeeloong_powerdown(void);
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void lemote_pci_attach_hook(device_t, device_t,
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struct pcibus_attach_args *);
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int lemote_intr_map(int, int, int, pci_intr_handle_t *);
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void lemote_isa_attach_hook(device_t, device_t,
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struct isabus_attach_args *);
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void *lemote_isa_intr_establish(void *, int, int, int,
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int (*)(void *), void *);
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void lemote_isa_intr_disestablish(void *, void *);
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const struct evcnt * lemote_isa_intr_evcnt(void *, int);
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const char * lemote_isa_intr_string(void *, int);
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uint lemote_get_isa_imr(void);
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uint lemote_get_isa_isr(void);
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void lemote_isa_intr(int, vaddr_t, uint32_t);
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const struct bonito_config lemote_bonito = {
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.bc_adbase = 11,
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.bc_gpioIE = LOONGSON_INTRMASK_GPIO,
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.bc_intEdge = LOONGSON_INTRMASK_PCI_SYSERR |
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LOONGSON_INTRMASK_PCI_PARERR,
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.bc_intSteer = 0,
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.bc_intPol = LOONGSON_INTRMASK_DRAM_PARERR |
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LOONGSON_INTRMASK_PCI_SYSERR | LOONGSON_INTRMASK_PCI_PARERR |
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LOONGSON_INTRMASK_INT0 | LOONGSON_INTRMASK_INT1,
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.bc_attach_hook = lemote_pci_attach_hook,
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};
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const struct legacy_io_range fuloong_legacy_ranges[] = {
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/* isa */
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{ IO_DMAPG + 4, IO_DMAPG + 4 },
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/* mcclock */
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{ IO_RTC, IO_RTC + 1 },
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/* pciide */
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{ 0x170, 0x170 + 7 },
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{ 0x1f0, 0x1f0 + 7 },
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{ 0x376, 0x376 },
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{ 0x3f6, 0x3f6 },
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/* com */
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{ IO_COM1, IO_COM1 + 8 }, /* IR port */
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{ IO_COM2, IO_COM2 + 8 }, /* serial port */
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{ 0 }
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};
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const struct legacy_io_range lynloong_legacy_ranges[] = {
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/* isa */
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{ IO_DMAPG + 4, IO_DMAPG + 4 },
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/* mcclock */
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{ IO_RTC, IO_RTC + 1 },
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/* pciide */
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{ 0x170, 0x170 + 7 },
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{ 0x1f0, 0x1f0 + 7 },
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{ 0x376, 0x376 },
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{ 0x3f6, 0x3f6 },
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#if 0 /* no external connector */
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/* com */
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{ IO_COM2, IO_COM2 + 8 },
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#endif
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{ 0 }
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};
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const struct legacy_io_range yeeloong_legacy_ranges[] = {
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/* isa */
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{ IO_DMAPG + 4, IO_DMAPG + 4 },
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/* pckbc */
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{ IO_KBD, IO_KBD },
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{ IO_KBD + 4, IO_KBD + 4 },
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/* mcclock */
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{ IO_RTC, IO_RTC + 1 },
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/* pciide */
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{ 0x170, 0x170 + 7 },
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{ 0x1f0, 0x1f0 + 7 },
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{ 0x376, 0x376 },
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{ 0x3f6, 0x3f6 },
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/* kb3110b embedded controller */
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{ 0x381, 0x383 },
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{ 0 }
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};
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struct mips_isa_chipset lemote_isa_chipset = {
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.ic_v = NULL,
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.ic_attach_hook = lemote_isa_attach_hook,
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.ic_intr_establish = lemote_isa_intr_establish,
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.ic_intr_disestablish = lemote_isa_intr_disestablish,
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.ic_intr_evcnt = lemote_isa_intr_evcnt,
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.ic_intr_string = lemote_isa_intr_string,
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};
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const struct platform fuloong_platform = {
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.system_type = LOONGSON_FULOONG,
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.vendor = "Lemote",
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.product = "Fuloong",
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.bonito_config = &lemote_bonito,
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.isa_chipset = &lemote_isa_chipset,
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.legacy_io_ranges = fuloong_legacy_ranges,
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.bonito_mips_intr = MIPS_INT_MASK_4,
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.isa_mips_intr = MIPS_INT_MASK_0,
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.isa_intr = lemote_isa_intr,
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.p_pci_intr_map = lemote_intr_map,
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.irq_map =loongson2f_irqmap,
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.setup = fuloong_setup,
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.device_register = lemote_device_register,
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.powerdown = fuloong_powerdown,
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.reset = lemote_reset
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};
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const struct platform lynloong_platform = {
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.system_type = LOONGSON_LYNLOONG,
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.vendor = "Lemote",
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.product = "Lynloong",
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.bonito_config = &lemote_bonito,
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.isa_chipset = &lemote_isa_chipset,
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.legacy_io_ranges = lynloong_legacy_ranges,
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.bonito_mips_intr = MIPS_INT_MASK_4,
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.isa_mips_intr = MIPS_INT_MASK_0,
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.isa_intr = lemote_isa_intr,
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.p_pci_intr_map = lemote_intr_map,
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.irq_map =loongson2f_irqmap,
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.setup = fuloong_setup,
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.device_register = lemote_device_register,
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.powerdown = fuloong_powerdown,
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.reset = lemote_reset
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};
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const struct platform yeeloong_platform = {
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.system_type = LOONGSON_YEELOONG,
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.vendor = "Lemote",
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.product = "Yeeloong",
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.bonito_config = &lemote_bonito,
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.isa_chipset = &lemote_isa_chipset,
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.legacy_io_ranges = yeeloong_legacy_ranges,
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.bonito_mips_intr = MIPS_INT_MASK_4,
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.isa_mips_intr = MIPS_INT_MASK_0,
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.isa_intr = lemote_isa_intr,
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.p_pci_intr_map = lemote_intr_map,
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.irq_map =loongson2f_irqmap,
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.setup = NULL,
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.device_register = lemote_device_register,
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.powerdown = yeeloong_powerdown,
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.reset = lemote_reset,
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#if NYKBEC > 0
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.suspend = ykbec_suspend,
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.resume = ykbec_resume
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#endif
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};
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#if NISA > 0
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static int stray_intr[BONITO_NISA];
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#endif
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/*
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* PCI model specific routines
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*/
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void
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lemote_pci_attach_hook(device_t parent, device_t self,
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struct pcibus_attach_args *pba)
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{
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pci_chipset_tag_t pc = pba->pba_pc;
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pcitag_t tag;
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pcireg_t id;
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int dev, i;
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if (pba->pba_bus != 0)
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return;
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/*
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* Check for an AMD CS5536 chip; if one is found, register
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* the proper PCI configuration space hooks.
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*/
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for (dev = pci_bus_maxdevs(pc, 0); dev >= 0; dev--) {
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tag = pci_make_tag(pc, 0, dev, 0);
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id = pci_conf_read(pc, tag, PCI_ID_REG);
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DPRINTF(("lemote_pci_attach_hook id 0x%x\n", id));
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if (id == PCI_ID_CODE(PCI_VENDOR_AMD,
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PCI_PRODUCT_AMD_CS5536_PCISB)) {
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glx_init(pc, tag, dev);
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break;
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}
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}
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wrmsr(GCSC_PIC_SHDW, 0);
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DPRINTF(("PMON setup picregs:"));
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for (i = 0; i < 12; i++) {
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if (i == 6)
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DPRINTF((" | "));
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DPRINTF((" 0x%x", (uint32_t)(rdmsr(GCSC_PIC_SHDW) & 0xff)));
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}
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DPRINTF(("\n"));
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DPRINTF(("intsel 0x%x 0x%x\n", REGVAL8(BONITO_PCIIO_BASE + 0x4d0),
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REGVAL8(BONITO_PCIIO_BASE + 0x4d1)));
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/* setup legacy interrupt controller */
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REGVAL8(BONITO_PCIIO_BASE + IO_ICU1 + PIC_OCW1) = 0xff;
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REGVAL8(BONITO_PCIIO_BASE + IO_ICU1 + PIC_ICW1) =
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ICW1_SELECT | ICW1_IC4;
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REGVAL8(BONITO_PCIIO_BASE + IO_ICU1 + PIC_ICW2) = ICW2_VECTOR(0);
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REGVAL8(BONITO_PCIIO_BASE + IO_ICU1 + PIC_ICW3) = ICW3_CASCADE(2);
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REGVAL8(BONITO_PCIIO_BASE + IO_ICU1 + PIC_ICW4) = ICW4_8086;
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delay(100);
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/* mask all interrupts */
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REGVAL8(BONITO_PCIIO_BASE + IO_ICU1 + PIC_OCW1) = 0xff;
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/* read ISR by default. */
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REGVAL8(BONITO_PCIIO_BASE + IO_ICU1 + PIC_OCW3) = OCW3_SELECT | OCW3_RR;
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(void)REGVAL8(BONITO_PCIIO_BASE + IO_ICU1 + PIC_OCW3);
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/* reset; program device, four bytes */
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REGVAL8(BONITO_PCIIO_BASE + IO_ICU2 + PIC_OCW1) = 0xff;
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REGVAL8(BONITO_PCIIO_BASE + IO_ICU2 + PIC_ICW1) =
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ICW1_SELECT | ICW1_IC4;
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REGVAL8(BONITO_PCIIO_BASE + IO_ICU2 + PIC_ICW2) = ICW2_VECTOR(8);
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REGVAL8(BONITO_PCIIO_BASE + IO_ICU2 + PIC_ICW3) = ICW3_SIC(2);
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REGVAL8(BONITO_PCIIO_BASE + IO_ICU2 + PIC_ICW4) = ICW4_8086;
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delay(100);
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/* leave interrupts masked */
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REGVAL8(BONITO_PCIIO_BASE + IO_ICU2 + PIC_OCW1) = 0xff;
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/* read ISR by default. */
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REGVAL8(BONITO_PCIIO_BASE + IO_ICU2 + PIC_OCW3) = OCW3_SELECT | OCW3_RR;
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(void)REGVAL8(BONITO_PCIIO_BASE + IO_ICU2 + PIC_OCW3);
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}
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int
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lemote_intr_map(int dev, int fn, int pin, pci_intr_handle_t *ihp)
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{
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switch (dev) {
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/* onboard devices, only pin A is wired */
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case 6:
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case 7:
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case 8:
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case 9:
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if (pin == PCI_INTERRUPT_PIN_A) {
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*ihp = BONITO_DIRECT_IRQ(LOONGSON_INTR_PCIA +
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(dev - 6));
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return (0);
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}
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break;
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/* PCI slot */
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case 10:
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*ihp = BONITO_DIRECT_IRQ(LOONGSON_INTR_PCIA +
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(pin - PCI_INTERRUPT_PIN_A));
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return (0);
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/* Geode chip */
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case 14:
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switch (fn) {
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case 1: /* Flash */
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*ihp = BONITO_ISA_IRQ(6);
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return (0);
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case 3: /* AC97 */
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*ihp = BONITO_ISA_IRQ(9);
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return (0);
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case 4: /* OHCI */
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case 5: /* EHCI */
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*ihp = BONITO_ISA_IRQ(11);
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return (0);
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}
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break;
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default:
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break;
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}
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return (1);
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}
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/*
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* ISA model specific routines
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*/
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#if NISA > 0
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void
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lemote_isa_attach_hook(device_t parent, device_t self,
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struct isabus_attach_args *iba)
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{
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loongson_set_isa_imr(loongson_isaimr);
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}
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void *
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lemote_isa_intr_establish(void *v, int irq, int type, int level,
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int (*handler)(void *), void *arg)
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{
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void *ih;
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uint imr;
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ih = evbmips_intr_establish(BONITO_ISA_IRQ(irq), handler, arg);
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if (ih == NULL)
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return (NULL);
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/* enable interrupt */
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imr = lemote_get_isa_imr();
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imr |= (1 << irq);
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DPRINTF(("lemote_isa_intr_establish: enable irq %d 0x%x\n", irq, imr));
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loongson_set_isa_imr(imr);
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return (ih);
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}
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void
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lemote_isa_intr_disestablish(void *v, void *ih)
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{
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evbmips_intr_disestablish(ih);
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}
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const struct evcnt *
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lemote_isa_intr_evcnt(void *v, int irq)
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{
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if (irq == 0 || irq >= BONITO_NISA || irq == 2)
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panic("lemote_isa_intr_evcnt: bogus isa irq 0x%x", irq);
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return (&bonito_intrhead[BONITO_ISA_IRQ(irq)].intr_count);
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}
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const char *
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lemote_isa_intr_string(void *v, int irq)
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{
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if (irq == 0 || irq >= BONITO_NISA || irq == 2)
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panic("lemote_isa_intr_string: bogus isa irq 0x%x", irq);
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return loongson_intr_string(&lemote_bonito, BONITO_ISA_IRQ(irq));
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}
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#endif
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/*
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* Legacy (ISA) interrupt handling
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*/
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/*
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* Process legacy interrupts.
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*
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* XXX On 2F, ISA interrupts only occur on LOONGSON_INTR_INT0, but since
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* XXX the other LOONGSON_INTR_INT# are unmaskable, bad things will happen
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* XXX if they ever are triggered...
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*/
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void
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lemote_isa_intr(int ipl, vaddr_t pc, uint32_t ipending)
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{
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#if NISA > 0
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struct evbmips_intrhand *ih;
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uint32_t isr, imr, mask;
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int bitno;
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int rc;
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imr = lemote_get_isa_imr();
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isr = lemote_get_isa_isr() & imr;
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if (isr == 0)
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return;
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/*
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* Now process allowed interrupts.
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*/
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/* Service higher level interrupts first */
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for (bitno = BONITO_NISA - 1, mask = 1UL << bitno;
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mask != 0;
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bitno--, mask >>= 1) {
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if ((isr & mask) == 0)
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continue;
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loongson_isa_specific_eoi(bitno);
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rc = 0;
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LIST_FOREACH(ih,
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&bonito_intrhead[BONITO_ISA_IRQ(bitno)].intrhand_head,
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ih_q) {
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if ((*ih->ih_func)(ih->ih_arg) != 0) {
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rc = 1;
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bonito_intrhead[BONITO_ISA_IRQ(bitno)].intr_count.ev_count++;
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}
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}
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if (rc == 0) {
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if (stray_intr[bitno]++ & 0x10000) {
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printf("spurious isa interrupt %d\n", bitno);
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stray_intr[bitno] = 0;
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}
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}
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if ((isr ^= mask) == 0)
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break;
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}
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/*
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* Reenable interrupts which have been serviced.
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*/
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loongson_set_isa_imr(imr);
|
|
#endif
|
|
}
|
|
|
|
uint
|
|
lemote_get_isa_imr(void)
|
|
{
|
|
uint imr1, imr2;
|
|
|
|
imr1 = 0xff & ~REGVAL8(BONITO_PCIIO_BASE + IO_ICU1 + PIC_OCW1);
|
|
imr1 &= ~(1 << 2); /* hide cascade */
|
|
imr2 = 0xff & ~REGVAL8(BONITO_PCIIO_BASE + IO_ICU2 + PIC_OCW1);
|
|
|
|
return ((imr2 << 8) | imr1);
|
|
}
|
|
|
|
uint
|
|
lemote_get_isa_isr(void)
|
|
{
|
|
uint isr1, isr2;
|
|
|
|
isr1 = REGVAL8(BONITO_PCIIO_BASE + IO_ICU1);
|
|
isr1 &= ~(1 << 2);
|
|
isr2 = REGVAL8(BONITO_PCIIO_BASE + IO_ICU2);
|
|
|
|
return ((isr2 << 8) | isr1);
|
|
}
|
|
|
|
/*
|
|
* Other model specific routines
|
|
*/
|
|
|
|
void
|
|
fuloong_powerdown(void)
|
|
{
|
|
vaddr_t gpiobase;
|
|
|
|
gpiobase = BONITO_PCIIO_BASE + (rdmsr(GCSC_DIVIL_LBAR_GPIO) & 0xff00);
|
|
/* enable GPIO 13 */
|
|
REGVAL(gpiobase + GCSC_GPIOL_OUT_EN) = GCSC_GPIO_ATOMIC_VALUE(13, 1);
|
|
/* set GPIO13 value to zero */
|
|
REGVAL(gpiobase + GCSC_GPIOL_OUT_VAL) = GCSC_GPIO_ATOMIC_VALUE(13, 0);
|
|
}
|
|
|
|
void
|
|
yeeloong_powerdown(void)
|
|
{
|
|
|
|
REGVAL(BONITO_GPIODATA) &= ~0x00000001;
|
|
REGVAL(BONITO_GPIOIE) &= ~0x00000001;
|
|
}
|
|
|
|
void
|
|
lemote_reset(void)
|
|
{
|
|
|
|
wrmsr(GCSC_GLCP_SYS_RST, rdmsr(GCSC_GLCP_SYS_RST) | 1);
|
|
}
|
|
|
|
void
|
|
fuloong_setup(void)
|
|
{
|
|
#if NCOM > 0
|
|
const char *envvar;
|
|
int serial;
|
|
|
|
envvar = pmon_getenv("nokbd");
|
|
serial = envvar != NULL;
|
|
envvar = pmon_getenv("novga");
|
|
serial = serial && envvar != NULL;
|
|
|
|
//serial = 1; /* XXXXXX */
|
|
if (serial) {
|
|
comconsiot = &bonito_iot;
|
|
comconsaddr = 0x2f8;
|
|
comconsrate = 115200; /* default PMON console speed */
|
|
}
|
|
#endif
|
|
}
|
|
|
|
void
|
|
lemote_device_register(device_t dev, void *aux)
|
|
{
|
|
const char *name = device_xname(dev);
|
|
|
|
if (device_class(dev) != bootdev_class)
|
|
return;
|
|
|
|
/*
|
|
* The device numbering must match. There's no way
|
|
* pmon tells us more info. Depending on the usb slot
|
|
* and hubs used you may be lucky. Also, assume umass/sd for usb
|
|
* attached devices.
|
|
*/
|
|
switch (bootdev_class) {
|
|
case DV_DISK:
|
|
if (device_is_a(dev, "wd") && strcmp(name, bootdev) == 0) {
|
|
if (booted_device == NULL)
|
|
booted_device = dev;
|
|
} else {
|
|
/* XXX this really only works safely for usb0... */
|
|
if ((device_is_a(dev, "sd") ||
|
|
device_is_a(dev, "cd") == 0) &&
|
|
strncmp(bootdev, "usb", 3) == 0 &&
|
|
strcmp(name + 2, bootdev + 3) == 0) {
|
|
if (booted_device == NULL)
|
|
booted_device = dev;
|
|
}
|
|
}
|
|
break;
|
|
case DV_IFNET:
|
|
/*
|
|
* This relies on the onboard Ethernet interface being
|
|
* attached before any other (usb) interface.
|
|
*/
|
|
if (booted_device == NULL)
|
|
booted_device = dev;
|
|
break;
|
|
default:
|
|
break;
|
|
}
|
|
}
|