ccb3b2f232
and the existing evbmips/gdium support. This has been tested on a lemote fuloong device (boots multiuser), should also support other lemote devices (maybe with minor adjustments, or adding missing drivers). There is some gdium support here too, but it may not be yet complete (someone with a gdium would need to have a look, hi macallan@ :) loongson kernels are 64bits only: the loongson2f has ressources located above the 2Gb physical address, and it's much easier to access it using XKPHYS than trying to make it fit in the limited 32bit kernel virtual space.
91 lines
2.7 KiB
C
91 lines
2.7 KiB
C
/* $OpenBSD: isa_machdep.c,v 1.1 2010/05/08 21:59:56 miod Exp $ */
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/*
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* Copyright (c) 2009, 2010 Miodrag Vallat.
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*
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* Permission to use, copy, modify, and distribute this software for any
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* purpose with or without fee is hereby granted, provided that the above
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* copyright notice and this permission notice appear in all copies.
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*
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* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
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* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
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* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
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* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
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* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
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* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
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*/
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/*
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* Legacy device support.
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*/
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/device.h>
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#include <evbmips/loongson/autoconf.h>
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#include <machine/intr.h>
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#include <dev/ic/i8259reg.h>
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#include <dev/pci/pcivar.h>
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#include <dev/isa/isareg.h>
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#include <dev/isa/isavar.h>
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#include <mips/bonito/bonitoreg.h>
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#include <mips/bonito/bonitovar.h>
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#include <evbmips/loongson/loongson_isa.h>
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uint loongson_isaimr;
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void
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loongson_set_isa_imr(uint newimr)
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{
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uint imr1, imr2;
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imr1 = 0xff & ~newimr;
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imr1 &= ~(1 << 2); /* enable cascade */
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imr2 = 0xff & ~(newimr >> 8);
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/*
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* For some reason, trying to write the same value to the PIC
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* registers causes an immediate system freeze (at least on the
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* 2F and CS5536 based Lemote Yeeloong), so we only do this if
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* the value changes.
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* Note that interrupts have been disabled by the caller.
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*/
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//if ((newimr ^ loongson_isaimr) & 0xff00)
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REGVAL8(BONITO_PCIIO_BASE + IO_ICU2 + 1) = imr2;
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//if ((newimr ^ loongson_isaimr) & 0x00ff)
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REGVAL8(BONITO_PCIIO_BASE + IO_ICU1 + 1) = imr1;
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__asm__ __volatile__ ("sync" ::: "memory");
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loongson_isaimr = newimr;
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}
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void
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loongson_isa_specific_eoi(int bit)
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{
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KASSERT((bit < 16) && (bit >= 0));
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loongson_isaimr &= ~(1 << bit);
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if (bit & 8) {
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(void)REGVAL8(BONITO_PCIIO_BASE + IO_ICU2 + 1);
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REGVAL8(BONITO_PCIIO_BASE + IO_ICU2 + 1) =
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(0xff & ~(loongson_isaimr >> 8));
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__asm__ __volatile__ ("sync" ::: "memory");
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REGVAL8(BONITO_PCIIO_BASE + IO_ICU2 + PIC_OCW2) =
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OCW2_SELECT | OCW2_EOI | OCW2_SL | OCW2_ILS(bit & 7);
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bit = 2;
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__asm__ __volatile__ ("sync" ::: "memory");
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}
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(void)REGVAL8(BONITO_PCIIO_BASE + IO_ICU1 + 1);
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REGVAL8(BONITO_PCIIO_BASE + IO_ICU1 + 1) =
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(0xff & ~(loongson_isaimr));
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__asm__ __volatile__ ("sync" ::: "memory");
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REGVAL8(BONITO_PCIIO_BASE + IO_ICU1 + PIC_OCW2) =
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OCW2_SELECT | OCW2_EOI | OCW2_SL | OCW2_ILS(bit);
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__asm__ __volatile__ ("sync" ::: "memory");
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}
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