336 lines
11 KiB
C
336 lines
11 KiB
C
/* $NetBSD: tx3912videoreg.h,v 1.2 2000/01/07 15:10:50 uch Exp $ */
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/*
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* Copyright (c) 1999, by UCHIYAMA Yasushi
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. The name of the developer may NOT be used to endorse or promote products
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* derived from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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*/
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/*
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* TOSHIBA TMPR3912/05, Philips PR31700 Video module register
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*/
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#define TX3912_VIDEOCTRL1_REG 0x28
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#define TX3912_VIDEOCTRL2_REG 0x2c
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#define TX3912_VIDEOCTRL3_REG 0x30
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#define TX3912_VIDEOCTRL4_REG 0x34
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#define TX3912_VIDEOCTRL5_REG 0x38
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#define TX3912_VIDEOCTRL6_REG 0x3c
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#define TX3912_VIDEOCTRL7_REG 0x40
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#define TX3912_VIDEOCTRL8_REG 0x44
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#define TX3912_VIDEOCTRL9_REG 0x48
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#define TX3912_VIDEOCTRL10_REG 0x4c
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#define TX3912_VIDEOCTRL11_REG 0x50
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#define TX3912_VIDEOCTRL12_REG 0x54
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#define TX3912_VIDEOCTRL13_REG 0x58
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#define TX3912_VIDEOCTRL14_REG 0x5c
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#define TX3912_FRAMEBUFFER_ALIGNMENT 16
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#define TX3912_FRAMEBUFFER_BOUNDARY 0x100000
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#define TX3912_FRAMEBUFFER_MAX (2048 * 1024 * 8)
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/*
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* Video Control 1 Register
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*/
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/* R */
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#define TX3912_VIDEOCTRL1_LINECNT_SHIFT 22
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#define TX3912_VIDEOCTRL1_LINECNT_MASK 0x3ff
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#define TX3912_VIDEOCTRL1_LINECNT(cr) \
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(((cr) >> TX3912_VIDEOCTRL1_LINECNT_SHIFT) & \
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TX3912_VIDEOCTRL1_LINECNT_MASK)
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/* R/W */
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#define TX3912_VIDEOCTRL1_LOADDLY 0x00200000
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/* R/W */
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/*
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* CP Rate = 36.864MHz / (BAUDVAL * 2 + 2)
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*/
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#define TX3912_VIDEOCTRL1_BAUDVAL_SHIFT 16
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#define TX3912_VIDEOCTRL1_BAUDVAL_MASK 0x1f
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#define TX3912_VIDEOCTRL1_BAUDVAL(cr) \
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(((cr) >> TX3912_VIDEOCTRL1_BAUDVAL_SHIFT) & \
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TX3912_VIDEOCTRL1_BAUDVAL_MASK)
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#define TX3912_VIDEOCTRL1_BAUDVAL_SET(cr, val) \
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((cr) | (((val) << TX3912_VIDEOCTRL1_BAUDVAL_SHIFT) & \
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(TX3912_VIDEOCTRL1_BAUDVAL_MASK << TX3912_VIDEOCTRL1_BAUDVAL_SHIFT)))
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/* R/W */
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#define TX3912_VIDEOCTRL1_VIDDONEVAL_SHIFT 9
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#define TX3912_VIDEOCTRL1_VIDDONEVAL_MASK 0x7f
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#define TX3912_VIDEOCTRL1_VIDDONEVAL(cr) \
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(((cr) >> TX3912_VIDEOCTRL1_VIDDONEVAL_SHIFT) & \
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TX3912_VIDEOCTRL1_VIDDONEVAL_MASK)
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#define TX3912_VIDEOCTRL1_VIDDONEVAL_SET(cr, val) \
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((cr) | (((val) << TX3912_VIDEOCTRL1_VIDDONEVAL_SHIFT) & \
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(TX3912_VIDEOCTRL1_VIDDONEVAL_MASK << TX3912_VIDEOCTRL1_VIDDONEVAL_SHIFT)))
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/* R/W */
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#define TX3912_VIDEOCTRL1_ENFREEZEFRAME 0x00000100
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/* R/W */
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#define TX3912_VIDEOCTRL1_BITSEL_SHIFT 6
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#define TX3912_VIDEOCTRL1_BITSEL_MASK 0x3
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#define TX3912_VIDEOCTRL1_BITSEL(cr) \
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(((cr) >> TX3912_VIDEOCTRL1_BITSEL_SHIFT) & \
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TX3912_VIDEOCTRL1_BITSEL_MASK)
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#define TX3912_VIDEOCTRL1_BITSEL_CLR(cr) \
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((cr) &= ~(TX3912_VIDEOCTRL1_BITSEL_MASK << \
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TX3912_VIDEOCTRL1_BITSEL_SHIFT))
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#define TX3912_VIDEOCTRL1_BITSEL_SET(cr, val) \
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((cr) | (((val) << TX3912_VIDEOCTRL1_BITSEL_SHIFT) & \
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(TX3912_VIDEOCTRL1_BITSEL_MASK << TX3912_VIDEOCTRL1_BITSEL_SHIFT)))
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#define TX3912_VIDEOCTRL1_BITSEL_8BITCOLOR 0x3
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#define TX3912_VIDEOCTRL1_BITSEL_4BITGREYSCALE 0x2
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#define TX3912_VIDEOCTRL1_BITSEL_2BITGREYSCALE 0x1
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#define TX3912_VIDEOCTRL1_BITSEL_MONOCHROME 0x0
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/* R/W */
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#define TX3912_VIDEOCTRL1_DISPSPLIT 0x00000020
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#define TX3912_VIDEOCTRL1_DISP8 0x00000010
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#define TX3912_VIDEOCTRL1_DFMODE 0x00000008
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#define TX3912_VIDEOCTRL1_INVVID 0x00000004
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#define TX3912_VIDEOCTRL1_DISPON 0x00000002
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#define TX3912_VIDEOCTRL1_ENVID 0x00000001
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/*
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* Video Control 2 Register
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*/
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/* W */
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#define TX3912_VIDEOCTRL2_VIDRATE_SHIFT 22
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#define TX3912_VIDEOCTRL2_VIDRATE_MASK 0x3ff
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#define TX3912_VIDEOCTRL2_VIDRATE(cr) \
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(((cr) >> TX3912_VIDEOCTRL2_VIDRATE_SHIFT) & \
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TX3912_VIDEOCTRL2_VIDRATE_MASK)
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#define TX3912_VIDEOCTRL2_VIDRATE_SET(cr, val) \
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((cr) | (((val) << TX3912_VIDEOCTRL2_VIDRATE_SHIFT) & \
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(TX3912_VIDEOCTRL2_VIDRATE_MASK << TX3912_VIDEOCTRL2_VIDRATE_SHIFT)))
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/* W */
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/*
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* HORZVAL = (HorzSize4 - 1) for 4bit split or non-split LCD
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* HORZVAL = (HorzSize8 - 1) for 8bit non-split LCD
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*/
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#define TX3912_VIDEOCTRL2_HORZVAL_SHIFT 12
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#define TX3912_VIDEOCTRL2_HORZVAL_MASK 0x1ff
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#define TX3912_VIDEOCTRL2_HORZVAL(cr) \
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(((cr) >> TX3912_VIDEOCTRL2_HORZVAL_SHIFT) & \
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TX3912_VIDEOCTRL2_HORZVAL_MASK)
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#define TX3912_VIDEOCTRL2_HORZVAL_SET(cr, val) \
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((cr) | (((val) << TX3912_VIDEOCTRL2_HORZVAL_SHIFT) & \
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(TX3912_VIDEOCTRL2_HORZVAL_MASK << TX3912_VIDEOCTRL2_HORZVAL_SHIFT)))
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/* W */
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/*
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* LINEVAL = (# of Lines - 1) for a non-split LCD
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* LINEVAL = (# of Lins2 - 1) for a split LCD
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*/
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#define TX3912_VIDEOCTRL2_LINEVAL_SHIFT 0
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#define TX3912_VIDEOCTRL2_LINEVAL_MASK 0x3ff
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#define TX3912_VIDEOCTRL2_LINEVAL(cr) \
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(((cr) >> TX3912_VIDEOCTRL2_LINEVAL_SHIFT) & \
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TX3912_VIDEOCTRL2_LINEVAL_MASK)
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#define TX3912_VIDEOCTRL2_LINEVAL_SET(cr, val) \
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((cr) | (((val) << TX3912_VIDEOCTRL2_LINEVAL_SHIFT) & \
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(TX3912_VIDEOCTRL2_LINEVAL_MASK << TX3912_VIDEOCTRL2_LINEVAL_SHIFT)))
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/*
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* Video Control 3 Register
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*/
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/* W */
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#define TX3912_VIDEOCTRL3_VIDBANK_SHIFT 20
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#define TX3912_VIDEOCTRL3_VIDBANK_MASK 0xfff
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#define TX3912_VIDEOCTRL3_VIDBANK(cr) \
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(((cr) >> TX3912_VIDEOCTRL3_VIDBANK_SHIFT) & \
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TX3912_VIDEOCTRL3_VIDBANK_MASK)
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#define TX3912_VIDEOCTRL3_VIDBANK_SET(cr, val) \
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((cr) | (((val) << TX3912_VIDEOCTRL3_VIDBANK_SHIFT) & \
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(TX3912_VIDEOCTRL3_VIDBANK_MASK << TX3912_VIDEOCTRL3_VIDBANK_SHIFT)))
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/* W */
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#define TX3912_VIDEOCTRL3_VIDBASEHI_SHIFT 4
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#define TX3912_VIDEOCTRL3_VIDBASEHI_MASK 0xffff
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#define TX3912_VIDEOCTRL3_VIDBASEHI(cr) \
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(((cr) >> TX3912_VIDEOCTRL3_VIDBASEHI_SHIFT) & \
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TX3912_VIDEOCTRL3_VIDBASEHI_MASK)
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#define TX3912_VIDEOCTRL3_VIDBASEHI_SET(cr, val) \
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((cr) | (((val) << TX3912_VIDEOCTRL3_VIDBASEHI_SHIFT) & \
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(TX3912_VIDEOCTRL3_VIDBASEHI_MASK << TX3912_VIDEOCTRL3_VIDBASEHI_SHIFT)))
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/*
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* Video Control 4 Register
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*/
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/* W */
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/*
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* DF Rate = LineRate / (DFVAL + 1)
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*/
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#define TX3912_VIDEOCTRL4_DFVAL_SHIFT 24
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#define TX3912_VIDEOCTRL4_DFVAL_MASK 0xff
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#define TX3912_VIDEOCTRL4_DFVAL(cr) \
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(((cr) >> TX3912_VIDEOCTRL4_DFVAL_SHIFT) & \
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TX3912_VIDEOCTRL4_DFVAL_MASK)
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#define TX3912_VIDEOCTRL4_DFVAL_SET(cr, val) \
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((cr) | (((val) << TX3912_VIDEOCTRL4_DFVAL_SHIFT) & \
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(TX3912_VIDEOCTRL4_DFVAL_MASK << TX3912_VIDEOCTRL4_DFVAL_SHIFT)))
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#define TX3912_VIDEOCTRL4_FRAMEMASKVAL_SHIFT 20
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#define TX3912_VIDEOCTRL4_FRAMEMASKVAL_MASK 0xf
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#define TX3912_VIDEOCTRL4_FRAMEMASKVAL(cr) \
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(((cr) >> TX3912_VIDEOCTRL4_FRAMEMASKVAL_SHIFT) & \
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TX3912_VIDEOCTRL4_FRAMEMASKVAL_MASK)
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#define TX3912_VIDEOCTRL4_FRAMEMASKVAL_SET(cr, val) \
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((cr) | (((val) << TX3912_VIDEOCTRL4_FRAMEMASKVAL_SHIFT) & \
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(TX3912_VIDEOCTRL4_FRAMEMASKVAL_MASK << TX3912_VIDEOCTRL4_FRAMEMASKVAL_SHIFT)))
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#define TX3912_VIDEOCTRL4_VIDBASELO_SHIFT 4
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#define TX3912_VIDEOCTRL4_VIDBASELO_MASK 0xffff
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#define TX3912_VIDEOCTRL4_VIDBASELO(cr) \
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(((cr) >> TX3912_VIDEOCTRL4_VIDBASELO_SHIFT) & \
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TX3912_VIDEOCTRL4_VIDBASELO_MASK)
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#define TX3912_VIDEOCTRL4_VIDBASELO_SET(cr, val) \
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((cr) | (((val) << TX3912_VIDEOCTRL4_VIDBASELO_SHIFT) & \
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(TX3912_VIDEOCTRL4_VIDBASELO_MASK << TX3912_VIDEOCTRL4_VIDBASELO_SHIFT)))
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/*
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* Video Control 5 Register
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*/
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/* W */
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/*
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* TX3912_VIDEOCTRL5_REDSEL (31:0)
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*/
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/*
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* Video Control 6 Register
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*/
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/* W */
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/*
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* TX3912_VIDEOCTRL6_GREENSEL (31:0)
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*/
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/*
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* Video Control 7 Register
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*/
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/* W */
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/*
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* TX3912_VIDEOCTRL6_BLUESEL (31:0)
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*/
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/*
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* Video Control 8 Register
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*/
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/* W */
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/*
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* 2_3 means `2 out of 3'
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*/
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#define TX3912_VIDEOCTRL8_PAT2_3_SHIFT 0
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#define TX3912_VIDEOCTRL8_PAT2_3_MASK 0xfff
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#define TX3912_VIDEOCTRL8_PAT2_3(cr) \
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(((cr) >> TX3912_VIDEOCTRL8_PAT2_3_SHIFT) & \
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TX3912_VIDEOCTRL8_PAT2_3_MASK)
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#define TX3912_VIDEOCTRL8_PAT2_3_SET(cr, val) \
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((cr) | (((val) << TX3912_VIDEOCTRL8_PAT2_3_SHIFT) & \
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(TX3912_VIDEOCTRL8_PAT2_3_MASK << TX3912_VIDEOCTRL8_PAT2_3_SHIFT)))
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/*
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* Video Control 9 Register
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*/
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/* W */
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#define TX3912_VIDEOCTRL9_PAT3_4_SHIFT 16
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#define TX3912_VIDEOCTRL9_PAT3_4_MASK 0xffff
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#define TX3912_VIDEOCTRL9_PAT3_4(cr) \
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(((cr) >> TX3912_VIDEOCTRL9_PAT3_4_SHIFT) & \
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TX3912_VIDEOCTRL9_PAT3_4_MASK)
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#define TX3912_VIDEOCTRL9_PAT3_4_SET(cr, val) \
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((cr) | (((val) << TX3912_VIDEOCTRL9_PAT3_4_SHIFT) & \
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(TX3912_VIDEOCTRL9_PAT3_4_MASK << TX3912_VIDEOCTRL9_PAT3_4_SHIFT)))
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/* W */
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#define TX3912_VIDEOCTRL9_PAT2_4_SHIFT 0
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#define TX3912_VIDEOCTRL9_PAT2_4_MASK 0xffff
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#define TX3912_VIDEOCTRL9_PAT2_4(cr) \
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(((cr) >> TX3912_VIDEOCTRL9_PAT2_4_SHIFT) & \
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TX3912_VIDEOCTRL9_PAT2_4_MASK)
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#define TX3912_VIDEOCTRL9_PAT2_4_SET(cr, val) \
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((cr) | (((val) << TX3912_VIDEOCTRL9_PAT2_4_SHIFT) & \
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(TX3912_VIDEOCTRL9_PAT2_4_MASK << TX3912_VIDEOCTRL9_PAT2_4_SHIFT)))
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/*
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* Video Control 10 Register
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*/
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/* W */
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#define TX3912_VIDEOCTRL10_PAT4_5_SHIFT 0
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#define TX3912_VIDEOCTRL10_PAT4_5_MASK 0xfffff
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#define TX3912_VIDEOCTRL10_PAT4_5(cr) \
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(((cr) >> TX3912_VIDEOCTRL10_PAT4_5_SHIFT) & \
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TX3912_VIDEOCTRL10_PAT4_5_MASK)
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#define TX3912_VIDEOCTRL10_PAT4_5_SET(cr, val) \
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((cr) | (((val) << TX3912_VIDEOCTRL10_PAT4_5_SHIFT) & \
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(TX3912_VIDEOCTRL10_PAT4_5_MASK << TX3912_VIDEOCTRL10_PAT4_5_SHIFT)))
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/*
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* Video Control 11 Register
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*/
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/* W */
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#define TX3912_VIDEOCTRL11_PAT3_5_SHIFT 0
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#define TX3912_VIDEOCTRL11_PAT3_5_MASK 0xfffff
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#define TX3912_VIDEOCTRL11_PAT3_5(cr) \
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(((cr) >> TX3912_VIDEOCTRL11_PAT3_5_SHIFT) & \
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TX3912_VIDEOCTRL11_PAT3_5_MASK)
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#define TX3912_VIDEOCTRL11_PAT3_5_SET(cr, val) \
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((cr) | (((val) << TX3912_VIDEOCTRL11_PAT3_5_SHIFT) & \
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(TX3912_VIDEOCTRL11_PAT3_5_MASK << TX3912_VIDEOCTRL11_PAT3_5_SHIFT)))
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/*
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* Video Control 12 Register
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*/
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/* W */
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#define TX3912_VIDEOCTRL12_PAT6_7_SHIFT 0
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#define TX3912_VIDEOCTRL12_PAT6_7_MASK 0xfffffff
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#define TX3912_VIDEOCTRL12_PAT6_7(cr) \
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(((cr) >> TX3912_VIDEOCTRL12_PAT6_7_SHIFT) & \
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TX3912_VIDEOCTRL12_PAT6_7_MASK)
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#define TX3912_VIDEOCTRL12_PAT6_7_SET(cr, val) \
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((cr) | (((val) << TX3912_VIDEOCTRL12_PAT6_7_SHIFT) & \
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(TX3912_VIDEOCTRL12_PAT6_7_MASK << TX3912_VIDEOCTRL12_PAT6_7_SHIFT)))
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/*
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* Video Control 13 Register
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*/
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/* W */
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#define TX3912_VIDEOCTRL13_PAT5_7_SHIFT 0
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#define TX3912_VIDEOCTRL13_PAT5_7_MASK 0xfffffff
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#define TX3912_VIDEOCTRL13_PAT5_7(cr) \
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(((cr) >> TX3912_VIDEOCTRL13_PAT5_7_SHIFT) & \
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TX3912_VIDEOCTRL13_PAT5_7_MASK)
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#define TX3912_VIDEOCTRL13_PAT5_7_SET(cr, val) \
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((cr) | (((val) << TX3912_VIDEOCTRL13_PAT5_7_SHIFT) & \
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(TX3912_VIDEOCTRL13_PAT5_7_MASK << TX3912_VIDEOCTRL13_PAT5_7_SHIFT)))
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/*
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* Video Control 14 Register
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*/
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/* W */
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#define TX3912_VIDEOCTRL14_PAT4_7_SHIFT 0
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#define TX3912_VIDEOCTRL14_PAT4_7_MASK 0xfffffff
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#define TX3912_VIDEOCTRL14_PAT4_7(cr) \
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(((cr) >> TX3912_VIDEOCTRL14_PAT4_7_SHIFT) & \
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TX3912_VIDEOCTRL14_PAT4_7_MASK)
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#define TX3912_VIDEOCTRL14_PAT4_7_SET(cr, val) \
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((cr) | (((val) << TX3912_VIDEOCTRL14_PAT4_7_SHIFT) & \
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(TX3912_VIDEOCTRL14_PAT4_7_MASK << TX3912_VIDEOCTRL14_PAT4_7_SHIFT)))
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