637 lines
16 KiB
C
637 lines
16 KiB
C
/* $NetBSD: tc_bus_mem.c,v 1.19 1999/03/12 22:59:23 perry Exp $ */
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/*
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* Copyright (c) 1996 Carnegie-Mellon University.
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* All rights reserved.
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*
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* Author: Chris G. Demetriou
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*
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* Permission to use, copy, modify and distribute this software and
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* its documentation is hereby granted, provided that both the copyright
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* notice and this permission notice appear in all copies of the
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* software, derivative works or modified versions, and any portions
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* thereof, and that both notices appear in supporting documentation.
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*
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* CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
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* CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND
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* FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
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*
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* Carnegie Mellon requests users of this software to return to
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*
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* Software Distribution Coordinator or Software.Distribution@CS.CMU.EDU
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* School of Computer Science
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* Carnegie Mellon University
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* Pittsburgh PA 15213-3890
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*
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* any improvements or extensions that they make and grant Carnegie the
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* rights to redistribute these changes.
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*/
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/*
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* Common TurboChannel Chipset "bus memory" functions.
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*/
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#include <sys/cdefs.h> /* RCS ID & Copyright macro defns */
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__KERNEL_RCSID(0, "$NetBSD: tc_bus_mem.c,v 1.19 1999/03/12 22:59:23 perry Exp $");
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/malloc.h>
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#include <sys/syslog.h>
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#include <sys/device.h>
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#include <vm/vm.h>
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#include <machine/bus.h>
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#include <dev/tc/tcvar.h>
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#define __C(A,B) __CONCAT(A,B)
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/* mapping/unmapping */
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int tc_mem_map __P((void *, bus_addr_t, bus_size_t, int,
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bus_space_handle_t *, int));
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void tc_mem_unmap __P((void *, bus_space_handle_t, bus_size_t, int));
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int tc_mem_subregion __P((void *, bus_space_handle_t, bus_size_t,
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bus_size_t, bus_space_handle_t *));
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/* allocation/deallocation */
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int tc_mem_alloc __P((void *, bus_addr_t, bus_addr_t, bus_size_t,
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bus_size_t, bus_addr_t, int, bus_addr_t *,
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bus_space_handle_t *));
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void tc_mem_free __P((void *, bus_space_handle_t, bus_size_t));
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/* barrier */
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inline void tc_mem_barrier __P((void *, bus_space_handle_t,
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bus_size_t, bus_size_t, int));
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/* read (single) */
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inline u_int8_t tc_mem_read_1 __P((void *, bus_space_handle_t, bus_size_t));
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inline u_int16_t tc_mem_read_2 __P((void *, bus_space_handle_t, bus_size_t));
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inline u_int32_t tc_mem_read_4 __P((void *, bus_space_handle_t, bus_size_t));
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inline u_int64_t tc_mem_read_8 __P((void *, bus_space_handle_t, bus_size_t));
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/* read multiple */
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void tc_mem_read_multi_1 __P((void *, bus_space_handle_t,
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bus_size_t, u_int8_t *, bus_size_t));
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void tc_mem_read_multi_2 __P((void *, bus_space_handle_t,
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bus_size_t, u_int16_t *, bus_size_t));
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void tc_mem_read_multi_4 __P((void *, bus_space_handle_t,
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bus_size_t, u_int32_t *, bus_size_t));
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void tc_mem_read_multi_8 __P((void *, bus_space_handle_t,
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bus_size_t, u_int64_t *, bus_size_t));
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/* read region */
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void tc_mem_read_region_1 __P((void *, bus_space_handle_t,
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bus_size_t, u_int8_t *, bus_size_t));
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void tc_mem_read_region_2 __P((void *, bus_space_handle_t,
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bus_size_t, u_int16_t *, bus_size_t));
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void tc_mem_read_region_4 __P((void *, bus_space_handle_t,
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bus_size_t, u_int32_t *, bus_size_t));
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void tc_mem_read_region_8 __P((void *, bus_space_handle_t,
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bus_size_t, u_int64_t *, bus_size_t));
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/* write (single) */
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inline void tc_mem_write_1 __P((void *, bus_space_handle_t, bus_size_t,
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u_int8_t));
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inline void tc_mem_write_2 __P((void *, bus_space_handle_t, bus_size_t,
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u_int16_t));
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inline void tc_mem_write_4 __P((void *, bus_space_handle_t, bus_size_t,
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u_int32_t));
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inline void tc_mem_write_8 __P((void *, bus_space_handle_t, bus_size_t,
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u_int64_t));
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/* write multiple */
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void tc_mem_write_multi_1 __P((void *, bus_space_handle_t,
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bus_size_t, const u_int8_t *, bus_size_t));
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void tc_mem_write_multi_2 __P((void *, bus_space_handle_t,
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bus_size_t, const u_int16_t *, bus_size_t));
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void tc_mem_write_multi_4 __P((void *, bus_space_handle_t,
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bus_size_t, const u_int32_t *, bus_size_t));
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void tc_mem_write_multi_8 __P((void *, bus_space_handle_t,
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bus_size_t, const u_int64_t *, bus_size_t));
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/* write region */
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void tc_mem_write_region_1 __P((void *, bus_space_handle_t,
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bus_size_t, const u_int8_t *, bus_size_t));
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void tc_mem_write_region_2 __P((void *, bus_space_handle_t,
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bus_size_t, const u_int16_t *, bus_size_t));
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void tc_mem_write_region_4 __P((void *, bus_space_handle_t,
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bus_size_t, const u_int32_t *, bus_size_t));
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void tc_mem_write_region_8 __P((void *, bus_space_handle_t,
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bus_size_t, const u_int64_t *, bus_size_t));
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/* set multiple */
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void tc_mem_set_multi_1 __P((void *, bus_space_handle_t,
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bus_size_t, u_int8_t, bus_size_t));
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void tc_mem_set_multi_2 __P((void *, bus_space_handle_t,
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bus_size_t, u_int16_t, bus_size_t));
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void tc_mem_set_multi_4 __P((void *, bus_space_handle_t,
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bus_size_t, u_int32_t, bus_size_t));
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void tc_mem_set_multi_8 __P((void *, bus_space_handle_t,
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bus_size_t, u_int64_t, bus_size_t));
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/* set region */
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void tc_mem_set_region_1 __P((void *, bus_space_handle_t,
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bus_size_t, u_int8_t, bus_size_t));
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void tc_mem_set_region_2 __P((void *, bus_space_handle_t,
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bus_size_t, u_int16_t, bus_size_t));
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void tc_mem_set_region_4 __P((void *, bus_space_handle_t,
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bus_size_t, u_int32_t, bus_size_t));
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void tc_mem_set_region_8 __P((void *, bus_space_handle_t,
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bus_size_t, u_int64_t, bus_size_t));
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/* copy */
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void tc_mem_copy_region_1 __P((void *, bus_space_handle_t,
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bus_size_t, bus_space_handle_t, bus_size_t, bus_size_t));
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void tc_mem_copy_region_2 __P((void *, bus_space_handle_t,
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bus_size_t, bus_space_handle_t, bus_size_t, bus_size_t));
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void tc_mem_copy_region_4 __P((void *, bus_space_handle_t,
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bus_size_t, bus_space_handle_t, bus_size_t, bus_size_t));
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void tc_mem_copy_region_8 __P((void *, bus_space_handle_t,
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bus_size_t, bus_space_handle_t, bus_size_t, bus_size_t));
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static struct alpha_bus_space tc_mem_space = {
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/* cookie */
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NULL,
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/* mapping/unmapping */
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tc_mem_map,
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tc_mem_unmap,
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tc_mem_subregion,
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/* allocation/deallocation */
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tc_mem_alloc,
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tc_mem_free,
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/* barrier */
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tc_mem_barrier,
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/* read (single) */
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tc_mem_read_1,
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tc_mem_read_2,
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tc_mem_read_4,
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tc_mem_read_8,
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/* read multiple */
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tc_mem_read_multi_1,
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tc_mem_read_multi_2,
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tc_mem_read_multi_4,
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tc_mem_read_multi_8,
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/* read region */
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tc_mem_read_region_1,
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tc_mem_read_region_2,
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tc_mem_read_region_4,
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tc_mem_read_region_8,
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/* write (single) */
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tc_mem_write_1,
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tc_mem_write_2,
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tc_mem_write_4,
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tc_mem_write_8,
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/* write multiple */
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tc_mem_write_multi_1,
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tc_mem_write_multi_2,
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tc_mem_write_multi_4,
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tc_mem_write_multi_8,
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/* write region */
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tc_mem_write_region_1,
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tc_mem_write_region_2,
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tc_mem_write_region_4,
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tc_mem_write_region_8,
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/* set multiple */
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tc_mem_set_multi_1,
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tc_mem_set_multi_2,
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tc_mem_set_multi_4,
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tc_mem_set_multi_8,
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/* set region */
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tc_mem_set_region_1,
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tc_mem_set_region_2,
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tc_mem_set_region_4,
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tc_mem_set_region_8,
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/* copy */
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tc_mem_copy_region_1,
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tc_mem_copy_region_2,
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tc_mem_copy_region_4,
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tc_mem_copy_region_8,
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};
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bus_space_tag_t
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tc_bus_mem_init(memv)
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void *memv;
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{
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bus_space_tag_t h = &tc_mem_space;
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h->abs_cookie = memv;
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return (h);
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}
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/* ARGSUSED */
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int
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tc_mem_map(v, memaddr, memsize, flags, memhp, acct)
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void *v;
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bus_addr_t memaddr;
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bus_size_t memsize;
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int flags;
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bus_space_handle_t *memhp;
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int acct;
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{
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int cacheable = flags & BUS_SPACE_MAP_CACHEABLE;
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int linear = flags & BUS_SPACE_MAP_LINEAR;
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/* Requests for linear uncacheable space can't be satisfied. */
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if (linear && !cacheable)
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return (EOPNOTSUPP);
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if (memaddr & 0x7)
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panic("tc_mem_map needs 8 byte alignment");
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if (cacheable)
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*memhp = ALPHA_PHYS_TO_K0SEG(memaddr);
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else
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*memhp = ALPHA_PHYS_TO_K0SEG(TC_DENSE_TO_SPARSE(memaddr));
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return (0);
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}
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/* ARGSUSED */
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void
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tc_mem_unmap(v, memh, memsize, acct)
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void *v;
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bus_space_handle_t memh;
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bus_size_t memsize;
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int acct;
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{
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/* XXX XX XXX nothing to do. */
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}
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int
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tc_mem_subregion(v, memh, offset, size, nmemh)
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void *v;
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bus_space_handle_t memh, *nmemh;
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bus_size_t offset, size;
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{
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/* Disallow subregioning that would make the handle unaligned. */
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if ((offset & 0x7) != 0)
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return (1);
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if ((memh & TC_SPACE_SPARSE) != 0)
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*nmemh = memh + (offset << 1);
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else
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*nmemh = memh + offset;
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return (0);
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}
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int
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tc_mem_alloc(v, rstart, rend, size, align, boundary, flags, addrp, bshp)
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void *v;
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bus_addr_t rstart, rend, *addrp;
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bus_size_t size, align, boundary;
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int flags;
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bus_space_handle_t *bshp;
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{
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/* XXX XXX XXX XXX XXX XXX */
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panic("tc_mem_alloc unimplemented");
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}
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void
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tc_mem_free(v, bsh, size)
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void *v;
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bus_space_handle_t bsh;
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bus_size_t size;
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{
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/* XXX XXX XXX XXX XXX XXX */
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panic("tc_mem_free unimplemented");
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}
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inline void
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tc_mem_barrier(v, h, o, l, f)
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void *v;
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bus_space_handle_t h;
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bus_size_t o, l;
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int f;
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{
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if ((f & BUS_SPACE_BARRIER_READ) != 0)
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alpha_mb();
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else if ((f & BUS_SPACE_BARRIER_WRITE) != 0)
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alpha_wmb();
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}
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inline u_int8_t
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tc_mem_read_1(v, memh, off)
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void *v;
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bus_space_handle_t memh;
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bus_size_t off;
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{
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volatile u_int8_t *p;
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alpha_mb(); /* XXX XXX XXX */
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if ((memh & TC_SPACE_SPARSE) != 0)
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panic("tc_mem_read_1 not implemented for sparse space");
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p = (u_int8_t *)(memh + off);
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return (*p);
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}
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inline u_int16_t
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tc_mem_read_2(v, memh, off)
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void *v;
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bus_space_handle_t memh;
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bus_size_t off;
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{
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volatile u_int16_t *p;
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alpha_mb(); /* XXX XXX XXX */
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if ((memh & TC_SPACE_SPARSE) != 0)
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panic("tc_mem_read_2 not implemented for sparse space");
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p = (u_int16_t *)(memh + off);
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return (*p);
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}
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inline u_int32_t
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tc_mem_read_4(v, memh, off)
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void *v;
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bus_space_handle_t memh;
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bus_size_t off;
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{
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volatile u_int32_t *p;
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alpha_mb(); /* XXX XXX XXX */
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if ((memh & TC_SPACE_SPARSE) != 0)
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/* Nothing special to do for 4-byte sparse space accesses */
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p = (u_int32_t *)(memh + (off << 1));
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else
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p = (u_int32_t *)(memh + off);
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return (*p);
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}
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inline u_int64_t
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tc_mem_read_8(v, memh, off)
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void *v;
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bus_space_handle_t memh;
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bus_size_t off;
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{
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volatile u_int64_t *p;
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alpha_mb(); /* XXX XXX XXX */
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if ((memh & TC_SPACE_SPARSE) != 0)
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panic("tc_mem_read_8 not implemented for sparse space");
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p = (u_int64_t *)(memh + off);
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return (*p);
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}
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#define tc_mem_read_multi_N(BYTES,TYPE) \
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void \
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__C(tc_mem_read_multi_,BYTES)(v, h, o, a, c) \
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void *v; \
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bus_space_handle_t h; \
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bus_size_t o, c; \
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TYPE *a; \
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{ \
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\
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while (c-- > 0) { \
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tc_mem_barrier(v, h, o, sizeof *a, BUS_SPACE_BARRIER_READ); \
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*a++ = __C(tc_mem_read_,BYTES)(v, h, o); \
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} \
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}
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tc_mem_read_multi_N(1,u_int8_t)
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tc_mem_read_multi_N(2,u_int16_t)
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tc_mem_read_multi_N(4,u_int32_t)
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tc_mem_read_multi_N(8,u_int64_t)
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#define tc_mem_read_region_N(BYTES,TYPE) \
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void \
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__C(tc_mem_read_region_,BYTES)(v, h, o, a, c) \
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void *v; \
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bus_space_handle_t h; \
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bus_size_t o, c; \
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TYPE *a; \
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{ \
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\
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while (c-- > 0) { \
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*a++ = __C(tc_mem_read_,BYTES)(v, h, o); \
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o += sizeof *a; \
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} \
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}
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tc_mem_read_region_N(1,u_int8_t)
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tc_mem_read_region_N(2,u_int16_t)
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tc_mem_read_region_N(4,u_int32_t)
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tc_mem_read_region_N(8,u_int64_t)
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inline void
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tc_mem_write_1(v, memh, off, val)
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void *v;
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bus_space_handle_t memh;
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bus_size_t off;
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u_int8_t val;
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{
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if ((memh & TC_SPACE_SPARSE) != 0) {
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volatile u_int64_t *p, v;
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u_int64_t shift, msk;
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shift = off & 0x3;
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off &= 0x3;
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p = (u_int64_t *)(memh + (off << 1));
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msk = ~(0x1 << shift) & 0xf;
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v = (msk << 32) | (((u_int64_t)val) << (shift * 8));
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*p = val;
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} else {
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volatile u_int8_t *p;
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p = (u_int8_t *)(memh + off);
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*p = val;
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}
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alpha_mb(); /* XXX XXX XXX */
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}
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inline void
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tc_mem_write_2(v, memh, off, val)
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void *v;
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bus_space_handle_t memh;
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bus_size_t off;
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u_int16_t val;
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{
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|
|
|
if ((memh & TC_SPACE_SPARSE) != 0) {
|
|
volatile u_int64_t *p, v;
|
|
u_int64_t shift, msk;
|
|
|
|
shift = off & 0x2;
|
|
off &= 0x3;
|
|
|
|
p = (u_int64_t *)(memh + (off << 1));
|
|
|
|
msk = ~(0x3 << shift) & 0xf;
|
|
v = (msk << 32) | (((u_int64_t)val) << (shift * 8));
|
|
|
|
*p = val;
|
|
} else {
|
|
volatile u_int16_t *p;
|
|
|
|
p = (u_int16_t *)(memh + off);
|
|
*p = val;
|
|
}
|
|
alpha_mb(); /* XXX XXX XXX */
|
|
}
|
|
|
|
inline void
|
|
tc_mem_write_4(v, memh, off, val)
|
|
void *v;
|
|
bus_space_handle_t memh;
|
|
bus_size_t off;
|
|
u_int32_t val;
|
|
{
|
|
volatile u_int32_t *p;
|
|
|
|
if ((memh & TC_SPACE_SPARSE) != 0)
|
|
/* Nothing special to do for 4-byte sparse space accesses */
|
|
p = (u_int32_t *)(memh + (off << 1));
|
|
else
|
|
p = (u_int32_t *)(memh + off);
|
|
*p = val;
|
|
alpha_mb(); /* XXX XXX XXX */
|
|
}
|
|
|
|
inline void
|
|
tc_mem_write_8(v, memh, off, val)
|
|
void *v;
|
|
bus_space_handle_t memh;
|
|
bus_size_t off;
|
|
u_int64_t val;
|
|
{
|
|
volatile u_int64_t *p;
|
|
|
|
if ((memh & TC_SPACE_SPARSE) != 0)
|
|
panic("tc_mem_read_8 not implemented for sparse space");
|
|
|
|
p = (u_int64_t *)(memh + off);
|
|
*p = val;
|
|
alpha_mb(); /* XXX XXX XXX */
|
|
}
|
|
|
|
#define tc_mem_write_multi_N(BYTES,TYPE) \
|
|
void \
|
|
__C(tc_mem_write_multi_,BYTES)(v, h, o, a, c) \
|
|
void *v; \
|
|
bus_space_handle_t h; \
|
|
bus_size_t o, c; \
|
|
const TYPE *a; \
|
|
{ \
|
|
\
|
|
while (c-- > 0) { \
|
|
__C(tc_mem_write_,BYTES)(v, h, o, *a++); \
|
|
tc_mem_barrier(v, h, o, sizeof *a, BUS_SPACE_BARRIER_WRITE); \
|
|
} \
|
|
}
|
|
tc_mem_write_multi_N(1,u_int8_t)
|
|
tc_mem_write_multi_N(2,u_int16_t)
|
|
tc_mem_write_multi_N(4,u_int32_t)
|
|
tc_mem_write_multi_N(8,u_int64_t)
|
|
|
|
#define tc_mem_write_region_N(BYTES,TYPE) \
|
|
void \
|
|
__C(tc_mem_write_region_,BYTES)(v, h, o, a, c) \
|
|
void *v; \
|
|
bus_space_handle_t h; \
|
|
bus_size_t o, c; \
|
|
const TYPE *a; \
|
|
{ \
|
|
\
|
|
while (c-- > 0) { \
|
|
__C(tc_mem_write_,BYTES)(v, h, o, *a++); \
|
|
o += sizeof *a; \
|
|
} \
|
|
}
|
|
tc_mem_write_region_N(1,u_int8_t)
|
|
tc_mem_write_region_N(2,u_int16_t)
|
|
tc_mem_write_region_N(4,u_int32_t)
|
|
tc_mem_write_region_N(8,u_int64_t)
|
|
|
|
#define tc_mem_set_multi_N(BYTES,TYPE) \
|
|
void \
|
|
__C(tc_mem_set_multi_,BYTES)(v, h, o, val, c) \
|
|
void *v; \
|
|
bus_space_handle_t h; \
|
|
bus_size_t o, c; \
|
|
TYPE val; \
|
|
{ \
|
|
\
|
|
while (c-- > 0) { \
|
|
__C(tc_mem_write_,BYTES)(v, h, o, val); \
|
|
tc_mem_barrier(v, h, o, sizeof val, BUS_SPACE_BARRIER_WRITE); \
|
|
} \
|
|
}
|
|
tc_mem_set_multi_N(1,u_int8_t)
|
|
tc_mem_set_multi_N(2,u_int16_t)
|
|
tc_mem_set_multi_N(4,u_int32_t)
|
|
tc_mem_set_multi_N(8,u_int64_t)
|
|
|
|
#define tc_mem_set_region_N(BYTES,TYPE) \
|
|
void \
|
|
__C(tc_mem_set_region_,BYTES)(v, h, o, val, c) \
|
|
void *v; \
|
|
bus_space_handle_t h; \
|
|
bus_size_t o, c; \
|
|
TYPE val; \
|
|
{ \
|
|
\
|
|
while (c-- > 0) { \
|
|
__C(tc_mem_write_,BYTES)(v, h, o, val); \
|
|
o += sizeof val; \
|
|
} \
|
|
}
|
|
tc_mem_set_region_N(1,u_int8_t)
|
|
tc_mem_set_region_N(2,u_int16_t)
|
|
tc_mem_set_region_N(4,u_int32_t)
|
|
tc_mem_set_region_N(8,u_int64_t)
|
|
|
|
#define tc_mem_copy_region_N(BYTES) \
|
|
void \
|
|
__C(tc_mem_copy_region_,BYTES)(v, h1, o1, h2, o2, c) \
|
|
void *v; \
|
|
bus_space_handle_t h1, h2; \
|
|
bus_size_t o1, o2, c; \
|
|
{ \
|
|
bus_size_t o; \
|
|
\
|
|
if ((h1 & TC_SPACE_SPARSE) != 0 && \
|
|
(h2 & TC_SPACE_SPARSE) != 0) { \
|
|
memmove((void *)(h2 + o2), (void *)(h1 + o1), c * BYTES); \
|
|
return; \
|
|
} \
|
|
\
|
|
if (h1 + o1 >= h2 + o2) \
|
|
/* src after dest: copy forward */ \
|
|
for (o = 0; c > 0; c--, o += BYTES) \
|
|
__C(tc_mem_write_,BYTES)(v, h2, o2 + o, \
|
|
__C(tc_mem_read_,BYTES)(v, h1, o1 + o)); \
|
|
else \
|
|
/* dest after src: copy backwards */ \
|
|
for (o = (c - 1) * BYTES; c > 0; c--, o -= BYTES) \
|
|
__C(tc_mem_write_,BYTES)(v, h2, o2 + o, \
|
|
__C(tc_mem_read_,BYTES)(v, h1, o1 + o)); \
|
|
}
|
|
tc_mem_copy_region_N(1)
|
|
tc_mem_copy_region_N(2)
|
|
tc_mem_copy_region_N(4)
|
|
tc_mem_copy_region_N(8)
|