e047259a1f
port. cesfic is a VME board with one or two mc68040 processors. See the README file for details. The port is working well with a.out userland, there are some problems with ELF still, like applications running out of memory where it is not expected. Some parts, in particular the pmap (which was taken from hp300 four years ago), need updating, but this is easier done within the NetBSD CVS tree.
110 lines
3.0 KiB
C
110 lines
3.0 KiB
C
/* $NetBSD: zs_pcc.c,v 1.1 2001/05/14 18:23:07 drochner Exp $ */
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/*
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* Copyright (c) 1997, 1999
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* Matthias Drochner. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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*/
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/proc.h>
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#include <sys/device.h>
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#include <sys/conf.h>
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#include <sys/file.h>
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#include <sys/ioctl.h>
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#include <sys/tty.h>
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#include <sys/time.h>
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#include <sys/kernel.h>
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#include <sys/syslog.h>
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#include <dev/cons.h>
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#include <dev/ic/z8530reg.h>
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#include <machine/z8530var.h>
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#include <machine/cpu.h>
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#include <machine/autoconf.h>
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#include <cesfic/cesfic/isr.h>
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#include <cesfic/dev/zsvar.h>
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extern void sic_enable_int __P((int, int, int, int, int));
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static int zsc_pcc_match __P((struct device *, struct cfdata *, void *));
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static void zsc_pcc_attach __P((struct device *, struct device *, void *));
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static char *zsbase;
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struct cfattach zsc_pcc_ca = {
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sizeof(struct zsc_softc), zsc_pcc_match, zsc_pcc_attach
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};
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static int
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zsc_pcc_match(parent, cf, aux)
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struct device *parent;
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struct cfdata *cf;
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void *aux;
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{
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return (1);
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}
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static void
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zsc_pcc_attach(parent, self, aux)
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struct device *parent;
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struct device *self;
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void *aux;
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{
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struct zsc_softc *zsc = (void *) self;
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static int didintr;
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if (!zsbase)
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mainbus_map(0x58000000, 0x10000, 0, (void **)&zsbase);
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/* Do common parts of SCC configuration. */
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zs_config(zsc, zsbase);
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/*
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* Now safe to install interrupt handlers. Note the arguments
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* to the interrupt handlers aren't used. Note, we only do this
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* once since both SCCs interrupt at the same level and vector.
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*/
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if (didintr == 0) {
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didintr = 1;
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(void) isrlink(zshard, zsc, 4, ISRPRI_TTY);
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sic_enable_int(19, 0, 4, 4, 0);
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}
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zs_write_reg(zsc->zsc_cs[0], 2, 0x18 + ZSHARD_PRI);
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zs_write_reg(zsc->zsc_cs[0], 9, ZSWR9_MASTER_IE);
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}
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void
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zs_cnattach(base)
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void *base;
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{
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zsbase = base;
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zs_cninit(zsbase);
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}
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