295 lines
8.4 KiB
C
295 lines
8.4 KiB
C
/* $NetBSD: spdmem_i2c.c,v 1.13 2016/09/09 05:36:59 msaitoh Exp $ */
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/*
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* Copyright (c) 2007 Nicolas Joly
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* Copyright (c) 2007 Paul Goyette
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* Copyright (c) 2007 Tobias Nygren
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* Copyright (c) 2015 Michael van Elst
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. The name of the author may not be used to endorse or promote products
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* derived from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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/*
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* Serial Presence Detect (SPD) memory identification
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*
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* JEDEC standard No. 21-C
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* JEDEC document 4_01_06R24
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* - Definitions of the EE1004-v 4 Kbit Serial Presence Detect EEPROM [...]
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: spdmem_i2c.c,v 1.13 2016/09/09 05:36:59 msaitoh Exp $");
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#include <sys/param.h>
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#include <sys/device.h>
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#include <sys/endian.h>
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#include <sys/module.h>
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#include <sys/sysctl.h>
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#include <machine/bswap.h>
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#include <dev/i2c/i2cvar.h>
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#include <dev/ic/spdmemreg.h>
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#include <dev/ic/spdmemvar.h>
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/* Constants for matching i2c bus address */
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#define SPDMEM_I2C_ADDRMASK 0xfff8
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#define SPDMEM_I2C_ADDR 0x50
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#define SPDCTL_I2C_ADDR 0x30
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/* set write protection */
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#define SPDCTL_SWP0 (SPDCTL_I2C_ADDR + 1)
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#define SPDCTL_SWP1 (SPDCTL_I2C_ADDR + 4)
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#define SPDCTL_SWP2 (SPDCTL_I2C_ADDR + 5)
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#define SPDCTL_SWP3 (SPDCTL_I2C_ADDR + 0)
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/* clear write protections */
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#define SPDCTL_CWP (SPDCTL_I2C_ADDR + 3)
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/* read protection status */
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#define SPDCTL_RPS0 (SPDCTL_I2C_ADDR + 1)
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#define SPDCTL_RPS1 (SPDCTL_I2C_ADDR + 4)
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#define SPDCTL_RPS2 (SPDCTL_I2C_ADDR + 5)
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#define SPDCTL_RPS3 (SPDCTL_I2C_ADDR + 0)
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/* select page address */
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#define SPDCTL_SPA0 (SPDCTL_I2C_ADDR + 6)
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#define SPDCTL_SPA1 (SPDCTL_I2C_ADDR + 7)
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/* read page address */
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#define SPDCTL_RPA (SPDCTL_I2C_ADDR + 6)
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struct spdmem_i2c_softc {
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struct spdmem_softc sc_base;
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i2c_tag_t sc_tag;
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i2c_addr_t sc_addr; /* EEPROM */
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i2c_addr_t sc_page0;
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i2c_addr_t sc_page1;
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};
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static int spdmem_reset_page(struct spdmem_i2c_softc *);
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static int spdmem_i2c_match(device_t, cfdata_t, void *);
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static void spdmem_i2c_attach(device_t, device_t, void *);
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static int spdmem_i2c_detach(device_t, int);
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CFATTACH_DECL_NEW(spdmem_iic, sizeof(struct spdmem_i2c_softc),
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spdmem_i2c_match, spdmem_i2c_attach, spdmem_i2c_detach, NULL);
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static int spdmem_i2c_read(struct spdmem_softc *, uint16_t, uint8_t *);
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static int
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spdmem_reset_page(struct spdmem_i2c_softc *sc)
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{
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uint8_t reg, byte0, byte2;
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int rv;
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reg = 0;
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iic_acquire_bus(sc->sc_tag, 0);
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/*
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* Try to read byte 0 and 2. If it failed, it's not spdmem or a device
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* doesn't exist at the address.
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*/
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rv = iic_exec(sc->sc_tag, I2C_OP_READ_WITH_STOP, sc->sc_addr, ®, 1,
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&byte0, 1, I2C_F_POLL);
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rv |= iic_exec(sc->sc_tag, I2C_OP_READ_WITH_STOP, sc->sc_addr, ®, 1,
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&byte2, 1, I2C_F_POLL);
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if (rv != 0)
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goto error;
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/*
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* Quirk for BIOSes that leave page 1 of a 4kbit EEPROM selected.
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*
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* byte0 is the length, byte2 is the memory type. Both of them should
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* not be zero. If zero, the current page might be 1 (DDR4 and newer).
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* If page 1 is selected, offset 0 can be 0 (Module Characteristics
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* (Energy backup is not available)) and also offset 2 can be 0
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* (Megabytes, and a part of Capacity digits).
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*
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* Note: The encoding of byte0 is vary in memory type, so we check
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* just with zero to be simple.
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*
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* Try to see if we are not at page 0. If it's not, select page 0.
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*/
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if ((byte0 == 0) || (byte2 == 0)) {
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/*
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* Note that SDCTL_RPA is the same as sc->sc_page0(SPDCTL_SPA0)
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* Write is SPA0, read is RPA.
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*
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* This call returns 0 on page 0 and returns -1 on page 1.
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* I don't know whether our icc_exec()'s API is good or not.
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*/
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rv = iic_exec(sc->sc_tag, I2C_OP_READ_WITH_STOP, sc->sc_page0,
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®, 1, NULL, 0, I2C_F_POLL);
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if (rv != 0) {
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/*
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* The possibilities are:
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* a) page 1 is selected.
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* b) The device doesn't support page select and
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* it's not a SPD ROM.
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* Is there no way to distinguish them now?
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*/
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rv = iic_exec(sc->sc_tag, I2C_OP_WRITE_WITH_STOP,
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sc->sc_page0, ®, 1, NULL, 0, I2C_F_POLL);
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if (rv == 0) {
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aprint_debug("Page 1 was selected. Page 0 is "
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"selected now.\n");
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} else {
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aprint_debug("Failed to select page 0. This "
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"device isn't SPD ROM\n");
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}
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} else {
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/* This device isn't SPD ROM */
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rv = -1;
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}
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}
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error:
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iic_release_bus(sc->sc_tag, 0);
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return rv;
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}
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static int
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spdmem_i2c_match(device_t parent, cfdata_t match, void *aux)
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{
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struct i2c_attach_args *ia = aux;
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struct spdmem_i2c_softc sc;
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if (ia->ia_name) {
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/* add other names as we find more firmware variations */
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if (strcmp(ia->ia_name, "dimm-spd") &&
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strcmp(ia->ia_name, "dimm"))
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return 0;
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}
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/* only do this lame test when not using direct config */
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if (ia->ia_name == NULL) {
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if ((ia->ia_addr & SPDMEM_I2C_ADDRMASK) != SPDMEM_I2C_ADDR)
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return 0;
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}
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sc.sc_tag = ia->ia_tag;
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sc.sc_addr = ia->ia_addr;
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sc.sc_page0 = SPDCTL_SPA0;
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sc.sc_page1 = SPDCTL_SPA1;
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sc.sc_base.sc_read = spdmem_i2c_read;
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/* Check the bank and reset to the page 0 */
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if (spdmem_reset_page(&sc) != 0)
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return 0;
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return spdmem_common_probe(&sc.sc_base);
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}
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static void
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spdmem_i2c_attach(device_t parent, device_t self, void *aux)
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{
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struct spdmem_i2c_softc *sc = device_private(self);
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struct i2c_attach_args *ia = aux;
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sc->sc_tag = ia->ia_tag;
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sc->sc_addr = ia->ia_addr;
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sc->sc_page0 = SPDCTL_SPA0;
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sc->sc_page1 = SPDCTL_SPA1;
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sc->sc_base.sc_read = spdmem_i2c_read;
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if (!pmf_device_register(self, NULL, NULL))
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aprint_error_dev(self, "couldn't establish power handler\n");
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spdmem_common_attach(&sc->sc_base, self);
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}
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static int
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spdmem_i2c_detach(device_t self, int flags)
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{
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struct spdmem_i2c_softc *sc = device_private(self);
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pmf_device_deregister(self);
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return spdmem_common_detach(&sc->sc_base, self);
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}
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static int
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spdmem_i2c_read(struct spdmem_softc *softc, uint16_t addr, uint8_t *val)
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{
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uint8_t reg;
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struct spdmem_i2c_softc *sc = (struct spdmem_i2c_softc *)softc;
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static uint8_t dummy = 0;
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int rv;
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reg = addr & 0xff;
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iic_acquire_bus(sc->sc_tag, 0);
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if (addr & 0x100) {
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rv = iic_exec(sc->sc_tag, I2C_OP_WRITE_WITH_STOP, sc->sc_page1,
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&dummy, 1, NULL, 0, I2C_F_POLL);
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rv |= iic_exec(sc->sc_tag, I2C_OP_READ_WITH_STOP, sc->sc_addr,
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®, 1, val, 1, I2C_F_POLL);
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rv |= iic_exec(sc->sc_tag, I2C_OP_WRITE_WITH_STOP,
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sc->sc_page0, &dummy, 1, NULL, 0, I2C_F_POLL);
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} else {
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rv = iic_exec(sc->sc_tag, I2C_OP_READ_WITH_STOP, sc->sc_addr,
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®, 1, val, 1, I2C_F_POLL);
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}
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iic_release_bus(sc->sc_tag, 0);
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return rv;
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}
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MODULE(MODULE_CLASS_DRIVER, spdmem, "i2cexec");
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#ifdef _MODULE
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#include "ioconf.c"
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#endif
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static int
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spdmem_modcmd(modcmd_t cmd, void *opaque)
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{
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int error = 0;
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#ifdef _MODULE
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static struct sysctllog *spdmem_sysctl_clog;
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#endif
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switch (cmd) {
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case MODULE_CMD_INIT:
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#ifdef _MODULE
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error = config_init_component(cfdriver_ioconf_spdmem,
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cfattach_ioconf_spdmem, cfdata_ioconf_spdmem);
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#endif
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return error;
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case MODULE_CMD_FINI:
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#ifdef _MODULE
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error = config_fini_component(cfdriver_ioconf_spdmem,
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cfattach_ioconf_spdmem, cfdata_ioconf_spdmem);
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sysctl_teardown(&spdmem_sysctl_clog);
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#endif
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return error;
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default:
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return ENOTTY;
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}
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}
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