136 lines
3.3 KiB
C
136 lines
3.3 KiB
C
/* $NetBSD: dbdma.c,v 1.2 1998/08/21 16:13:28 tsubai Exp $ */
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/*
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* Copyright 1991-1998 by Open Software Foundation, Inc.
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* All Rights Reserved
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*
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* Permission to use, copy, modify, and distribute this software and
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* its documentation for any purpose and without fee is hereby granted,
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* provided that the above copyright notice appears in all copies and
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* that both the copyright notice and this permission notice appear in
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* supporting documentation.
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*
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* OSF DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE
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* INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE.
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*
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* IN NO EVENT SHALL OSF BE LIABLE FOR ANY SPECIAL, INDIRECT, OR
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* CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM
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* LOSS OF USE, DATA OR PROFITS, WHETHER IN ACTION OF CONTRACT,
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* NEGLIGENCE, OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION
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* WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
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*
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*/
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#include <sys/param.h>
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#include <sys/malloc.h>
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#include <sys/systm.h>
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#include <vm/vm.h>
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#include <machine/pio.h>
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#include <macppc/dev/dbdma.h>
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#define eieio() __asm__ volatile("eieio")
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static int dbdma_alloc_index = 0;
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dbdma_command_t *dbdma_alloc_commands = NULL;
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void
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dbdma_start(dmap, commands)
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dbdma_regmap_t *dmap;
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dbdma_command_t *commands;
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{
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unsigned long addr = vtophys((vaddr_t)commands);
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if (addr & 0xf)
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panic("dbdma_start command structure not 16-byte aligned");
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dmap->d_intselect = 0xff; /* Endian magic - clear out interrupts */
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DBDMA_ST4_ENDIAN(&dmap->d_control,
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DBDMA_CLEAR_CNTRL( (DBDMA_CNTRL_ACTIVE |
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DBDMA_CNTRL_DEAD |
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DBDMA_CNTRL_WAKE |
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DBDMA_CNTRL_FLUSH |
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DBDMA_CNTRL_PAUSE |
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DBDMA_CNTRL_RUN )));
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eieio();
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while (DBDMA_LD4_ENDIAN(&dmap->d_status) & DBDMA_CNTRL_ACTIVE)
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eieio();
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dmap->d_cmdptrhi = 0; eieio();/* 64-bit not yet */
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DBDMA_ST4_ENDIAN(&dmap->d_cmdptrlo, addr); eieio();
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DBDMA_ST4_ENDIAN(&dmap->d_control, DBDMA_SET_CNTRL(DBDMA_CNTRL_RUN));
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eieio();
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}
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void
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dbdma_stop(dmap)
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dbdma_regmap_t *dmap;
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{
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out32rb(&dmap->d_control, DBDMA_CLEAR_CNTRL(DBDMA_CNTRL_RUN) |
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DBDMA_SET_CNTRL(DBDMA_CNTRL_FLUSH));
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while (in32rb(&dmap->d_status) &
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(DBDMA_CNTRL_ACTIVE|DBDMA_CNTRL_FLUSH));
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}
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void
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dbdma_flush(dmap)
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dbdma_regmap_t *dmap;
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{
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out32rb(&dmap->d_control, DBDMA_SET_CNTRL(DBDMA_CNTRL_FLUSH));
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while (in32rb(&dmap->d_status) & (DBDMA_CNTRL_FLUSH));
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}
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void
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dbdma_reset(dmap)
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dbdma_regmap_t *dmap;
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{
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out32rb(&dmap->d_control,
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DBDMA_CLEAR_CNTRL( (DBDMA_CNTRL_ACTIVE |
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DBDMA_CNTRL_DEAD |
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DBDMA_CNTRL_WAKE |
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DBDMA_CNTRL_FLUSH |
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DBDMA_CNTRL_PAUSE |
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DBDMA_CNTRL_RUN )));
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while (in32rb(&dmap->d_status) & DBDMA_CNTRL_RUN);
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}
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void
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dbdma_continue(dmap)
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dbdma_regmap_t *dmap;
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{
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out32rb(&dmap->d_control,
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DBDMA_SET_CNTRL(DBDMA_CNTRL_RUN | DBDMA_CNTRL_WAKE) |
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DBDMA_CLEAR_CNTRL(DBDMA_CNTRL_PAUSE | DBDMA_CNTRL_DEAD));
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}
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void
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dbdma_pause(dmap)
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dbdma_regmap_t *dmap;
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{
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DBDMA_ST4_ENDIAN(&dmap->d_control,DBDMA_SET_CNTRL(DBDMA_CNTRL_PAUSE));
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eieio();
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while (DBDMA_LD4_ENDIAN(&dmap->d_status) & DBDMA_CNTRL_ACTIVE)
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eieio();
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}
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dbdma_command_t *
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dbdma_alloc(size)
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int size;
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{
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u_int buf;
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buf = (u_int)malloc(size + 0x0f, M_DEVBUF, M_WAITOK);
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buf = (buf + 0x0f) & ~0x0f;
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return (dbdma_command_t *)buf;
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}
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