2881 lines
68 KiB
C
2881 lines
68 KiB
C
/* $NetBSD: pmap.c,v 1.23 1998/08/22 18:11:25 scw Exp $ */
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/*
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* Copyright (c) 1991, 1993
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* The Regents of the University of California. All rights reserved.
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*
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* This code is derived from software contributed to Berkeley by
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* the Systems Programming Group of the University of Utah Computer
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* Science Department.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by the University of
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* California, Berkeley and its contributors.
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* 4. Neither the name of the University nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* @(#)pmap.c 8.6 (Berkeley) 5/27/94
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*/
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/*
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* HP9000/300 series physical map management code.
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*
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* Supports:
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* 68020 with HP MMU models 320, 350
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* 68020 with 68551 MMU models 318, 319, 330 (all untested)
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* 68030 with on-chip MMU models 340, 360, 370, 345, 375, 400
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* 68040 with on-chip MMU models 380, 425, 433
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*
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* Notes:
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* Don't even pay lip service to multiprocessor support.
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*
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* We assume TLB entries don't have process tags (except for the
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* supervisor/user distinction) so we only invalidate TLB entries
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* when changing mappings for the current (or kernel) pmap. This is
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* technically not true for the 68551 but we flush the TLB on every
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* context switch, so it effectively winds up that way.
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*
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* Bitwise and/or operations are significantly faster than bitfield
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* references so we use them when accessing STE/PTEs in the pmap_pte_*
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* macros. Note also that the two are not always equivalent; e.g.:
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* (*pte & PG_PROT) [4] != pte->pg_prot [1]
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* and a couple of routines that deal with protection and wiring take
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* some shortcuts that assume the and/or definitions.
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*
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* This implementation will only work for PAGE_SIZE == NBPG
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* (i.e. 4096 bytes).
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*/
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/*
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* Manages physical address maps.
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*
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* In addition to hardware address maps, this
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* module is called upon to provide software-use-only
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* maps which may or may not be stored in the same
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* form as hardware maps. These pseudo-maps are
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* used to store intermediate results from copy
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* operations to and from address spaces.
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*
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* Since the information managed by this module is
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* also stored by the logical address mapping module,
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* this module may throw away valid virtual-to-physical
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* mappings at almost any time. However, invalidations
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* of virtual-to-physical mappings must be done as
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* requested.
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*
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* In order to cope with hardware architectures which
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* make virtual-to-physical map invalidates expensive,
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* this module may delay invalidate or reduced protection
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* operations until such time as they are actually
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* necessary. This module is given full information as
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* to which processors are currently using which maps,
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* and to when physical maps must be made correct.
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*/
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#include "opt_uvm.h"
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#include "opt_compat_hpux.h"
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/proc.h>
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#include <sys/malloc.h>
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#include <sys/user.h>
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#include <machine/vmparam.h>
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#include <machine/pte.h>
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#include <vm/vm.h>
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#include <vm/vm_kern.h>
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#include <vm/vm_page.h>
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#if defined(UVM)
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#include <uvm/uvm.h>
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#endif
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#include <machine/cpu.h>
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#include <m68k/cacheops.h>
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#ifdef PMAPSTATS
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struct {
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int collectscans;
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int collectpages;
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int kpttotal;
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int kptinuse;
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int kptmaxuse;
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} kpt_stats;
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struct {
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int kernel; /* entering kernel mapping */
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int user; /* entering user mapping */
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int ptpneeded; /* needed to allocate a PT page */
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int nochange; /* no change at all */
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int pwchange; /* no mapping change, just wiring or protection */
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int wchange; /* no mapping change, just wiring */
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int pchange; /* no mapping change, just protection */
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int mchange; /* was mapped but mapping to different page */
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int managed; /* a managed page */
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int firstpv; /* first mapping for this PA */
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int secondpv; /* second mapping for this PA */
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int ci; /* cache inhibited */
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int unmanaged; /* not a managed page */
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int flushes; /* cache flushes */
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} enter_stats;
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struct {
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int calls;
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int removes;
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int pvfirst;
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int pvsearch;
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int ptinvalid;
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int uflushes;
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int sflushes;
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} remove_stats;
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struct {
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int calls;
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int changed;
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int alreadyro;
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int alreadyrw;
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} protect_stats;
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struct chgstats {
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int setcalls;
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int sethits;
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int setmiss;
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int clrcalls;
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int clrhits;
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int clrmiss;
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} changebit_stats[16];
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#endif
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#ifdef DEBUG
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int debugmap = 0;
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int pmapdebug = 0x2000;
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#define PDB_FOLLOW 0x0001
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#define PDB_INIT 0x0002
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#define PDB_ENTER 0x0004
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#define PDB_REMOVE 0x0008
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#define PDB_CREATE 0x0010
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#define PDB_PTPAGE 0x0020
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#define PDB_CACHE 0x0040
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#define PDB_BITS 0x0080
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#define PDB_COLLECT 0x0100
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#define PDB_PROTECT 0x0200
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#define PDB_SEGTAB 0x0400
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#define PDB_MULTIMAP 0x0800
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#define PDB_PARANOIA 0x2000
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#define PDB_WIRING 0x4000
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#define PDB_PVDUMP 0x8000
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#ifdef HAVEVAC
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int pmapvacflush = 0;
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#define PVF_ENTER 0x01
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#define PVF_REMOVE 0x02
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#define PVF_PROTECT 0x04
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#define PVF_TOTAL 0x80
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#endif
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#if defined(M68040)
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int dowriteback = 1; /* 68040: enable writeback caching */
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int dokwriteback = 1; /* 68040: enable writeback caching of kernel AS */
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#endif
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#endif
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/*
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* Get STEs and PTEs for user/kernel address space
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*/
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#if defined(M68040)
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#define pmap_ste1(m, v) \
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(&((m)->pm_stab[(vaddr_t)(v) >> SG4_SHIFT1]))
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/* XXX assumes physically contiguous ST pages (if more than one) */
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#define pmap_ste2(m, v) \
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(&((m)->pm_stab[(st_entry_t *)(*(u_int *)pmap_ste1(m, v) & SG4_ADDR1) \
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- (m)->pm_stpa + (((v) & SG4_MASK2) >> SG4_SHIFT2)]))
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#define pmap_ste(m, v) \
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(&((m)->pm_stab[(vaddr_t)(v) \
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>> (mmutype == MMU_68040 ? SG4_SHIFT1 : SG_ISHIFT)]))
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#define pmap_ste_v(m, v) \
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(mmutype == MMU_68040 \
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? ((*pmap_ste1(m, v) & SG_V) && \
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(*pmap_ste2(m, v) & SG_V)) \
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: (*pmap_ste(m, v) & SG_V))
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#else
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#define pmap_ste(m, v) (&((m)->pm_stab[(vaddr_t)(v) >> SG_ISHIFT]))
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#define pmap_ste_v(m, v) (*pmap_ste(m, v) & SG_V)
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#endif
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#define pmap_pte(m, v) (&((m)->pm_ptab[(vaddr_t)(v) >> PG_SHIFT]))
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#define pmap_pte_pa(pte) (*(pte) & PG_FRAME)
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#define pmap_pte_w(pte) (*(pte) & PG_W)
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#define pmap_pte_ci(pte) (*(pte) & PG_CI)
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#define pmap_pte_m(pte) (*(pte) & PG_M)
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#define pmap_pte_u(pte) (*(pte) & PG_U)
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#define pmap_pte_prot(pte) (*(pte) & PG_PROT)
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#define pmap_pte_v(pte) (*(pte) & PG_V)
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#define pmap_pte_set_w(pte, v) \
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if (v) *(pte) |= PG_W; else *(pte) &= ~PG_W
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#define pmap_pte_set_prot(pte, v) \
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if (v) *(pte) |= PG_PROT; else *(pte) &= ~PG_PROT
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#define pmap_pte_w_chg(pte, nw) ((nw) ^ pmap_pte_w(pte))
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#define pmap_pte_prot_chg(pte, np) ((np) ^ pmap_pte_prot(pte))
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/*
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* Given a map and a machine independent protection code,
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* convert to an m68k protection code.
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*/
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#define pte_prot(m, p) (protection_codes[p])
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int protection_codes[8];
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/*
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* Kernel page table page management.
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*/
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struct kpt_page {
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struct kpt_page *kpt_next; /* link on either used or free list */
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vaddr_t kpt_va; /* always valid kernel VA */
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vaddr_t kpt_pa; /* PA of this page (for speed) */
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};
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struct kpt_page *kpt_free_list, *kpt_used_list;
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struct kpt_page *kpt_pages;
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/*
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* Kernel segment/page table and page table map.
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* The page table map gives us a level of indirection we need to dynamically
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* expand the page table. It is essentially a copy of the segment table
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* with PTEs instead of STEs. All are initialized in locore at boot time.
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* Sysmap will initially contain VM_KERNEL_PT_PAGES pages of PTEs.
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* Segtabzero is an empty segment table which all processes share til they
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* reference something.
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*/
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st_entry_t *Sysseg;
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pt_entry_t *Sysmap, *Sysptmap;
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st_entry_t *Segtabzero, *Segtabzeropa;
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vsize_t Sysptsize = VM_KERNEL_PT_PAGES;
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struct pmap kernel_pmap_store;
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vm_map_t st_map, pt_map;
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#if defined(UVM)
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struct vm_map st_map_store, pt_map_store;
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#endif
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paddr_t avail_start; /* PA of first available physical page */
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paddr_t avail_end; /* PA of last available physical page */
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vsize_t mem_size; /* memory size in bytes */
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vaddr_t virtual_avail; /* VA of first avail page (after kernel bss)*/
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vaddr_t virtual_end; /* VA of last avail page (end of kernel AS) */
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int page_cnt;
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boolean_t pmap_initialized = FALSE; /* Has pmap_init completed? */
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struct pv_entry *pv_table;
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char *pmap_attributes; /* reference and modify bits */
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TAILQ_HEAD(pv_page_list, pv_page) pv_page_freelist;
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int pv_nfree;
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#ifdef HAVEVAC
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int pmap_aliasmask; /* seperation at which VA aliasing ok */
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#endif
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#if defined(M68040)
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int protostfree; /* prototype (default) free ST map */
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#endif
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#define PAGE_IS_MANAGED(pa) (pmap_initialized && \
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vm_physseg_find(atop((pa)), NULL) != -1)
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#define pa_to_pvh(pa) \
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({ \
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int bank_, pg_; \
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\
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bank_ = vm_physseg_find(atop((pa)), &pg_); \
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&vm_physmem[bank_].pmseg.pvent[pg_]; \
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})
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#define pa_to_attribute(pa) \
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({ \
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int bank_, pg_; \
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\
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bank_ = vm_physseg_find(atop((pa)), &pg_); \
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&vm_physmem[bank_].pmseg.attrs[pg_]; \
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})
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/*
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* Internal routines
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*/
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void pmap_remove_mapping __P((pmap_t, vaddr_t, pt_entry_t *, int));
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boolean_t pmap_testbit __P((paddr_t, int));
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void pmap_changebit __P((paddr_t, int, boolean_t));
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void pmap_enter_ptpage __P((pmap_t, vaddr_t));
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void pmap_collect1 __P((pmap_t, paddr_t, paddr_t));
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#ifdef DEBUG
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void pmap_pvdump __P((paddr_t));
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void pmap_check_wiring __P((char *, vaddr_t));
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#endif
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void pmap_pinit __P((pmap_t));
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void pmap_release __P((pmap_t));
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/* pmap_remove_mapping flags */
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#define PRM_TFLUSH 1
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#define PRM_CFLUSH 2
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/*
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* Routine: pmap_virtual_space
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*
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* Function:
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* Report the range of available kernel virtual address
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* space to the VM system during bootstrap. Called by
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* vm_bootstrap_steal_memory().
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*/
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void
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pmap_virtual_space(vstartp, vendp)
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vaddr_t *vstartp, *vendp;
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{
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*vstartp = virtual_avail;
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*vendp = virtual_end;
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}
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/*
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* Initialize the pmap module.
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* Called by vm_init, to initialize any structures that the pmap
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* system needs to map virtual memory.
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*/
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void
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pmap_init()
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{
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vaddr_t addr, addr2;
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vsize_t s;
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int rv;
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int npages;
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struct pv_entry *pv;
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char *attr;
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int bank;
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#ifdef DEBUG
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if (pmapdebug & PDB_INIT)
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printf("pmap_init()\n");
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#endif
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/*
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* Now that kernel map has been allocated, we can mark as
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* unavailable regions which we have mapped in locore.
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*/
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#if defined(UVM)
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addr = (vaddr_t) intiobase;
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if (uvm_map(kernel_map, &addr, m68k_ptob(IIOMAPSIZE),
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NULL, UVM_UNKNOWN_OFFSET,
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UVM_MAPFLAG(UVM_PROT_NONE, UVM_PROT_NONE,
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UVM_INH_NONE, UVM_ADV_RANDOM,
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UVM_FLAG_FIXED)) != KERN_SUCCESS)
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goto bogons;
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addr = (vaddr_t) Sysmap;
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if (uvm_map(kernel_map, &addr, HP_MAX_PTSIZE,
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NULL, UVM_UNKNOWN_OFFSET,
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UVM_MAPFLAG(UVM_PROT_NONE, UVM_PROT_NONE,
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UVM_INH_NONE, UVM_ADV_RANDOM,
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UVM_FLAG_FIXED)) != KERN_SUCCESS) {
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/*
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* If this fails, it is probably because the static
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* portion of the kernel page tabel isn't big enough
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* and we overran the page table map.
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*/
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bogons:
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panic("pmap_init: bogons in the VM system!\n");
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}
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#else
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addr = (vaddr_t) intiobase;
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(void) vm_map_find(kernel_map, NULL, (vaddr_t) 0,
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&addr, m68k_ptob(IIOMAPSIZE), FALSE);
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if (addr != (vaddr_t)intiobase)
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goto bogons;
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addr = (vaddr_t) Sysmap;
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vm_object_reference(kernel_object);
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(void) vm_map_find(kernel_map, kernel_object, addr,
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&addr, HP_MAX_PTSIZE, FALSE);
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/*
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* If this fails it is probably because the static portion of
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* the kernel page table isn't big enough and we overran the
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* page table map. Need to adjust pmap_size() in m68k_init.c.
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*/
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if (addr != (vaddr_t)Sysmap)
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bogons:
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panic("pmap_init: bogons in the VM system!\n");
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#endif /* ! UVM */
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#ifdef DEBUG
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if (pmapdebug & PDB_INIT) {
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printf("pmap_init: Sysseg %x, Sysmap %x, Sysptmap %x\n",
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Sysseg, Sysmap, Sysptmap);
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printf(" avail_start %x, avail_end %x, vavail %x, vend %x\n",
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avail_start, avail_end, virtual_avail, virtual_end);
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}
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#endif
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/*
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* Allocate memory for random pmap data structures. Includes the
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* initial segment table, pv_head_table and pmap_attributes.
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*/
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for (page_cnt = 0, bank = 0; bank < vm_nphysseg; bank++)
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page_cnt += (vm_physmem[bank].end - vm_physmem[bank].start);
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s = HP_STSIZE; /* Segtabzero */
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s += page_cnt * sizeof(struct pv_entry); /* pv table */
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s += page_cnt * sizeof(char); /* attribute table */
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s = round_page(s);
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#if defined(UVM)
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addr = uvm_km_zalloc(kernel_map, s);
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if (addr == 0)
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panic("pmap_init: can't allocate data structures");
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#else
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addr = kmem_alloc(kernel_map, s);
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#endif
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Segtabzero = (st_entry_t *) addr;
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Segtabzeropa = (st_entry_t *) pmap_extract(pmap_kernel(), addr);
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addr += HP_STSIZE;
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pv_table = (struct pv_entry *) addr;
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addr += page_cnt * sizeof(struct pv_entry);
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pmap_attributes = (char *) addr;
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#ifdef DEBUG
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if (pmapdebug & PDB_INIT)
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printf("pmap_init: %lx bytes: page_cnt %x s0 %p(%p) "
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"tbl %p atr %p\n",
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s, page_cnt, Segtabzero, Segtabzeropa,
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pv_table, pmap_attributes);
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#endif
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/*
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* Now that the pv and attribute tables have been allocated,
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* assign them to the memory segments.
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*/
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pv = pv_table;
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attr = pmap_attributes;
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for (bank = 0; bank < vm_nphysseg; bank++) {
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npages = vm_physmem[bank].end - vm_physmem[bank].start;
|
|
vm_physmem[bank].pmseg.pvent = pv;
|
|
vm_physmem[bank].pmseg.attrs = attr;
|
|
pv += npages;
|
|
attr += npages;
|
|
}
|
|
|
|
/*
|
|
* Allocate physical memory for kernel PT pages and their management.
|
|
* We need 1 PT page per possible task plus some slop.
|
|
*/
|
|
npages = min(atop(HP_MAX_KPTSIZE), maxproc+16);
|
|
s = ptoa(npages) + round_page(npages * sizeof(struct kpt_page));
|
|
|
|
/*
|
|
* Verify that space will be allocated in region for which
|
|
* we already have kernel PT pages.
|
|
*/
|
|
#if defined(UVM)
|
|
addr = 0;
|
|
rv = uvm_map(kernel_map, &addr, s, NULL, UVM_UNKNOWN_OFFSET,
|
|
UVM_MAPFLAG(UVM_PROT_NONE, UVM_PROT_NONE, UVM_INH_NONE,
|
|
UVM_ADV_RANDOM, UVM_FLAG_NOMERGE));
|
|
if (rv != KERN_SUCCESS || (addr + s) >= (vaddr_t)Sysmap)
|
|
panic("pmap_init: kernel PT too small");
|
|
rv = uvm_unmap(kernel_map, addr, addr + s, FALSE);
|
|
if (rv != KERN_SUCCESS)
|
|
panic("pmap_init: uvm_unmap failed");
|
|
#else
|
|
addr = 0;
|
|
rv = vm_map_find(kernel_map, NULL, 0, &addr, s, TRUE);
|
|
if (rv != KERN_SUCCESS || addr + s >= (vaddr_t)Sysmap)
|
|
panic("pmap_init: kernel PT too small");
|
|
vm_map_remove(kernel_map, addr, addr + s);
|
|
#endif
|
|
|
|
/*
|
|
* Now allocate the space and link the pages together to
|
|
* form the KPT free list.
|
|
*/
|
|
#if defined(UVM)
|
|
addr = uvm_km_zalloc(kernel_map, s);
|
|
if (addr == 0)
|
|
panic("pmap_init: cannot allocate KPT free list");
|
|
#else
|
|
addr = kmem_alloc(kernel_map, s);
|
|
#endif
|
|
s = ptoa(npages);
|
|
addr2 = addr + s;
|
|
kpt_pages = &((struct kpt_page *)addr2)[npages];
|
|
kpt_free_list = (struct kpt_page *) 0;
|
|
do {
|
|
addr2 -= NBPG;
|
|
(--kpt_pages)->kpt_next = kpt_free_list;
|
|
kpt_free_list = kpt_pages;
|
|
kpt_pages->kpt_va = addr2;
|
|
kpt_pages->kpt_pa = pmap_extract(pmap_kernel(), addr2);
|
|
} while (addr != addr2);
|
|
#ifdef PMAPSTATS
|
|
kpt_stats.kpttotal = atop(s);
|
|
#endif
|
|
#ifdef DEBUG
|
|
if (pmapdebug & PDB_INIT)
|
|
printf("pmap_init: KPT: %ld pages from %lx to %lx\n",
|
|
atop(s), addr, addr + s);
|
|
#endif
|
|
|
|
#if defined(UVM)
|
|
/*
|
|
* Allocate the segment table map and the page table map
|
|
*/
|
|
s = maxproc * HP_STSIZE;
|
|
st_map = uvm_km_suballoc(kernel_map, &addr, &addr2, s, TRUE,
|
|
FALSE, &st_map_store);
|
|
|
|
addr = HP_PTBASE;
|
|
if ((HP_PTMAXSIZE / HP_MAX_PTSIZE) < maxproc) {
|
|
s = HP_PTMAXSIZE;
|
|
/*
|
|
* XXX We don't want to hang when we run out of
|
|
* page tables, so we lower maxproc so that fork()
|
|
* will fail instead. Note that root could still raise
|
|
* this value via sysctl(3).
|
|
*/
|
|
maxproc = (HP_PTMAXSIZE / HP_MAX_PTSIZE);
|
|
} else
|
|
s = (maxproc * HP_MAX_PTSIZE);
|
|
pt_map = uvm_km_suballoc(kernel_map, &addr, &addr2, s, TRUE,
|
|
TRUE, &pt_map_store);
|
|
#else
|
|
/*
|
|
* Allocate the segment table map
|
|
*/
|
|
s = maxproc * HP_STSIZE;
|
|
st_map = kmem_suballoc(kernel_map, &addr, &addr2, s, TRUE);
|
|
|
|
/*
|
|
* Slightly modified version of kmem_suballoc() to get page table
|
|
* map where we want it.
|
|
*/
|
|
addr = HP_PTBASE;
|
|
if ((HP_PTMAXSIZE / HP_MAX_PTSIZE) < maxproc) {
|
|
s = HP_PTMAXSIZE;
|
|
/*
|
|
* XXX We don't want to hang when we run out of
|
|
* page tables, so we lower maxproc so that fork()
|
|
* will fail instead. Note that root could still raise
|
|
* this value via sysctl(3).
|
|
*/
|
|
maxproc = (HP_PTMAXSIZE / HP_MAX_PTSIZE);
|
|
} else
|
|
s = (maxproc * HP_MAX_PTSIZE);
|
|
addr2 = addr + s;
|
|
rv = vm_map_find(kernel_map, NULL, 0, &addr, s, TRUE);
|
|
if (rv != KERN_SUCCESS)
|
|
panic("pmap_init: cannot allocate space for PT map");
|
|
pmap_reference(vm_map_pmap(kernel_map));
|
|
pt_map = vm_map_create(vm_map_pmap(kernel_map), addr, addr2, TRUE);
|
|
if (pt_map == NULL)
|
|
panic("pmap_init: cannot create pt_map");
|
|
rv = vm_map_submap(kernel_map, addr, addr2, pt_map);
|
|
if (rv != KERN_SUCCESS)
|
|
panic("pmap_init: cannot map range to pt_map");
|
|
#ifdef DEBUG
|
|
if (pmapdebug & PDB_INIT)
|
|
printf("pmap_init: pt_map [%lx - %lx)\n", addr, addr2);
|
|
#endif
|
|
#endif /* ! UVM */
|
|
|
|
#if defined(M68040)
|
|
if (mmutype == MMU_68040) {
|
|
protostfree = ~l2tobm(0);
|
|
for (rv = MAXUL2SIZE; rv < sizeof(protostfree)*NBBY; rv++)
|
|
protostfree &= ~l2tobm(rv);
|
|
}
|
|
#endif
|
|
|
|
/*
|
|
* Now it is safe to enable pv_table recording.
|
|
*/
|
|
pmap_initialized = TRUE;
|
|
}
|
|
|
|
struct pv_entry *
|
|
pmap_alloc_pv()
|
|
{
|
|
struct pv_page *pvp;
|
|
struct pv_entry *pv;
|
|
int i;
|
|
|
|
if (pv_nfree == 0) {
|
|
#if defined(UVM)
|
|
pvp = (struct pv_page *)uvm_km_zalloc(kernel_map, NBPG);
|
|
if (pvp == 0)
|
|
panic("pmap_alloc_pv: uvm_km_zalloc() failed");
|
|
#else
|
|
pvp = (struct pv_page *)kmem_alloc(kernel_map, NBPG);
|
|
if (pvp == 0)
|
|
panic("pmap_alloc_pv: kmem_alloc() failed");
|
|
#endif
|
|
pvp->pvp_pgi.pgi_freelist = pv = &pvp->pvp_pv[1];
|
|
for (i = NPVPPG - 2; i; i--, pv++)
|
|
pv->pv_next = pv + 1;
|
|
pv->pv_next = 0;
|
|
pv_nfree += pvp->pvp_pgi.pgi_nfree = NPVPPG - 1;
|
|
TAILQ_INSERT_HEAD(&pv_page_freelist, pvp, pvp_pgi.pgi_list);
|
|
pv = &pvp->pvp_pv[0];
|
|
} else {
|
|
--pv_nfree;
|
|
pvp = pv_page_freelist.tqh_first;
|
|
if (--pvp->pvp_pgi.pgi_nfree == 0) {
|
|
TAILQ_REMOVE(&pv_page_freelist, pvp, pvp_pgi.pgi_list);
|
|
}
|
|
pv = pvp->pvp_pgi.pgi_freelist;
|
|
#ifdef DIAGNOSTIC
|
|
if (pv == 0)
|
|
panic("pmap_alloc_pv: pgi_nfree inconsistent");
|
|
#endif
|
|
pvp->pvp_pgi.pgi_freelist = pv->pv_next;
|
|
}
|
|
return pv;
|
|
}
|
|
|
|
void
|
|
pmap_free_pv(pv)
|
|
struct pv_entry *pv;
|
|
{
|
|
struct pv_page *pvp;
|
|
|
|
pvp = (struct pv_page *) trunc_page(pv);
|
|
switch (++pvp->pvp_pgi.pgi_nfree) {
|
|
case 1:
|
|
TAILQ_INSERT_TAIL(&pv_page_freelist, pvp, pvp_pgi.pgi_list);
|
|
default:
|
|
pv->pv_next = pvp->pvp_pgi.pgi_freelist;
|
|
pvp->pvp_pgi.pgi_freelist = pv;
|
|
++pv_nfree;
|
|
break;
|
|
case NPVPPG:
|
|
pv_nfree -= NPVPPG - 1;
|
|
TAILQ_REMOVE(&pv_page_freelist, pvp, pvp_pgi.pgi_list);
|
|
#if defined(UVM)
|
|
uvm_km_free(kernel_map, (vaddr_t)pvp, NBPG);
|
|
#else
|
|
kmem_free(kernel_map, (vaddr_t)pvp, NBPG);
|
|
#endif
|
|
break;
|
|
}
|
|
}
|
|
|
|
void
|
|
pmap_collect_pv()
|
|
{
|
|
struct pv_page_list pv_page_collectlist;
|
|
struct pv_page *pvp, *npvp;
|
|
struct pv_entry *ph, *ppv, *pv, *npv;
|
|
int s;
|
|
|
|
TAILQ_INIT(&pv_page_collectlist);
|
|
|
|
for (pvp = pv_page_freelist.tqh_first; pvp; pvp = npvp) {
|
|
if (pv_nfree < NPVPPG)
|
|
break;
|
|
npvp = pvp->pvp_pgi.pgi_list.tqe_next;
|
|
if (pvp->pvp_pgi.pgi_nfree > NPVPPG / 3) {
|
|
TAILQ_REMOVE(&pv_page_freelist, pvp, pvp_pgi.pgi_list);
|
|
TAILQ_INSERT_TAIL(&pv_page_collectlist, pvp, pvp_pgi.pgi_list);
|
|
pv_nfree -= pvp->pvp_pgi.pgi_nfree;
|
|
pvp->pvp_pgi.pgi_nfree = -1;
|
|
}
|
|
}
|
|
|
|
if (pv_page_collectlist.tqh_first == 0)
|
|
return;
|
|
|
|
for (ph = &pv_table[page_cnt - 1]; ph >= &pv_table[0]; ph--) {
|
|
if (ph->pv_pmap == 0)
|
|
continue;
|
|
s = splimp();
|
|
for (ppv = ph; (pv = ppv->pv_next) != 0; ) {
|
|
pvp = (struct pv_page *) trunc_page(pv);
|
|
if (pvp->pvp_pgi.pgi_nfree == -1) {
|
|
pvp = pv_page_freelist.tqh_first;
|
|
if (--pvp->pvp_pgi.pgi_nfree == 0) {
|
|
TAILQ_REMOVE(&pv_page_freelist, pvp, pvp_pgi.pgi_list);
|
|
}
|
|
npv = pvp->pvp_pgi.pgi_freelist;
|
|
#ifdef DIAGNOSTIC
|
|
if (npv == 0)
|
|
panic("pmap_collect_pv: pgi_nfree inconsistent");
|
|
#endif
|
|
pvp->pvp_pgi.pgi_freelist = npv->pv_next;
|
|
*npv = *pv;
|
|
ppv->pv_next = npv;
|
|
ppv = npv;
|
|
} else
|
|
ppv = pv;
|
|
}
|
|
splx(s);
|
|
}
|
|
|
|
for (pvp = pv_page_collectlist.tqh_first; pvp; pvp = npvp) {
|
|
npvp = pvp->pvp_pgi.pgi_list.tqe_next;
|
|
#if defined(UVM)
|
|
uvm_km_free(kernel_map, (vaddr_t)pvp, NBPG);
|
|
#else
|
|
kmem_free(kernel_map, (vaddr_t)pvp, NBPG);
|
|
#endif
|
|
}
|
|
}
|
|
|
|
/*
|
|
* Used to map a range of physical addresses into kernel
|
|
* virtual address space.
|
|
*
|
|
* For now, VM is already on, we only need to map the
|
|
* specified memory.
|
|
*/
|
|
vaddr_t
|
|
pmap_map(va, spa, epa, prot)
|
|
vaddr_t va;
|
|
paddr_t spa, epa;
|
|
int prot;
|
|
{
|
|
|
|
#ifdef DEBUG
|
|
if (pmapdebug & PDB_FOLLOW)
|
|
printf("pmap_map(%lx, %lx, %lx, %x)\n", va, spa, epa, prot);
|
|
#endif
|
|
|
|
while (spa < epa) {
|
|
pmap_enter(pmap_kernel(), va, spa, prot, FALSE);
|
|
va += NBPG;
|
|
spa += NBPG;
|
|
}
|
|
return (va);
|
|
}
|
|
|
|
/*
|
|
* Create and return a physical map.
|
|
*
|
|
* If the size specified for the map
|
|
* is zero, the map is an actual physical
|
|
* map, and may be referenced by the
|
|
* hardware.
|
|
*
|
|
* If the size specified is non-zero,
|
|
* the map will be used in software only, and
|
|
* is bounded by that size.
|
|
*/
|
|
pmap_t
|
|
pmap_create(size)
|
|
vsize_t size;
|
|
{
|
|
pmap_t pmap;
|
|
|
|
#ifdef DEBUG
|
|
if (pmapdebug & (PDB_FOLLOW|PDB_CREATE))
|
|
printf("pmap_create(%lx)\n", size);
|
|
#endif
|
|
|
|
/*
|
|
* Software use map does not need a pmap
|
|
*/
|
|
if (size)
|
|
return (NULL);
|
|
|
|
/* XXX: is it ok to wait here? */
|
|
pmap = (pmap_t) malloc(sizeof *pmap, M_VMPMAP, M_WAITOK);
|
|
#ifdef notifwewait
|
|
if (pmap == NULL)
|
|
panic("pmap_create: cannot allocate a pmap");
|
|
#endif
|
|
bzero(pmap, sizeof(*pmap));
|
|
pmap_pinit(pmap);
|
|
return (pmap);
|
|
}
|
|
|
|
/*
|
|
* Initialize a preallocated and zeroed pmap structure,
|
|
* such as one in a vmspace structure.
|
|
*/
|
|
void
|
|
pmap_pinit(pmap)
|
|
struct pmap *pmap;
|
|
{
|
|
|
|
#ifdef DEBUG
|
|
if (pmapdebug & (PDB_FOLLOW|PDB_CREATE))
|
|
printf("pmap_pinit(%p)\n", pmap);
|
|
#endif
|
|
|
|
/*
|
|
* No need to allocate page table space yet but we do need a
|
|
* valid segment table. Initially, we point everyone at the
|
|
* "null" segment table. On the first pmap_enter, a real
|
|
* segment table will be allocated.
|
|
*/
|
|
pmap->pm_stab = Segtabzero;
|
|
pmap->pm_stpa = Segtabzeropa;
|
|
#if defined(M68040)
|
|
if (mmutype == MMU_68040)
|
|
pmap->pm_stfree = protostfree;
|
|
#endif
|
|
pmap->pm_count = 1;
|
|
simple_lock_init(&pmap->pm_lock);
|
|
}
|
|
|
|
/*
|
|
* Retire the given physical map from service.
|
|
* Should only be called if the map contains
|
|
* no valid mappings.
|
|
*/
|
|
void
|
|
pmap_destroy(pmap)
|
|
pmap_t pmap;
|
|
{
|
|
int count;
|
|
|
|
if (pmap == NULL)
|
|
return;
|
|
|
|
#ifdef DEBUG
|
|
if (pmapdebug & PDB_FOLLOW)
|
|
printf("pmap_destroy(%p)\n", pmap);
|
|
#endif
|
|
|
|
simple_lock(&pmap->pm_lock);
|
|
count = --pmap->pm_count;
|
|
simple_unlock(&pmap->pm_lock);
|
|
if (count == 0) {
|
|
pmap_release(pmap);
|
|
free((caddr_t)pmap, M_VMPMAP);
|
|
}
|
|
}
|
|
|
|
/*
|
|
* Release any resources held by the given physical map.
|
|
* Called when a pmap initialized by pmap_pinit is being released.
|
|
* Should only be called if the map contains no valid mappings.
|
|
*/
|
|
void
|
|
pmap_release(pmap)
|
|
struct pmap *pmap;
|
|
{
|
|
|
|
#ifdef DEBUG
|
|
if (pmapdebug & PDB_FOLLOW)
|
|
printf("pmap_release(%p)\n", pmap);
|
|
#endif
|
|
|
|
#ifdef notdef /* DIAGNOSTIC */
|
|
/* count would be 0 from pmap_destroy... */
|
|
simple_lock(&pmap->pm_lock);
|
|
if (pmap->pm_count != 1)
|
|
panic("pmap_release count");
|
|
#endif
|
|
|
|
if (pmap->pm_ptab)
|
|
#if defined(UVM)
|
|
uvm_km_free_wakeup(pt_map, (vaddr_t)pmap->pm_ptab,
|
|
HP_MAX_PTSIZE);
|
|
#else
|
|
kmem_free_wakeup(pt_map, (vaddr_t)pmap->pm_ptab,
|
|
HP_MAX_PTSIZE);
|
|
#endif
|
|
if (pmap->pm_stab != Segtabzero)
|
|
#if defined(UVM)
|
|
uvm_km_free_wakeup(st_map, (vaddr_t)pmap->pm_stab,
|
|
HP_STSIZE);
|
|
#else
|
|
kmem_free_wakeup(st_map, (vaddr_t)pmap->pm_stab,
|
|
HP_STSIZE);
|
|
#endif
|
|
}
|
|
|
|
/*
|
|
* Add a reference to the specified pmap.
|
|
*/
|
|
void
|
|
pmap_reference(pmap)
|
|
pmap_t pmap;
|
|
{
|
|
|
|
if (pmap == NULL)
|
|
return;
|
|
|
|
#ifdef DEBUG
|
|
if (pmapdebug & PDB_FOLLOW)
|
|
printf("pmap_reference(%p)\n", pmap);
|
|
#endif
|
|
|
|
simple_lock(&pmap->pm_lock);
|
|
pmap->pm_count++;
|
|
simple_unlock(&pmap->pm_lock);
|
|
}
|
|
|
|
/*
|
|
* Mark that a processor is about to be used by a given pmap.
|
|
*/
|
|
void
|
|
pmap_activate(p)
|
|
struct proc *p;
|
|
{
|
|
pmap_t pmap = p->p_vmspace->vm_map.pmap;
|
|
|
|
#ifdef DEBUG
|
|
if (pmapdebug & (PDB_FOLLOW|PDB_SEGTAB))
|
|
printf("pmap_activate(%p)\n", p);
|
|
#endif
|
|
|
|
PMAP_ACTIVATE(pmap, p == curproc);
|
|
}
|
|
|
|
/*
|
|
* Mark that a processor is no longer in use by a given pmap.
|
|
*/
|
|
void
|
|
pmap_deactivate(p)
|
|
struct proc *p;
|
|
{
|
|
}
|
|
|
|
/*
|
|
* Remove the given range of addresses from the specified map.
|
|
*
|
|
* It is assumed that the start and end are properly
|
|
* rounded to the page size.
|
|
*/
|
|
void
|
|
pmap_remove(pmap, sva, eva)
|
|
pmap_t pmap;
|
|
vaddr_t sva, eva;
|
|
{
|
|
vaddr_t nssva;
|
|
pt_entry_t *pte;
|
|
boolean_t firstpage, needcflush;
|
|
int flags;
|
|
|
|
#ifdef DEBUG
|
|
if (pmapdebug & (PDB_FOLLOW|PDB_REMOVE|PDB_PROTECT))
|
|
printf("pmap_remove(%p, %lx, %lx)\n", pmap, sva, eva);
|
|
#endif
|
|
|
|
if (pmap == NULL)
|
|
return;
|
|
|
|
#ifdef PMAPSTATS
|
|
remove_stats.calls++;
|
|
#endif
|
|
firstpage = TRUE;
|
|
needcflush = FALSE;
|
|
flags = active_pmap(pmap) ? PRM_TFLUSH : 0;
|
|
while (sva < eva) {
|
|
nssva = m68k_trunc_seg(sva) + HP_SEG_SIZE;
|
|
if (nssva == 0 || nssva > eva)
|
|
nssva = eva;
|
|
/*
|
|
* If VA belongs to an unallocated segment,
|
|
* skip to the next segment boundary.
|
|
*/
|
|
if (!pmap_ste_v(pmap, sva)) {
|
|
sva = nssva;
|
|
continue;
|
|
}
|
|
/*
|
|
* Invalidate every valid mapping within this segment.
|
|
*/
|
|
pte = pmap_pte(pmap, sva);
|
|
while (sva < nssva) {
|
|
if (pmap_pte_v(pte)) {
|
|
#ifdef HAVEVAC
|
|
if (pmap_aliasmask) {
|
|
/*
|
|
* Purge kernel side of VAC to ensure
|
|
* we get the correct state of any
|
|
* hardware maintained bits.
|
|
*/
|
|
if (firstpage) {
|
|
DCIS();
|
|
#ifdef PMAPSTATS
|
|
remove_stats.sflushes++;
|
|
#endif
|
|
}
|
|
/*
|
|
* Remember if we may need to
|
|
* flush the VAC due to a non-CI
|
|
* mapping.
|
|
*/
|
|
if (!needcflush && !pmap_pte_ci(pte))
|
|
needcflush = TRUE;
|
|
|
|
}
|
|
#endif
|
|
pmap_remove_mapping(pmap, sva, pte, flags);
|
|
firstpage = FALSE;
|
|
}
|
|
pte++;
|
|
sva += NBPG;
|
|
}
|
|
}
|
|
/*
|
|
* Didn't do anything, no need for cache flushes
|
|
*/
|
|
if (firstpage)
|
|
return;
|
|
#ifdef HAVEVAC
|
|
/*
|
|
* In a couple of cases, we don't need to worry about flushing
|
|
* the VAC:
|
|
* 1. if this is a kernel mapping,
|
|
* we have already done it
|
|
* 2. if it is a user mapping not for the current process,
|
|
* it won't be there
|
|
*/
|
|
if (pmap_aliasmask && !active_user_pmap(pmap))
|
|
needcflush = FALSE;
|
|
#ifdef DEBUG
|
|
if (pmap_aliasmask && (pmapvacflush & PVF_REMOVE)) {
|
|
if (pmapvacflush & PVF_TOTAL)
|
|
DCIA();
|
|
else if (pmap == pmap_kernel())
|
|
DCIS();
|
|
else
|
|
DCIU();
|
|
} else
|
|
#endif
|
|
if (needcflush) {
|
|
if (pmap == pmap_kernel()) {
|
|
DCIS();
|
|
#ifdef PMAPSTATS
|
|
remove_stats.sflushes++;
|
|
#endif
|
|
} else {
|
|
DCIU();
|
|
#ifdef PMAPSTATS
|
|
remove_stats.uflushes++;
|
|
#endif
|
|
}
|
|
}
|
|
#endif
|
|
}
|
|
|
|
/*
|
|
* pmap_page_protect:
|
|
*
|
|
* Lower the permission for all mappings to a given page.
|
|
*/
|
|
void
|
|
pmap_page_protect(pa, prot)
|
|
paddr_t pa;
|
|
vm_prot_t prot;
|
|
{
|
|
struct pv_entry *pv;
|
|
int s;
|
|
|
|
#ifdef DEBUG
|
|
if ((pmapdebug & (PDB_FOLLOW|PDB_PROTECT)) ||
|
|
(prot == VM_PROT_NONE && (pmapdebug & PDB_REMOVE)))
|
|
printf("pmap_page_protect(%lx, %x)\n", pa, prot);
|
|
#endif
|
|
if (PAGE_IS_MANAGED(pa) == 0)
|
|
return;
|
|
|
|
switch (prot) {
|
|
case VM_PROT_READ|VM_PROT_WRITE:
|
|
case VM_PROT_ALL:
|
|
return;
|
|
/* copy_on_write */
|
|
case VM_PROT_READ:
|
|
case VM_PROT_READ|VM_PROT_EXECUTE:
|
|
pmap_changebit(pa, PG_RO, TRUE);
|
|
return;
|
|
/* remove_all */
|
|
default:
|
|
break;
|
|
}
|
|
pv = pa_to_pvh(pa);
|
|
s = splimp();
|
|
while (pv->pv_pmap != NULL) {
|
|
pt_entry_t *pte;
|
|
|
|
pte = pmap_pte(pv->pv_pmap, pv->pv_va);
|
|
#ifdef DEBUG
|
|
if (!pmap_ste_v(pv->pv_pmap, pv->pv_va) ||
|
|
pmap_pte_pa(pte) != pa)
|
|
panic("pmap_page_protect: bad mapping");
|
|
#endif
|
|
if (!pmap_pte_w(pte))
|
|
pmap_remove_mapping(pv->pv_pmap, pv->pv_va,
|
|
pte, PRM_TFLUSH|PRM_CFLUSH);
|
|
else {
|
|
pv = pv->pv_next;
|
|
#ifdef DEBUG
|
|
if (pmapdebug & PDB_PARANOIA)
|
|
printf("%s wired mapping for %lx not removed\n",
|
|
"pmap_page_protect:", pa);
|
|
#endif
|
|
if (pv == NULL)
|
|
break;
|
|
}
|
|
}
|
|
splx(s);
|
|
}
|
|
|
|
/*
|
|
* Set the physical protection on the
|
|
* specified range of this map as requested.
|
|
*/
|
|
void
|
|
pmap_protect(pmap, sva, eva, prot)
|
|
pmap_t pmap;
|
|
vaddr_t sva, eva;
|
|
vm_prot_t prot;
|
|
{
|
|
vaddr_t nssva;
|
|
pt_entry_t *pte;
|
|
boolean_t firstpage, needtflush;
|
|
int isro;
|
|
|
|
#ifdef DEBUG
|
|
if (pmapdebug & (PDB_FOLLOW|PDB_PROTECT))
|
|
printf("pmap_protect(%p, %lx, %lx, %x)\n", pmap, sva, eva, prot);
|
|
#endif
|
|
|
|
if (pmap == NULL)
|
|
return;
|
|
|
|
#ifdef PMAPSTATS
|
|
protect_stats.calls++;
|
|
#endif
|
|
if ((prot & VM_PROT_READ) == VM_PROT_NONE) {
|
|
pmap_remove(pmap, sva, eva);
|
|
return;
|
|
}
|
|
if (prot & VM_PROT_WRITE)
|
|
return;
|
|
|
|
isro = pte_prot(pmap, prot);
|
|
needtflush = active_pmap(pmap);
|
|
firstpage = TRUE;
|
|
while (sva < eva) {
|
|
nssva = m68k_trunc_seg(sva) + HP_SEG_SIZE;
|
|
if (nssva == 0 || nssva > eva)
|
|
nssva = eva;
|
|
/*
|
|
* If VA belongs to an unallocated segment,
|
|
* skip to the next segment boundary.
|
|
*/
|
|
if (!pmap_ste_v(pmap, sva)) {
|
|
sva = nssva;
|
|
continue;
|
|
}
|
|
/*
|
|
* Change protection on mapping if it is valid and doesn't
|
|
* already have the correct protection.
|
|
*/
|
|
pte = pmap_pte(pmap, sva);
|
|
while (sva < nssva) {
|
|
if (pmap_pte_v(pte) && pmap_pte_prot_chg(pte, isro)) {
|
|
#ifdef HAVEVAC
|
|
/*
|
|
* Purge kernel side of VAC to ensure we
|
|
* get the correct state of any hardware
|
|
* maintained bits.
|
|
*
|
|
* XXX do we need to clear the VAC in
|
|
* general to reflect the new protection?
|
|
*/
|
|
if (firstpage && pmap_aliasmask)
|
|
DCIS();
|
|
#endif
|
|
#if defined(M68040)
|
|
/*
|
|
* Clear caches if making RO (see section
|
|
* "7.3 Cache Coherency" in the manual).
|
|
*/
|
|
if (isro && mmutype == MMU_68040) {
|
|
paddr_t pa = pmap_pte_pa(pte);
|
|
|
|
DCFP(pa);
|
|
ICPP(pa);
|
|
}
|
|
#endif
|
|
pmap_pte_set_prot(pte, isro);
|
|
if (needtflush)
|
|
TBIS(sva);
|
|
#ifdef PMAPSTATS
|
|
protect_stats.changed++;
|
|
#endif
|
|
firstpage = FALSE;
|
|
}
|
|
#ifdef PMAPSTATS
|
|
else if (pmap_pte_v(pte)) {
|
|
if (isro)
|
|
protect_stats.alreadyro++;
|
|
else
|
|
protect_stats.alreadyrw++;
|
|
}
|
|
#endif
|
|
pte++;
|
|
sva += NBPG;
|
|
}
|
|
}
|
|
#if defined(HAVEVAC) && defined(DEBUG)
|
|
if (pmap_aliasmask && (pmapvacflush & PVF_PROTECT)) {
|
|
if (pmapvacflush & PVF_TOTAL)
|
|
DCIA();
|
|
else if (pmap == pmap_kernel())
|
|
DCIS();
|
|
else
|
|
DCIU();
|
|
}
|
|
#endif
|
|
}
|
|
|
|
/*
|
|
* Insert the given physical page (p) at
|
|
* the specified virtual address (v) in the
|
|
* target physical map with the protection requested.
|
|
*
|
|
* If specified, the page will be wired down, meaning
|
|
* that the related pte can not be reclaimed.
|
|
*
|
|
* NB: This is the only routine which MAY NOT lazy-evaluate
|
|
* or lose information. That is, this routine must actually
|
|
* insert this page into the given map NOW.
|
|
*/
|
|
void
|
|
pmap_enter(pmap, va, pa, prot, wired)
|
|
pmap_t pmap;
|
|
vaddr_t va;
|
|
paddr_t pa;
|
|
vm_prot_t prot;
|
|
boolean_t wired;
|
|
{
|
|
pt_entry_t *pte;
|
|
int npte;
|
|
paddr_t opa;
|
|
boolean_t cacheable = TRUE;
|
|
boolean_t checkpv = TRUE;
|
|
|
|
#ifdef DEBUG
|
|
if (pmapdebug & (PDB_FOLLOW|PDB_ENTER))
|
|
printf("pmap_enter(%p, %lx, %lx, %x, %x)\n",
|
|
pmap, va, pa, prot, wired);
|
|
#endif
|
|
if (pmap == NULL)
|
|
return;
|
|
|
|
#ifdef PMAPSTATS
|
|
if (pmap == pmap_kernel())
|
|
enter_stats.kernel++;
|
|
else
|
|
enter_stats.user++;
|
|
#endif
|
|
/*
|
|
* For user mapping, allocate kernel VM resources if necessary.
|
|
*/
|
|
if (pmap->pm_ptab == NULL)
|
|
#if defined(UVM)
|
|
pmap->pm_ptab = (pt_entry_t *)
|
|
uvm_km_valloc_wait(pt_map, HP_MAX_PTSIZE);
|
|
#else
|
|
pmap->pm_ptab = (pt_entry_t *)
|
|
kmem_alloc_wait(pt_map, HP_MAX_PTSIZE);
|
|
#endif
|
|
|
|
/*
|
|
* Segment table entry not valid, we need a new PT page
|
|
*/
|
|
if (!pmap_ste_v(pmap, va))
|
|
pmap_enter_ptpage(pmap, va);
|
|
|
|
pa = m68k_trunc_page(pa);
|
|
pte = pmap_pte(pmap, va);
|
|
opa = pmap_pte_pa(pte);
|
|
#ifdef DEBUG
|
|
if (pmapdebug & PDB_ENTER)
|
|
printf("enter: pte %p, *pte %x\n", pte, *pte);
|
|
#endif
|
|
|
|
/*
|
|
* Mapping has not changed, must be protection or wiring change.
|
|
*/
|
|
if (opa == pa) {
|
|
#ifdef PMAPSTATS
|
|
enter_stats.pwchange++;
|
|
#endif
|
|
/*
|
|
* Wiring change, just update stats.
|
|
* We don't worry about wiring PT pages as they remain
|
|
* resident as long as there are valid mappings in them.
|
|
* Hence, if a user page is wired, the PT page will be also.
|
|
*/
|
|
if (pmap_pte_w_chg(pte, wired ? PG_W : 0)) {
|
|
#ifdef DEBUG
|
|
if (pmapdebug & PDB_ENTER)
|
|
printf("enter: wiring change -> %x\n", wired);
|
|
#endif
|
|
if (wired)
|
|
pmap->pm_stats.wired_count++;
|
|
else
|
|
pmap->pm_stats.wired_count--;
|
|
#ifdef PMAPSTATS
|
|
if (pmap_pte_prot(pte) == pte_prot(pmap, prot))
|
|
enter_stats.wchange++;
|
|
#endif
|
|
}
|
|
#ifdef PMAPSTATS
|
|
else if (pmap_pte_prot(pte) != pte_prot(pmap, prot))
|
|
enter_stats.pchange++;
|
|
else
|
|
enter_stats.nochange++;
|
|
#endif
|
|
/*
|
|
* Retain cache inhibition status
|
|
*/
|
|
checkpv = FALSE;
|
|
if (pmap_pte_ci(pte))
|
|
cacheable = FALSE;
|
|
goto validate;
|
|
}
|
|
|
|
/*
|
|
* Mapping has changed, invalidate old range and fall through to
|
|
* handle validating new mapping.
|
|
*/
|
|
if (opa) {
|
|
#ifdef DEBUG
|
|
if (pmapdebug & PDB_ENTER)
|
|
printf("enter: removing old mapping %lx\n", va);
|
|
#endif
|
|
pmap_remove_mapping(pmap, va, pte, PRM_TFLUSH|PRM_CFLUSH);
|
|
#ifdef PMAPSTATS
|
|
enter_stats.mchange++;
|
|
#endif
|
|
}
|
|
|
|
/*
|
|
* If this is a new user mapping, increment the wiring count
|
|
* on this PT page. PT pages are wired down as long as there
|
|
* is a valid mapping in the page.
|
|
*/
|
|
if (pmap != pmap_kernel())
|
|
#if defined(UVM)
|
|
(void) uvm_map_pageable(pt_map, trunc_page(pte),
|
|
round_page(pte+1), FALSE);
|
|
#else
|
|
(void) vm_map_pageable(pt_map, trunc_page(pte),
|
|
round_page(pte+1), FALSE);
|
|
#endif
|
|
|
|
/*
|
|
* Enter on the PV list if part of our managed memory
|
|
* Note that we raise IPL while manipulating pv_table
|
|
* since pmap_enter can be called at interrupt time.
|
|
*/
|
|
if (PAGE_IS_MANAGED(pa)) {
|
|
struct pv_entry *pv, *npv;
|
|
int s;
|
|
|
|
#ifdef PMAPSTATS
|
|
enter_stats.managed++;
|
|
#endif
|
|
pv = pa_to_pvh(pa);
|
|
s = splimp();
|
|
#ifdef DEBUG
|
|
if (pmapdebug & PDB_ENTER)
|
|
printf("enter: pv at %p: %lx/%p/%p\n",
|
|
pv, pv->pv_va, pv->pv_pmap, pv->pv_next);
|
|
#endif
|
|
/*
|
|
* No entries yet, use header as the first entry
|
|
*/
|
|
if (pv->pv_pmap == NULL) {
|
|
#ifdef PMAPSTATS
|
|
enter_stats.firstpv++;
|
|
#endif
|
|
pv->pv_va = va;
|
|
pv->pv_pmap = pmap;
|
|
pv->pv_next = NULL;
|
|
pv->pv_ptste = NULL;
|
|
pv->pv_ptpmap = NULL;
|
|
pv->pv_flags = 0;
|
|
}
|
|
/*
|
|
* There is at least one other VA mapping this page.
|
|
* Place this entry after the header.
|
|
*/
|
|
else {
|
|
#ifdef DEBUG
|
|
for (npv = pv; npv; npv = npv->pv_next)
|
|
if (pmap == npv->pv_pmap && va == npv->pv_va)
|
|
panic("pmap_enter: already in pv_tab");
|
|
#endif
|
|
npv = pmap_alloc_pv();
|
|
npv->pv_va = va;
|
|
npv->pv_pmap = pmap;
|
|
npv->pv_next = pv->pv_next;
|
|
npv->pv_ptste = NULL;
|
|
npv->pv_ptpmap = NULL;
|
|
npv->pv_flags = 0;
|
|
pv->pv_next = npv;
|
|
#ifdef PMAPSTATS
|
|
if (!npv->pv_next)
|
|
enter_stats.secondpv++;
|
|
#endif
|
|
#ifdef HAVEVAC
|
|
/*
|
|
* Since there is another logical mapping for the
|
|
* same page we may need to cache-inhibit the
|
|
* descriptors on those CPUs with external VACs.
|
|
* We don't need to CI if:
|
|
*
|
|
* - No two mappings belong to the same user pmaps.
|
|
* Since the cache is flushed on context switches
|
|
* there is no problem between user processes.
|
|
*
|
|
* - Mappings within a single pmap are a certain
|
|
* magic distance apart. VAs at these appropriate
|
|
* boundaries map to the same cache entries or
|
|
* otherwise don't conflict.
|
|
*
|
|
* To keep it simple, we only check for these special
|
|
* cases if there are only two mappings, otherwise we
|
|
* punt and always CI.
|
|
*
|
|
* Note that there are no aliasing problems with the
|
|
* on-chip data-cache when the WA bit is set.
|
|
*/
|
|
if (pmap_aliasmask) {
|
|
if (pv->pv_flags & PV_CI) {
|
|
#ifdef DEBUG
|
|
if (pmapdebug & PDB_CACHE)
|
|
printf("enter: pa %lx already CI'ed\n",
|
|
pa);
|
|
#endif
|
|
checkpv = cacheable = FALSE;
|
|
} else if (npv->pv_next ||
|
|
((pmap == pv->pv_pmap ||
|
|
pmap == pmap_kernel() ||
|
|
pv->pv_pmap == pmap_kernel()) &&
|
|
((pv->pv_va & pmap_aliasmask) !=
|
|
(va & pmap_aliasmask)))) {
|
|
#ifdef DEBUG
|
|
if (pmapdebug & PDB_CACHE)
|
|
printf("enter: pa %lx CI'ing all\n",
|
|
pa);
|
|
#endif
|
|
cacheable = FALSE;
|
|
pv->pv_flags |= PV_CI;
|
|
#ifdef PMAPSTATS
|
|
enter_stats.ci++;
|
|
#endif
|
|
}
|
|
}
|
|
#endif
|
|
}
|
|
splx(s);
|
|
}
|
|
/*
|
|
* Assumption: if it is not part of our managed memory
|
|
* then it must be device memory which may be volitile.
|
|
*/
|
|
else if (pmap_initialized) {
|
|
checkpv = cacheable = FALSE;
|
|
#ifdef PMAPSTATS
|
|
enter_stats.unmanaged++;
|
|
#endif
|
|
}
|
|
|
|
/*
|
|
* Increment counters
|
|
*/
|
|
pmap->pm_stats.resident_count++;
|
|
if (wired)
|
|
pmap->pm_stats.wired_count++;
|
|
|
|
validate:
|
|
#ifdef HAVEVAC
|
|
/*
|
|
* Purge kernel side of VAC to ensure we get correct state
|
|
* of HW bits so we don't clobber them.
|
|
*/
|
|
if (pmap_aliasmask)
|
|
DCIS();
|
|
#endif
|
|
/*
|
|
* Build the new PTE.
|
|
*/
|
|
npte = pa | pte_prot(pmap, prot) | (*pte & (PG_M|PG_U)) | PG_V;
|
|
if (wired)
|
|
npte |= PG_W;
|
|
if (!checkpv && !cacheable)
|
|
npte |= PG_CI;
|
|
#if defined(M68040)
|
|
if (mmutype == MMU_68040 && (npte & (PG_PROT|PG_CI)) == PG_RW)
|
|
#ifdef DEBUG
|
|
if (dowriteback && (dokwriteback || pmap != pmap_kernel()))
|
|
#endif
|
|
npte |= PG_CCB;
|
|
#endif
|
|
#ifdef DEBUG
|
|
if (pmapdebug & PDB_ENTER)
|
|
printf("enter: new pte value %x\n", npte);
|
|
#endif
|
|
/*
|
|
* Remember if this was a wiring-only change.
|
|
* If so, we need not flush the TLB and caches.
|
|
*/
|
|
wired = ((*pte ^ npte) == PG_W);
|
|
#if defined(M68040)
|
|
if (mmutype == MMU_68040 && !wired) {
|
|
DCFP(pa);
|
|
ICPP(pa);
|
|
}
|
|
#endif
|
|
*pte = npte;
|
|
if (!wired && active_pmap(pmap))
|
|
TBIS(va);
|
|
#ifdef HAVEVAC
|
|
/*
|
|
* The following is executed if we are entering a second
|
|
* (or greater) mapping for a physical page and the mappings
|
|
* may create an aliasing problem. In this case we must
|
|
* cache inhibit the descriptors involved and flush any
|
|
* external VAC.
|
|
*/
|
|
if (checkpv && !cacheable) {
|
|
pmap_changebit(pa, PG_CI, TRUE);
|
|
DCIA();
|
|
#ifdef PMAPSTATS
|
|
enter_stats.flushes++;
|
|
#endif
|
|
#ifdef DEBUG
|
|
if ((pmapdebug & (PDB_CACHE|PDB_PVDUMP)) ==
|
|
(PDB_CACHE|PDB_PVDUMP))
|
|
pmap_pvdump(pa);
|
|
#endif
|
|
}
|
|
#ifdef DEBUG
|
|
else if (pmapvacflush & PVF_ENTER) {
|
|
if (pmapvacflush & PVF_TOTAL)
|
|
DCIA();
|
|
else if (pmap == pmap_kernel())
|
|
DCIS();
|
|
else
|
|
DCIU();
|
|
}
|
|
#endif
|
|
#endif
|
|
#ifdef DEBUG
|
|
if ((pmapdebug & PDB_WIRING) && pmap != pmap_kernel())
|
|
pmap_check_wiring("enter", trunc_page(pmap_pte(pmap, va)));
|
|
#endif
|
|
}
|
|
|
|
/*
|
|
* Routine: pmap_change_wiring
|
|
* Function: Change the wiring attribute for a map/virtual-address
|
|
* pair.
|
|
* In/out conditions:
|
|
* The mapping must already exist in the pmap.
|
|
*/
|
|
void
|
|
pmap_change_wiring(pmap, va, wired)
|
|
pmap_t pmap;
|
|
vaddr_t va;
|
|
boolean_t wired;
|
|
{
|
|
pt_entry_t *pte;
|
|
|
|
#ifdef DEBUG
|
|
if (pmapdebug & PDB_FOLLOW)
|
|
printf("pmap_change_wiring(%p, %lx, %x)\n", pmap, va, wired);
|
|
#endif
|
|
if (pmap == NULL)
|
|
return;
|
|
|
|
pte = pmap_pte(pmap, va);
|
|
#ifdef DEBUG
|
|
/*
|
|
* Page table page is not allocated.
|
|
* Should this ever happen? Ignore it for now,
|
|
* we don't want to force allocation of unnecessary PTE pages.
|
|
*/
|
|
if (!pmap_ste_v(pmap, va)) {
|
|
if (pmapdebug & PDB_PARANOIA)
|
|
printf("pmap_change_wiring: invalid STE for %lx\n", va);
|
|
return;
|
|
}
|
|
/*
|
|
* Page not valid. Should this ever happen?
|
|
* Just continue and change wiring anyway.
|
|
*/
|
|
if (!pmap_pte_v(pte)) {
|
|
if (pmapdebug & PDB_PARANOIA)
|
|
printf("pmap_change_wiring: invalid PTE for %lx\n", va);
|
|
}
|
|
#endif
|
|
/*
|
|
* If wiring actually changed (always?) set the wire bit and
|
|
* update the wire count. Note that wiring is not a hardware
|
|
* characteristic so there is no need to invalidate the TLB.
|
|
*/
|
|
if (pmap_pte_w_chg(pte, wired ? PG_W : 0)) {
|
|
pmap_pte_set_w(pte, wired);
|
|
if (wired)
|
|
pmap->pm_stats.wired_count++;
|
|
else
|
|
pmap->pm_stats.wired_count--;
|
|
}
|
|
}
|
|
|
|
/*
|
|
* Routine: pmap_extract
|
|
* Function:
|
|
* Extract the physical page address associated
|
|
* with the given map/virtual_address pair.
|
|
*/
|
|
|
|
paddr_t
|
|
pmap_extract(pmap, va)
|
|
pmap_t pmap;
|
|
vaddr_t va;
|
|
{
|
|
paddr_t pa;
|
|
|
|
#ifdef DEBUG
|
|
if (pmapdebug & PDB_FOLLOW)
|
|
printf("pmap_extract(%p, %lx) -> ", pmap, va);
|
|
#endif
|
|
pa = 0;
|
|
if (pmap && pmap_ste_v(pmap, va))
|
|
pa = *pmap_pte(pmap, va);
|
|
if (pa)
|
|
pa = (pa & PG_FRAME) | (va & ~PG_FRAME);
|
|
#ifdef DEBUG
|
|
if (pmapdebug & PDB_FOLLOW)
|
|
printf("%lx\n", pa);
|
|
#endif
|
|
return(pa);
|
|
}
|
|
|
|
/*
|
|
* Copy the range specified by src_addr/len
|
|
* from the source map to the range dst_addr/len
|
|
* in the destination map.
|
|
*
|
|
* This routine is only advisory and need not do anything.
|
|
*/
|
|
void pmap_copy(dst_pmap, src_pmap, dst_addr, len, src_addr)
|
|
pmap_t dst_pmap;
|
|
pmap_t src_pmap;
|
|
vaddr_t dst_addr;
|
|
vsize_t len;
|
|
vaddr_t src_addr;
|
|
{
|
|
#ifdef DEBUG
|
|
if (pmapdebug & PDB_FOLLOW)
|
|
printf("pmap_copy(%p, %p, %lx, %lx, %lx)\n",
|
|
dst_pmap, src_pmap, dst_addr, len, src_addr);
|
|
#endif
|
|
}
|
|
|
|
/*
|
|
* Require that all active physical maps contain no
|
|
* incorrect entries NOW. [This update includes
|
|
* forcing updates of any address map caching.]
|
|
*
|
|
* Generally used to insure that a thread about
|
|
* to run will see a semantically correct world.
|
|
*/
|
|
void pmap_update()
|
|
{
|
|
#ifdef DEBUG
|
|
if (pmapdebug & PDB_FOLLOW)
|
|
printf("pmap_update()\n");
|
|
#endif
|
|
#if (defined(M68020)||defined(M68040)||defined(M68060))
|
|
TBIA();
|
|
#endif
|
|
}
|
|
|
|
/*
|
|
* Routine: pmap_collect
|
|
* Function:
|
|
* Garbage collects the physical map system for
|
|
* pages which are no longer used.
|
|
* Success need not be guaranteed -- that is, there
|
|
* may well be pages which are not referenced, but
|
|
* others may be collected.
|
|
* Usage:
|
|
* Called by the pageout daemon when pages are scarce.
|
|
*/
|
|
void
|
|
pmap_collect(pmap)
|
|
pmap_t pmap;
|
|
{
|
|
int bank, s;
|
|
|
|
if (pmap != pmap_kernel())
|
|
return;
|
|
|
|
#ifdef DEBUG
|
|
if (pmapdebug & PDB_FOLLOW)
|
|
printf("pmap_collect(%p)\n", pmap);
|
|
#endif
|
|
#ifdef PMAPSTATS
|
|
kpt_stats.collectscans++;
|
|
#endif
|
|
s = splimp();
|
|
for (bank = 0; bank < vm_nphysseg; bank++)
|
|
pmap_collect1(pmap, ptoa(vm_physmem[bank].start),
|
|
ptoa(vm_physmem[bank].end));
|
|
splx(s);
|
|
|
|
#ifdef notyet
|
|
/* Go compact and garbage-collect the pv_table */
|
|
pmap_collect_pv();
|
|
#endif
|
|
}
|
|
|
|
/*
|
|
* Routine: pmap_collect1()
|
|
*
|
|
* Function:
|
|
* Helper function for pmap_collect(). Do the actual
|
|
* garbage-collection of range of physical addresses.
|
|
*/
|
|
void
|
|
pmap_collect1(pmap, startpa, endpa)
|
|
pmap_t pmap;
|
|
paddr_t startpa, endpa;
|
|
{
|
|
paddr_t pa;
|
|
struct pv_entry *pv;
|
|
pt_entry_t *pte;
|
|
paddr_t kpa;
|
|
#ifdef DEBUG
|
|
st_entry_t *ste;
|
|
int opmapdebug = 0 /* XXX initialize to quiet gcc -Wall */;
|
|
#endif
|
|
|
|
for (pa = startpa; pa < endpa; pa += NBPG) {
|
|
struct kpt_page *kpt, **pkpt;
|
|
|
|
/*
|
|
* Locate physical pages which are being used as kernel
|
|
* page table pages.
|
|
*/
|
|
pv = pa_to_pvh(pa);
|
|
if (pv->pv_pmap != pmap_kernel() || !(pv->pv_flags & PV_PTPAGE))
|
|
continue;
|
|
do {
|
|
if (pv->pv_ptste && pv->pv_ptpmap == pmap_kernel())
|
|
break;
|
|
} while ((pv = pv->pv_next));
|
|
if (pv == NULL)
|
|
continue;
|
|
#ifdef DEBUG
|
|
if (pv->pv_va < (vaddr_t)Sysmap ||
|
|
pv->pv_va >= (vaddr_t)Sysmap + HP_MAX_PTSIZE)
|
|
printf("collect: kernel PT VA out of range\n");
|
|
else
|
|
goto ok;
|
|
pmap_pvdump(pa);
|
|
continue;
|
|
ok:
|
|
#endif
|
|
pte = (pt_entry_t *)(pv->pv_va + NBPG);
|
|
while (--pte >= (pt_entry_t *)pv->pv_va && *pte == PG_NV)
|
|
;
|
|
if (pte >= (pt_entry_t *)pv->pv_va)
|
|
continue;
|
|
|
|
#ifdef DEBUG
|
|
if (pmapdebug & (PDB_PTPAGE|PDB_COLLECT)) {
|
|
printf("collect: freeing KPT page at %lx (ste %x@%p)\n",
|
|
pv->pv_va, *pv->pv_ptste, pv->pv_ptste);
|
|
opmapdebug = pmapdebug;
|
|
pmapdebug |= PDB_PTPAGE;
|
|
}
|
|
|
|
ste = pv->pv_ptste;
|
|
#endif
|
|
/*
|
|
* If all entries were invalid we can remove the page.
|
|
* We call pmap_remove_entry to take care of invalidating
|
|
* ST and Sysptmap entries.
|
|
*/
|
|
kpa = pmap_extract(pmap, pv->pv_va);
|
|
pmap_remove_mapping(pmap, pv->pv_va, PT_ENTRY_NULL,
|
|
PRM_TFLUSH|PRM_CFLUSH);
|
|
/*
|
|
* Use the physical address to locate the original
|
|
* (kmem_alloc assigned) address for the page and put
|
|
* that page back on the free list.
|
|
*/
|
|
for (pkpt = &kpt_used_list, kpt = *pkpt;
|
|
kpt != (struct kpt_page *)0;
|
|
pkpt = &kpt->kpt_next, kpt = *pkpt)
|
|
if (kpt->kpt_pa == kpa)
|
|
break;
|
|
#ifdef DEBUG
|
|
if (kpt == (struct kpt_page *)0)
|
|
panic("pmap_collect: lost a KPT page");
|
|
if (pmapdebug & (PDB_PTPAGE|PDB_COLLECT))
|
|
printf("collect: %lx (%lx) to free list\n",
|
|
kpt->kpt_va, kpa);
|
|
#endif
|
|
*pkpt = kpt->kpt_next;
|
|
kpt->kpt_next = kpt_free_list;
|
|
kpt_free_list = kpt;
|
|
#ifdef PMAPSTATS
|
|
kpt_stats.kptinuse--;
|
|
kpt_stats.collectpages++;
|
|
#endif
|
|
#ifdef DEBUG
|
|
if (pmapdebug & (PDB_PTPAGE|PDB_COLLECT))
|
|
pmapdebug = opmapdebug;
|
|
|
|
if (*ste != SG_NV)
|
|
printf("collect: kernel STE at %p still valid (%x)\n",
|
|
ste, *ste);
|
|
ste = &Sysptmap[ste - pmap_ste(pmap_kernel(), 0)];
|
|
if (*ste != SG_NV)
|
|
printf("collect: kernel PTmap at %p still valid (%x)\n",
|
|
ste, *ste);
|
|
#endif
|
|
}
|
|
}
|
|
|
|
/*
|
|
* pmap_zero_page zeros the specified (machine independent)
|
|
* page by mapping the page into virtual memory and using
|
|
* bzero to clear its contents, one machine dependent page
|
|
* at a time.
|
|
*
|
|
* XXX this is a bad implementation for virtual cache machines
|
|
* (320/350) because pmap_enter doesn't cache-inhibit the temporary
|
|
* kernel mapping and we wind up with data cached for that KVA.
|
|
* It is probably a win for physical cache machines (370/380)
|
|
* as the cache loading is not wasted.
|
|
*/
|
|
void
|
|
pmap_zero_page(phys)
|
|
paddr_t phys;
|
|
{
|
|
vaddr_t kva;
|
|
extern caddr_t CADDR1;
|
|
|
|
#ifdef DEBUG
|
|
if (pmapdebug & PDB_FOLLOW)
|
|
printf("pmap_zero_page(%lx)\n", phys);
|
|
#endif
|
|
kva = (vaddr_t) CADDR1;
|
|
pmap_enter(pmap_kernel(), kva, phys, VM_PROT_READ|VM_PROT_WRITE, TRUE);
|
|
zeropage((caddr_t)kva);
|
|
pmap_remove_mapping(pmap_kernel(), kva, PT_ENTRY_NULL,
|
|
PRM_TFLUSH|PRM_CFLUSH);
|
|
}
|
|
|
|
/*
|
|
* pmap_copy_page copies the specified (machine independent)
|
|
* page by mapping the page into virtual memory and using
|
|
* bcopy to copy the page, one machine dependent page at a
|
|
* time.
|
|
*
|
|
*
|
|
* XXX this is a bad implementation for virtual cache machines
|
|
* (320/350) because pmap_enter doesn't cache-inhibit the temporary
|
|
* kernel mapping and we wind up with data cached for that KVA.
|
|
* It is probably a win for physical cache machines (370/380)
|
|
* as the cache loading is not wasted.
|
|
*/
|
|
void
|
|
pmap_copy_page(src, dst)
|
|
paddr_t src, dst;
|
|
{
|
|
vaddr_t skva, dkva;
|
|
extern caddr_t CADDR1, CADDR2;
|
|
|
|
#ifdef DEBUG
|
|
if (pmapdebug & PDB_FOLLOW)
|
|
printf("pmap_copy_page(%lx, %lx)\n", src, dst);
|
|
#endif
|
|
skva = (vaddr_t) CADDR1;
|
|
dkva = (vaddr_t) CADDR2;
|
|
pmap_enter(pmap_kernel(), skva, src, VM_PROT_READ, TRUE);
|
|
pmap_enter(pmap_kernel(), dkva, dst, VM_PROT_READ|VM_PROT_WRITE, TRUE);
|
|
copypage((caddr_t)skva, (caddr_t)dkva);
|
|
/* CADDR1 and CADDR2 are virtually contiguous */
|
|
pmap_remove(pmap_kernel(), skva, skva + (2 * NBPG));
|
|
}
|
|
|
|
/*
|
|
* Routine: pmap_pageable
|
|
* Function:
|
|
* Make the specified pages (by pmap, offset)
|
|
* pageable (or not) as requested.
|
|
*
|
|
* A page which is not pageable may not take
|
|
* a fault; therefore, its page table entry
|
|
* must remain valid for the duration.
|
|
*
|
|
* This routine is merely advisory; pmap_enter
|
|
* will specify that these pages are to be wired
|
|
* down (or not) as appropriate.
|
|
*/
|
|
void
|
|
pmap_pageable(pmap, sva, eva, pageable)
|
|
pmap_t pmap;
|
|
vaddr_t sva, eva;
|
|
boolean_t pageable;
|
|
{
|
|
#ifdef DEBUG
|
|
if (pmapdebug & PDB_FOLLOW)
|
|
printf("pmap_pageable(%p, %lx, %lx, %lx)\n",
|
|
pmap, sva, eva, pageable);
|
|
#endif
|
|
/*
|
|
* If we are making a PT page pageable then all valid
|
|
* mappings must be gone from that page. Hence it should
|
|
* be all zeros and there is no need to clean it.
|
|
* Assumptions:
|
|
* - we are called with only one page at a time
|
|
* - PT pages have only one pv_table entry
|
|
*/
|
|
if (pmap == pmap_kernel() && pageable && sva + NBPG == eva) {
|
|
struct pv_entry *pv;
|
|
paddr_t pa;
|
|
|
|
#ifdef DEBUG
|
|
if ((pmapdebug & (PDB_FOLLOW|PDB_PTPAGE)) == PDB_PTPAGE)
|
|
printf("pmap_pageable(%p, %lx, %lx, %x)\n",
|
|
pmap, sva, eva, pageable);
|
|
#endif
|
|
if (!pmap_ste_v(pmap, sva))
|
|
return;
|
|
pa = pmap_pte_pa(pmap_pte(pmap, sva));
|
|
if (PAGE_IS_MANAGED(pa) == 0)
|
|
return;
|
|
pv = pa_to_pvh(pa);
|
|
if (pv->pv_ptste == NULL)
|
|
return;
|
|
#ifdef DEBUG
|
|
if (pv->pv_va != sva || pv->pv_next) {
|
|
printf("pmap_pageable: bad PT page va %lx next %p\n",
|
|
pv->pv_va, pv->pv_next);
|
|
return;
|
|
}
|
|
#endif
|
|
/*
|
|
* Mark it unmodified to avoid pageout
|
|
*/
|
|
pmap_changebit(pa, PG_M, FALSE);
|
|
#ifdef DEBUG
|
|
if ((PHYS_TO_VM_PAGE(pa)->flags & PG_CLEAN) == 0) {
|
|
printf("pa %lx: flags=%x: not clean\n",
|
|
pa, PHYS_TO_VM_PAGE(pa)->flags);
|
|
PHYS_TO_VM_PAGE(pa)->flags |= PG_CLEAN;
|
|
}
|
|
if (pmapdebug & PDB_PTPAGE)
|
|
printf("pmap_pageable: PT page %lx(%x) unmodified\n",
|
|
sva, *pmap_pte(pmap, sva));
|
|
if (pmapdebug & PDB_WIRING)
|
|
pmap_check_wiring("pageable", sva);
|
|
#endif
|
|
}
|
|
}
|
|
|
|
/*
|
|
* Clear the modify bits on the specified physical page.
|
|
*/
|
|
|
|
void
|
|
pmap_clear_modify(pa)
|
|
paddr_t pa;
|
|
{
|
|
#ifdef DEBUG
|
|
if (pmapdebug & PDB_FOLLOW)
|
|
printf("pmap_clear_modify(%lx)\n", pa);
|
|
#endif
|
|
pmap_changebit(pa, PG_M, FALSE);
|
|
}
|
|
|
|
/*
|
|
* pmap_clear_reference:
|
|
*
|
|
* Clear the reference bit on the specified physical page.
|
|
*/
|
|
|
|
void pmap_clear_reference(pa)
|
|
paddr_t pa;
|
|
{
|
|
#ifdef DEBUG
|
|
if (pmapdebug & PDB_FOLLOW)
|
|
printf("pmap_clear_reference(%lx)\n", pa);
|
|
#endif
|
|
pmap_changebit(pa, PG_U, FALSE);
|
|
}
|
|
|
|
/*
|
|
* pmap_is_referenced:
|
|
*
|
|
* Return whether or not the specified physical page is referenced
|
|
* by any physical maps.
|
|
*/
|
|
|
|
boolean_t
|
|
pmap_is_referenced(pa)
|
|
paddr_t pa;
|
|
{
|
|
#ifdef DEBUG
|
|
if (pmapdebug & PDB_FOLLOW) {
|
|
boolean_t rv = pmap_testbit(pa, PG_U);
|
|
printf("pmap_is_referenced(%lx) -> %c\n", pa, "FT"[rv]);
|
|
return(rv);
|
|
}
|
|
#endif
|
|
return(pmap_testbit(pa, PG_U));
|
|
}
|
|
|
|
/*
|
|
* pmap_is_modified:
|
|
*
|
|
* Return whether or not the specified physical page is modified
|
|
* by any physical maps.
|
|
*/
|
|
|
|
boolean_t
|
|
pmap_is_modified(pa)
|
|
paddr_t pa;
|
|
{
|
|
#ifdef DEBUG
|
|
if (pmapdebug & PDB_FOLLOW) {
|
|
boolean_t rv = pmap_testbit(pa, PG_M);
|
|
printf("pmap_is_modified(%lx) -> %c\n", pa, "FT"[rv]);
|
|
return(rv);
|
|
}
|
|
#endif
|
|
return(pmap_testbit(pa, PG_M));
|
|
}
|
|
|
|
paddr_t
|
|
pmap_phys_address(ppn)
|
|
int ppn;
|
|
{
|
|
return(m68k_ptob(ppn));
|
|
}
|
|
|
|
#ifdef COMPAT_HPUX
|
|
/*
|
|
* 'PUX hack for dealing with the so called multi-mapped address space.
|
|
* The first 256mb is mapped in at every 256mb region from 0x10000000
|
|
* up to 0xF0000000. This allows for 15 bits of tag information.
|
|
*
|
|
* We implement this at the segment table level, the machine independent
|
|
* VM knows nothing about it.
|
|
*/
|
|
int
|
|
pmap_mapmulti(pmap, va)
|
|
pmap_t pmap;
|
|
vaddr_t va;
|
|
{
|
|
st_entry_t *ste, *bste;
|
|
|
|
#ifdef DEBUG
|
|
if (pmapdebug & PDB_MULTIMAP) {
|
|
ste = pmap_ste(pmap, HPMMBASEADDR(va));
|
|
printf("pmap_mapmulti(%p, %lx): bste %p(%x)",
|
|
pmap, va, ste, *ste);
|
|
ste = pmap_ste(pmap, va);
|
|
printf(" ste %p(%x)\n", ste, *ste);
|
|
}
|
|
#endif
|
|
bste = pmap_ste(pmap, HPMMBASEADDR(va));
|
|
ste = pmap_ste(pmap, va);
|
|
if (*ste == SG_NV && (*bste & SG_V)) {
|
|
*ste = *bste;
|
|
TBIAU();
|
|
return (KERN_SUCCESS);
|
|
}
|
|
return (KERN_INVALID_ADDRESS);
|
|
}
|
|
#endif
|
|
|
|
/*
|
|
* Miscellaneous support routines follow
|
|
*/
|
|
|
|
/*
|
|
* Invalidate a single page denoted by pmap/va.
|
|
* If (pte != NULL), it is the already computed PTE for the page.
|
|
* If (flags & PRM_TFLUSH), we must invalidate any TLB information.
|
|
* If (flags & PRM_CFLUSH), we must flush/invalidate any cache information.
|
|
*/
|
|
/* static */
|
|
void
|
|
pmap_remove_mapping(pmap, va, pte, flags)
|
|
pmap_t pmap;
|
|
vaddr_t va;
|
|
pt_entry_t *pte;
|
|
int flags;
|
|
{
|
|
paddr_t pa;
|
|
struct pv_entry *pv, *npv;
|
|
pmap_t ptpmap;
|
|
st_entry_t *ste;
|
|
int s, bits;
|
|
#ifdef DEBUG
|
|
pt_entry_t opte;
|
|
|
|
if (pmapdebug & (PDB_FOLLOW|PDB_REMOVE|PDB_PROTECT))
|
|
printf("pmap_remove_mapping(%p, %lx, %p, %x)\n",
|
|
pmap, va, pte, flags);
|
|
#endif
|
|
|
|
/*
|
|
* PTE not provided, compute it from pmap and va.
|
|
*/
|
|
if (pte == PT_ENTRY_NULL) {
|
|
pte = pmap_pte(pmap, va);
|
|
if (*pte == PG_NV)
|
|
return;
|
|
}
|
|
#ifdef HAVEVAC
|
|
if (pmap_aliasmask && (flags & PRM_CFLUSH)) {
|
|
/*
|
|
* Purge kernel side of VAC to ensure we get the correct
|
|
* state of any hardware maintained bits.
|
|
*/
|
|
DCIS();
|
|
#ifdef PMAPSTATS
|
|
remove_stats.sflushes++;
|
|
#endif
|
|
/*
|
|
* If this is a non-CI user mapping for the current process,
|
|
* flush the VAC. Note that the kernel side was flushed
|
|
* above so we don't worry about non-CI kernel mappings.
|
|
*/
|
|
if (active_user_pmap(pmap) && !pmap_pte_ci(pte)) {
|
|
DCIU();
|
|
#ifdef PMAPSTATS
|
|
remove_stats.uflushes++;
|
|
#endif
|
|
}
|
|
}
|
|
#endif
|
|
pa = pmap_pte_pa(pte);
|
|
#ifdef DEBUG
|
|
opte = *pte;
|
|
#endif
|
|
#ifdef PMAPSTATS
|
|
remove_stats.removes++;
|
|
#endif
|
|
/*
|
|
* Update statistics
|
|
*/
|
|
if (pmap_pte_w(pte))
|
|
pmap->pm_stats.wired_count--;
|
|
pmap->pm_stats.resident_count--;
|
|
|
|
/*
|
|
* Invalidate the PTE after saving the reference modify info.
|
|
*/
|
|
#ifdef DEBUG
|
|
if (pmapdebug & PDB_REMOVE)
|
|
printf("remove: invalidating pte at %p\n", pte);
|
|
#endif
|
|
bits = *pte & (PG_U|PG_M);
|
|
*pte = PG_NV;
|
|
if ((flags & PRM_TFLUSH) && active_pmap(pmap))
|
|
TBIS(va);
|
|
/*
|
|
* For user mappings decrement the wiring count on
|
|
* the PT page. We do this after the PTE has been
|
|
* invalidated because vm_map_pageable winds up in
|
|
* pmap_pageable which clears the modify bit for the
|
|
* PT page.
|
|
*/
|
|
if (pmap != pmap_kernel()) {
|
|
#if defined(UVM)
|
|
(void) uvm_map_pageable(pt_map, trunc_page(pte),
|
|
round_page(pte+1), TRUE);
|
|
#else
|
|
(void) vm_map_pageable(pt_map, trunc_page(pte),
|
|
round_page(pte+1), TRUE);
|
|
#endif
|
|
#ifdef DEBUG
|
|
if (pmapdebug & PDB_WIRING)
|
|
pmap_check_wiring("remove", trunc_page(pte));
|
|
#endif
|
|
}
|
|
/*
|
|
* If this isn't a managed page, we are all done.
|
|
*/
|
|
if (PAGE_IS_MANAGED(pa) == 0)
|
|
return;
|
|
/*
|
|
* Otherwise remove it from the PV table
|
|
* (raise IPL since we may be called at interrupt time).
|
|
*/
|
|
pv = pa_to_pvh(pa);
|
|
ste = ST_ENTRY_NULL;
|
|
s = splimp();
|
|
/*
|
|
* If it is the first entry on the list, it is actually
|
|
* in the header and we must copy the following entry up
|
|
* to the header. Otherwise we must search the list for
|
|
* the entry. In either case we free the now unused entry.
|
|
*/
|
|
if (pmap == pv->pv_pmap && va == pv->pv_va) {
|
|
ste = pv->pv_ptste;
|
|
ptpmap = pv->pv_ptpmap;
|
|
npv = pv->pv_next;
|
|
if (npv) {
|
|
npv->pv_flags = pv->pv_flags;
|
|
*pv = *npv;
|
|
pmap_free_pv(npv);
|
|
} else
|
|
pv->pv_pmap = NULL;
|
|
#ifdef PMAPSTATS
|
|
remove_stats.pvfirst++;
|
|
#endif
|
|
} else {
|
|
for (npv = pv->pv_next; npv; npv = npv->pv_next) {
|
|
#ifdef PMAPSTATS
|
|
remove_stats.pvsearch++;
|
|
#endif
|
|
if (pmap == npv->pv_pmap && va == npv->pv_va)
|
|
break;
|
|
pv = npv;
|
|
}
|
|
#ifdef DEBUG
|
|
if (npv == NULL)
|
|
panic("pmap_remove: PA not in pv_tab");
|
|
#endif
|
|
ste = npv->pv_ptste;
|
|
ptpmap = npv->pv_ptpmap;
|
|
pv->pv_next = npv->pv_next;
|
|
pmap_free_pv(npv);
|
|
pv = pa_to_pvh(pa);
|
|
}
|
|
#ifdef HAVEVAC
|
|
/*
|
|
* If only one mapping left we no longer need to cache inhibit
|
|
*/
|
|
if (pmap_aliasmask &&
|
|
pv->pv_pmap && pv->pv_next == NULL && (pv->pv_flags & PV_CI)) {
|
|
#ifdef DEBUG
|
|
if (pmapdebug & PDB_CACHE)
|
|
printf("remove: clearing CI for pa %lx\n", pa);
|
|
#endif
|
|
pv->pv_flags &= ~PV_CI;
|
|
pmap_changebit(pa, PG_CI, FALSE);
|
|
#ifdef DEBUG
|
|
if ((pmapdebug & (PDB_CACHE|PDB_PVDUMP)) ==
|
|
(PDB_CACHE|PDB_PVDUMP))
|
|
pmap_pvdump(pa);
|
|
#endif
|
|
}
|
|
#endif
|
|
/*
|
|
* If this was a PT page we must also remove the
|
|
* mapping from the associated segment table.
|
|
*/
|
|
if (ste) {
|
|
#ifdef PMAPSTATS
|
|
remove_stats.ptinvalid++;
|
|
#endif
|
|
#ifdef DEBUG
|
|
if (pmapdebug & (PDB_REMOVE|PDB_PTPAGE))
|
|
printf("remove: ste was %x@%p pte was %x@%p\n",
|
|
*ste, ste, opte, pmap_pte(pmap, va));
|
|
#endif
|
|
#if defined(M68040)
|
|
if (mmutype == MMU_68040) {
|
|
st_entry_t *este = &ste[NPTEPG/SG4_LEV3SIZE];
|
|
|
|
while (ste < este)
|
|
*ste++ = SG_NV;
|
|
#ifdef DEBUG
|
|
ste -= NPTEPG/SG4_LEV3SIZE;
|
|
#endif
|
|
} else
|
|
#endif
|
|
*ste = SG_NV;
|
|
/*
|
|
* If it was a user PT page, we decrement the
|
|
* reference count on the segment table as well,
|
|
* freeing it if it is now empty.
|
|
*/
|
|
if (ptpmap != pmap_kernel()) {
|
|
#ifdef DEBUG
|
|
if (pmapdebug & (PDB_REMOVE|PDB_SEGTAB))
|
|
printf("remove: stab %p, refcnt %d\n",
|
|
ptpmap->pm_stab, ptpmap->pm_sref - 1);
|
|
if ((pmapdebug & PDB_PARANOIA) &&
|
|
ptpmap->pm_stab != (st_entry_t *)trunc_page(ste))
|
|
panic("remove: bogus ste");
|
|
#endif
|
|
if (--(ptpmap->pm_sref) == 0) {
|
|
#ifdef DEBUG
|
|
if (pmapdebug&(PDB_REMOVE|PDB_SEGTAB))
|
|
printf("remove: free stab %p\n",
|
|
ptpmap->pm_stab);
|
|
#endif
|
|
#if defined(UVM)
|
|
uvm_km_free_wakeup(st_map,
|
|
(vaddr_t)ptpmap->pm_stab,
|
|
HP_STSIZE);
|
|
#else
|
|
kmem_free_wakeup(st_map,
|
|
(vaddr_t)ptpmap->pm_stab,
|
|
HP_STSIZE);
|
|
#endif
|
|
ptpmap->pm_stab = Segtabzero;
|
|
ptpmap->pm_stpa = Segtabzeropa;
|
|
#if defined(M68040)
|
|
if (mmutype == MMU_68040)
|
|
ptpmap->pm_stfree = protostfree;
|
|
#endif
|
|
/*
|
|
* XXX may have changed segment table
|
|
* pointer for current process so
|
|
* update now to reload hardware.
|
|
*/
|
|
if (active_user_pmap(ptpmap))
|
|
PMAP_ACTIVATE(ptpmap, 1);
|
|
}
|
|
#ifdef DEBUG
|
|
else if (ptpmap->pm_sref < 0)
|
|
panic("remove: sref < 0");
|
|
#endif
|
|
}
|
|
#if 0
|
|
/*
|
|
* XXX this should be unnecessary as we have been
|
|
* flushing individual mappings as we go.
|
|
*/
|
|
if (ptpmap == pmap_kernel())
|
|
TBIAS();
|
|
else
|
|
TBIAU();
|
|
#endif
|
|
pv->pv_flags &= ~PV_PTPAGE;
|
|
ptpmap->pm_ptpages--;
|
|
}
|
|
/*
|
|
* Update saved attributes for managed page
|
|
*/
|
|
*pa_to_attribute(pa) |= bits;
|
|
splx(s);
|
|
}
|
|
|
|
/* static */
|
|
boolean_t
|
|
pmap_testbit(pa, bit)
|
|
paddr_t pa;
|
|
int bit;
|
|
{
|
|
struct pv_entry *pv;
|
|
pt_entry_t *pte;
|
|
int s;
|
|
|
|
if (PAGE_IS_MANAGED(pa) == 0)
|
|
return(FALSE);
|
|
|
|
pv = pa_to_pvh(pa);
|
|
s = splimp();
|
|
/*
|
|
* Check saved info first
|
|
*/
|
|
if (*pa_to_attribute(pa) & bit) {
|
|
splx(s);
|
|
return(TRUE);
|
|
}
|
|
#ifdef HAVEVAC
|
|
/*
|
|
* Flush VAC to get correct state of any hardware maintained bits.
|
|
*/
|
|
if (pmap_aliasmask && (bit & (PG_U|PG_M)))
|
|
DCIS();
|
|
#endif
|
|
/*
|
|
* Not found, check current mappings returning
|
|
* immediately if found.
|
|
*/
|
|
if (pv->pv_pmap != NULL) {
|
|
for (; pv; pv = pv->pv_next) {
|
|
pte = pmap_pte(pv->pv_pmap, pv->pv_va);
|
|
if (*pte & bit) {
|
|
splx(s);
|
|
return(TRUE);
|
|
}
|
|
}
|
|
}
|
|
splx(s);
|
|
return(FALSE);
|
|
}
|
|
|
|
/* static */
|
|
void
|
|
pmap_changebit(pa, bit, setem)
|
|
paddr_t pa;
|
|
int bit;
|
|
boolean_t setem;
|
|
{
|
|
struct pv_entry *pv;
|
|
pt_entry_t *pte, npte;
|
|
vaddr_t va;
|
|
int s;
|
|
#if defined(HAVEVAC) || defined(M68040)
|
|
boolean_t firstpage = TRUE;
|
|
#endif
|
|
#ifdef PMAPSTATS
|
|
struct chgstats *chgp;
|
|
#endif
|
|
|
|
#ifdef DEBUG
|
|
if (pmapdebug & PDB_BITS)
|
|
printf("pmap_changebit(%lx, %x, %s)\n",
|
|
pa, bit, setem ? "set" : "clear");
|
|
#endif
|
|
if (PAGE_IS_MANAGED(pa) == 0)
|
|
return;
|
|
|
|
#ifdef PMAPSTATS
|
|
chgp = &changebit_stats[(bit>>2)-1];
|
|
if (setem)
|
|
chgp->setcalls++;
|
|
else
|
|
chgp->clrcalls++;
|
|
#endif
|
|
pv = pa_to_pvh(pa);
|
|
s = splimp();
|
|
/*
|
|
* Clear saved attributes (modify, reference)
|
|
*/
|
|
if (!setem)
|
|
*pa_to_attribute(pa) &= ~bit;
|
|
/*
|
|
* Loop over all current mappings setting/clearing as appropos
|
|
* If setting RO do we need to clear the VAC?
|
|
*/
|
|
if (pv->pv_pmap != NULL) {
|
|
#ifdef DEBUG
|
|
int toflush = 0;
|
|
#endif
|
|
for (; pv; pv = pv->pv_next) {
|
|
#ifdef DEBUG
|
|
toflush |= (pv->pv_pmap == pmap_kernel()) ? 2 : 1;
|
|
#endif
|
|
va = pv->pv_va;
|
|
|
|
/*
|
|
* XXX don't write protect pager mappings
|
|
*/
|
|
if (bit == PG_RO) {
|
|
#if defined(UVM)
|
|
if (va >= uvm.pager_sva && va < uvm.pager_eva)
|
|
continue;
|
|
#else
|
|
extern vaddr_t pager_sva, pager_eva;
|
|
|
|
if (va >= pager_sva && va < pager_eva)
|
|
continue;
|
|
#endif
|
|
}
|
|
|
|
pte = pmap_pte(pv->pv_pmap, va);
|
|
#ifdef HAVEVAC
|
|
/*
|
|
* Flush VAC to ensure we get correct state of HW bits
|
|
* so we don't clobber them.
|
|
*/
|
|
if (firstpage && pmap_aliasmask) {
|
|
firstpage = FALSE;
|
|
DCIS();
|
|
}
|
|
#endif
|
|
if (setem)
|
|
npte = *pte | bit;
|
|
else
|
|
npte = *pte & ~bit;
|
|
if (*pte != npte) {
|
|
#if defined(M68040)
|
|
/*
|
|
* If we are changing caching status or
|
|
* protection make sure the caches are
|
|
* flushed (but only once).
|
|
*/
|
|
if (firstpage && mmutype == MMU_68040 &&
|
|
(bit == PG_RO && setem ||
|
|
(bit & PG_CMASK))) {
|
|
firstpage = FALSE;
|
|
DCFP(pa);
|
|
ICPP(pa);
|
|
}
|
|
#endif
|
|
*pte = npte;
|
|
if (active_pmap(pv->pv_pmap))
|
|
TBIS(va);
|
|
#ifdef PMAPSTATS
|
|
if (setem)
|
|
chgp->sethits++;
|
|
else
|
|
chgp->clrhits++;
|
|
#endif
|
|
}
|
|
#ifdef PMAPSTATS
|
|
else {
|
|
if (setem)
|
|
chgp->setmiss++;
|
|
else
|
|
chgp->clrmiss++;
|
|
}
|
|
#endif
|
|
}
|
|
#if defined(HAVEVAC) && defined(DEBUG)
|
|
if (setem && bit == PG_RO && (pmapvacflush & PVF_PROTECT)) {
|
|
if ((pmapvacflush & PVF_TOTAL) || toflush == 3)
|
|
DCIA();
|
|
else if (toflush == 2)
|
|
DCIS();
|
|
else
|
|
DCIU();
|
|
}
|
|
#endif
|
|
}
|
|
splx(s);
|
|
}
|
|
|
|
/* static */
|
|
void
|
|
pmap_enter_ptpage(pmap, va)
|
|
pmap_t pmap;
|
|
vaddr_t va;
|
|
{
|
|
paddr_t ptpa;
|
|
struct pv_entry *pv;
|
|
st_entry_t *ste;
|
|
int s;
|
|
|
|
#ifdef DEBUG
|
|
if (pmapdebug & (PDB_FOLLOW|PDB_ENTER|PDB_PTPAGE))
|
|
printf("pmap_enter_ptpage: pmap %p, va %lx\n", pmap, va);
|
|
#endif
|
|
#ifdef PMAPSTATS
|
|
enter_stats.ptpneeded++;
|
|
#endif
|
|
/*
|
|
* Allocate a segment table if necessary. Note that it is allocated
|
|
* from a private map and not pt_map. This keeps user page tables
|
|
* aligned on segment boundaries in the kernel address space.
|
|
* The segment table is wired down. It will be freed whenever the
|
|
* reference count drops to zero.
|
|
*/
|
|
if (pmap->pm_stab == Segtabzero) {
|
|
#if defined(UVM)
|
|
pmap->pm_stab = (st_entry_t *)
|
|
uvm_km_zalloc(st_map, HP_STSIZE);
|
|
#else
|
|
pmap->pm_stab = (st_entry_t *)
|
|
kmem_alloc(st_map, HP_STSIZE);
|
|
#endif
|
|
pmap->pm_stpa = (st_entry_t *)
|
|
pmap_extract(pmap_kernel(), (vaddr_t)pmap->pm_stab);
|
|
#if defined(M68040)
|
|
if (mmutype == MMU_68040) {
|
|
#ifdef DEBUG
|
|
if (dowriteback && dokwriteback)
|
|
#endif
|
|
pmap_changebit((paddr_t)pmap->pm_stpa, PG_CCB, 0);
|
|
pmap->pm_stfree = protostfree;
|
|
}
|
|
#endif
|
|
/*
|
|
* XXX may have changed segment table pointer for current
|
|
* process so update now to reload hardware.
|
|
*/
|
|
if (active_user_pmap(pmap))
|
|
PMAP_ACTIVATE(pmap, 1);
|
|
#ifdef DEBUG
|
|
if (pmapdebug & (PDB_ENTER|PDB_PTPAGE|PDB_SEGTAB))
|
|
printf("enter: pmap %p stab %p(%p)\n",
|
|
pmap, pmap->pm_stab, pmap->pm_stpa);
|
|
#endif
|
|
}
|
|
|
|
ste = pmap_ste(pmap, va);
|
|
#if defined(M68040)
|
|
/*
|
|
* Allocate level 2 descriptor block if necessary
|
|
*/
|
|
if (mmutype == MMU_68040) {
|
|
if (*ste == SG_NV) {
|
|
int ix;
|
|
caddr_t addr;
|
|
|
|
ix = bmtol2(pmap->pm_stfree);
|
|
if (ix == -1)
|
|
panic("enter: out of address space"); /* XXX */
|
|
pmap->pm_stfree &= ~l2tobm(ix);
|
|
addr = (caddr_t)&pmap->pm_stab[ix*SG4_LEV2SIZE];
|
|
bzero(addr, SG4_LEV2SIZE*sizeof(st_entry_t));
|
|
addr = (caddr_t)&pmap->pm_stpa[ix*SG4_LEV2SIZE];
|
|
*ste = (u_int)addr | SG_RW | SG_U | SG_V;
|
|
#ifdef DEBUG
|
|
if (pmapdebug & (PDB_ENTER|PDB_PTPAGE|PDB_SEGTAB))
|
|
printf("enter: alloc ste2 %d(%p)\n", ix, addr);
|
|
#endif
|
|
}
|
|
ste = pmap_ste2(pmap, va);
|
|
/*
|
|
* Since a level 2 descriptor maps a block of SG4_LEV3SIZE
|
|
* level 3 descriptors, we need a chunk of NPTEPG/SG4_LEV3SIZE
|
|
* (16) such descriptors (NBPG/SG4_LEV3SIZE bytes) to map a
|
|
* PT page--the unit of allocation. We set `ste' to point
|
|
* to the first entry of that chunk which is validated in its
|
|
* entirety below.
|
|
*/
|
|
ste = (st_entry_t *)((int)ste & ~(NBPG/SG4_LEV3SIZE-1));
|
|
#ifdef DEBUG
|
|
if (pmapdebug & (PDB_ENTER|PDB_PTPAGE|PDB_SEGTAB))
|
|
printf("enter: ste2 %p (%p)\n",
|
|
pmap_ste2(pmap, va), ste);
|
|
#endif
|
|
}
|
|
#endif
|
|
va = trunc_page((vaddr_t)pmap_pte(pmap, va));
|
|
|
|
/*
|
|
* In the kernel we allocate a page from the kernel PT page
|
|
* free list and map it into the kernel page table map (via
|
|
* pmap_enter).
|
|
*/
|
|
if (pmap == pmap_kernel()) {
|
|
struct kpt_page *kpt;
|
|
|
|
s = splimp();
|
|
if ((kpt = kpt_free_list) == (struct kpt_page *)0) {
|
|
/*
|
|
* No PT pages available.
|
|
* Try once to free up unused ones.
|
|
*/
|
|
#ifdef DEBUG
|
|
if (pmapdebug & PDB_COLLECT)
|
|
printf("enter: no KPT pages, collecting...\n");
|
|
#endif
|
|
pmap_collect(pmap_kernel());
|
|
if ((kpt = kpt_free_list) == (struct kpt_page *)0)
|
|
panic("pmap_enter_ptpage: can't get KPT page");
|
|
}
|
|
#ifdef PMAPSTATS
|
|
if (++kpt_stats.kptinuse > kpt_stats.kptmaxuse)
|
|
kpt_stats.kptmaxuse = kpt_stats.kptinuse;
|
|
#endif
|
|
kpt_free_list = kpt->kpt_next;
|
|
kpt->kpt_next = kpt_used_list;
|
|
kpt_used_list = kpt;
|
|
ptpa = kpt->kpt_pa;
|
|
bzero((caddr_t)kpt->kpt_va, NBPG);
|
|
pmap_enter(pmap, va, ptpa, VM_PROT_DEFAULT, TRUE);
|
|
#ifdef DEBUG
|
|
if (pmapdebug & (PDB_ENTER|PDB_PTPAGE)) {
|
|
int ix = pmap_ste(pmap, va) - pmap_ste(pmap, 0);
|
|
|
|
printf("enter: add &Sysptmap[%d]: %x (KPT page %lx)\n",
|
|
ix, Sysptmap[ix], kpt->kpt_va);
|
|
}
|
|
#endif
|
|
splx(s);
|
|
}
|
|
/*
|
|
* For user processes we just simulate a fault on that location
|
|
* letting the VM system allocate a zero-filled page.
|
|
*/
|
|
else {
|
|
/*
|
|
* Count the segment table reference now so that we won't
|
|
* lose the segment table when low on memory.
|
|
*/
|
|
pmap->pm_sref++;
|
|
#ifdef DEBUG
|
|
if (pmapdebug & (PDB_ENTER|PDB_PTPAGE))
|
|
printf("enter: about to fault UPT pg at %lx\n", va);
|
|
#endif
|
|
#if defined(UVM)
|
|
s = uvm_fault(pt_map, va, 0, VM_PROT_READ|VM_PROT_WRITE);
|
|
if (s != KERN_SUCCESS) {
|
|
printf("uvm_fault(pt_map, 0x%lx, 0, RW) -> %d\n",
|
|
va, s);
|
|
panic("pmap_enter: uvm_fault failed");
|
|
}
|
|
#else
|
|
s = vm_fault(pt_map, va, VM_PROT_READ|VM_PROT_WRITE, FALSE);
|
|
if (s != KERN_SUCCESS) {
|
|
printf("vm_fault(pt_map, %lx, RW, 0) -> %d\n", va, s);
|
|
panic("pmap_enter: vm_fault failed");
|
|
}
|
|
#endif
|
|
ptpa = pmap_extract(pmap_kernel(), va);
|
|
/*
|
|
* Mark the page clean now to avoid its pageout (and
|
|
* hence creation of a pager) between now and when it
|
|
* is wired; i.e. while it is on a paging queue.
|
|
*/
|
|
PHYS_TO_VM_PAGE(ptpa)->flags |= PG_CLEAN;
|
|
#if defined(DEBUG) && !defined(UVM)
|
|
PHYS_TO_VM_PAGE(ptpa)->flags |= PG_PTPAGE;
|
|
#endif
|
|
}
|
|
#if defined(M68040)
|
|
/*
|
|
* Turn off copyback caching of page table pages,
|
|
* could get ugly otherwise.
|
|
*/
|
|
#ifdef DEBUG
|
|
if (dowriteback && dokwriteback)
|
|
#endif
|
|
if (mmutype == MMU_68040) {
|
|
pt_entry_t *pte = pmap_pte(pmap_kernel(), va);
|
|
#ifdef DEBUG
|
|
if ((pmapdebug & PDB_PARANOIA) && (*pte & PG_CCB) == 0)
|
|
printf("%s PT no CCB: kva=%lx ptpa=%lx pte@%p=%x\n",
|
|
pmap == pmap_kernel() ? "Kernel" : "User",
|
|
va, ptpa, pte, *pte);
|
|
#endif
|
|
pmap_changebit(ptpa, PG_CCB, 0);
|
|
}
|
|
#endif
|
|
/*
|
|
* Locate the PV entry in the kernel for this PT page and
|
|
* record the STE address. This is so that we can invalidate
|
|
* the STE when we remove the mapping for the page.
|
|
*/
|
|
pv = pa_to_pvh(ptpa);
|
|
s = splimp();
|
|
if (pv) {
|
|
pv->pv_flags |= PV_PTPAGE;
|
|
do {
|
|
if (pv->pv_pmap == pmap_kernel() && pv->pv_va == va)
|
|
break;
|
|
} while (pv = pv->pv_next);
|
|
}
|
|
#ifdef DEBUG
|
|
if (pv == NULL)
|
|
panic("pmap_enter_ptpage: PT page not entered");
|
|
#endif
|
|
pv->pv_ptste = ste;
|
|
pv->pv_ptpmap = pmap;
|
|
#ifdef DEBUG
|
|
if (pmapdebug & (PDB_ENTER|PDB_PTPAGE))
|
|
printf("enter: new PT page at PA %lx, ste at %p\n", ptpa, ste);
|
|
#endif
|
|
|
|
/*
|
|
* Map the new PT page into the segment table.
|
|
* Also increment the reference count on the segment table if this
|
|
* was a user page table page. Note that we don't use vm_map_pageable
|
|
* to keep the count like we do for PT pages, this is mostly because
|
|
* it would be difficult to identify ST pages in pmap_pageable to
|
|
* release them. We also avoid the overhead of vm_map_pageable.
|
|
*/
|
|
#if defined(M68040)
|
|
if (mmutype == MMU_68040) {
|
|
st_entry_t *este;
|
|
|
|
for (este = &ste[NPTEPG/SG4_LEV3SIZE]; ste < este; ste++) {
|
|
*ste = ptpa | SG_U | SG_RW | SG_V;
|
|
ptpa += SG4_LEV3SIZE * sizeof(st_entry_t);
|
|
}
|
|
} else
|
|
#endif
|
|
*ste = (ptpa & SG_FRAME) | SG_RW | SG_V;
|
|
if (pmap != pmap_kernel()) {
|
|
#ifdef DEBUG
|
|
if (pmapdebug & (PDB_ENTER|PDB_PTPAGE|PDB_SEGTAB))
|
|
printf("enter: stab %p refcnt %d\n",
|
|
pmap->pm_stab, pmap->pm_sref);
|
|
#endif
|
|
}
|
|
#if 0
|
|
/*
|
|
* Flush stale TLB info.
|
|
*/
|
|
if (pmap == pmap_kernel())
|
|
TBIAS();
|
|
else
|
|
TBIAU();
|
|
#endif
|
|
pmap->pm_ptpages++;
|
|
splx(s);
|
|
}
|
|
|
|
#ifdef DEBUG
|
|
/* static */
|
|
void
|
|
pmap_pvdump(pa)
|
|
paddr_t pa;
|
|
{
|
|
struct pv_entry *pv;
|
|
|
|
printf("pa %lx", pa);
|
|
for (pv = pa_to_pvh(pa); pv; pv = pv->pv_next)
|
|
printf(" -> pmap %p, va %lx, ptste %p, ptpmap %p, flags %x",
|
|
pv->pv_pmap, pv->pv_va, pv->pv_ptste, pv->pv_ptpmap,
|
|
pv->pv_flags);
|
|
printf("\n");
|
|
}
|
|
|
|
/* static */
|
|
void
|
|
pmap_check_wiring(str, va)
|
|
char *str;
|
|
vaddr_t va;
|
|
{
|
|
vm_map_entry_t entry;
|
|
int count;
|
|
pt_entry_t *pte;
|
|
|
|
va = trunc_page(va);
|
|
if (!pmap_ste_v(pmap_kernel(), va) ||
|
|
!pmap_pte_v(pmap_pte(pmap_kernel(), va)))
|
|
return;
|
|
|
|
#if defined(UVM)
|
|
if (!uvm_map_lookup_entry(pt_map, va, &entry)) {
|
|
printf("wired_check: entry for %lx not found\n", va);
|
|
return;
|
|
}
|
|
#else
|
|
if (!vm_map_lookup_entry(pt_map, va, &entry)) {
|
|
printf("wired_check: entry for %lx not found\n", va);
|
|
return;
|
|
}
|
|
#endif
|
|
count = 0;
|
|
for (pte = (pt_entry_t *)va; pte < (pt_entry_t *)(va + NBPG); pte++)
|
|
if (*pte)
|
|
count++;
|
|
if (entry->wired_count != count)
|
|
printf("*%s*: %lx: w%d/a%d\n",
|
|
str, va, entry->wired_count, count);
|
|
}
|
|
#endif
|