89d3c65ccd
Based on a patch for FreeBSD by Eric Anholt. OKed on tech-kern some months ago.
839 lines
22 KiB
C
839 lines
22 KiB
C
/* $NetBSD: agp_i810.c,v 1.42 2007/08/15 02:26:13 markd Exp $ */
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/*-
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* Copyright (c) 2000 Doug Rabson
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* Copyright (c) 2000 Ruslan Ermilov
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $FreeBSD: src/sys/pci/agp_i810.c,v 1.4 2001/07/05 21:28:47 jhb Exp $
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: agp_i810.c,v 1.42 2007/08/15 02:26:13 markd Exp $");
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/malloc.h>
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#include <sys/kernel.h>
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#include <sys/lock.h>
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#include <sys/proc.h>
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#include <sys/device.h>
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#include <sys/conf.h>
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#include <uvm/uvm_extern.h>
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#include <dev/pci/pcivar.h>
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#include <dev/pci/pcireg.h>
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#include <dev/pci/pcidevs.h>
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#include <dev/pci/agpvar.h>
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#include <dev/pci/agpreg.h>
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#include <sys/agpio.h>
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#include <machine/bus.h>
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#include "agp_intel.h"
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#define READ1(off) bus_space_read_1(isc->bst, isc->bsh, off)
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#define READ4(off) bus_space_read_4(isc->bst, isc->bsh, off)
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#define WRITE4(off,v) bus_space_write_4(isc->bst, isc->bsh, off, v)
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#define WRITEGTT(off, v) \
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do { \
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if (isc->chiptype == CHIP_I915) { \
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bus_space_write_4(isc->gtt_bst, isc->gtt_bsh, \
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(u_int32_t)((off) >> AGP_PAGE_SHIFT) * 4, \
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(v)); \
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} else if (isc->chiptype == CHIP_I965) { \
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WRITE4(AGP_I965_GTT + \
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(u_int32_t)((off) >> AGP_PAGE_SHIFT) * 4, \
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(v)); \
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} else { \
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WRITE4(AGP_I810_GTT + \
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(u_int32_t)((off) >> AGP_PAGE_SHIFT) * 4, \
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(v)); \
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} \
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} while (0)
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#define CHIP_I810 0 /* i810/i815 */
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#define CHIP_I830 1 /* 830M/845G */
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#define CHIP_I855 2 /* 852GM/855GM/865G */
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#define CHIP_I915 3 /* 915G/915GM/945G/945GM */
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#define CHIP_I965 4 /* 965Q */
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struct agp_i810_softc {
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u_int32_t initial_aperture; /* aperture size at startup */
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struct agp_gatt *gatt;
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int chiptype; /* i810-like or i830 */
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u_int32_t dcache_size; /* i810 only */
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u_int32_t stolen; /* number of i830/845 gtt entries
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for stolen memory */
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bus_space_tag_t bst; /* register bus_space tag */
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bus_space_handle_t bsh; /* register bus_space handle */
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bus_space_tag_t gtt_bst; /* GTT bus_space tag */
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bus_space_handle_t gtt_bsh; /* GTT bus_space handle */
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struct pci_attach_args vga_pa;
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void *sc_powerhook;
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struct pci_conf_state sc_pciconf;
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};
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static u_int32_t agp_i810_get_aperture(struct agp_softc *);
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static int agp_i810_set_aperture(struct agp_softc *, u_int32_t);
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static int agp_i810_bind_page(struct agp_softc *, off_t, bus_addr_t);
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static int agp_i810_unbind_page(struct agp_softc *, off_t);
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static void agp_i810_flush_tlb(struct agp_softc *);
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static int agp_i810_enable(struct agp_softc *, u_int32_t mode);
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static struct agp_memory *agp_i810_alloc_memory(struct agp_softc *, int,
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vsize_t);
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static int agp_i810_free_memory(struct agp_softc *, struct agp_memory *);
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static int agp_i810_bind_memory(struct agp_softc *, struct agp_memory *, off_t);
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static int agp_i810_unbind_memory(struct agp_softc *, struct agp_memory *);
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static void agp_i810_powerhook(int, void *);
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static struct agp_methods agp_i810_methods = {
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agp_i810_get_aperture,
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agp_i810_set_aperture,
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agp_i810_bind_page,
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agp_i810_unbind_page,
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agp_i810_flush_tlb,
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agp_i810_enable,
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agp_i810_alloc_memory,
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agp_i810_free_memory,
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agp_i810_bind_memory,
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agp_i810_unbind_memory,
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};
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/* XXXthorpej -- duplicated code (see arch/i386/pci/pchb.c) */
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static int
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agp_i810_vgamatch(struct pci_attach_args *pa)
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{
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if (PCI_CLASS(pa->pa_class) != PCI_CLASS_DISPLAY ||
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PCI_SUBCLASS(pa->pa_class) != PCI_SUBCLASS_DISPLAY_VGA)
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return (0);
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switch (PCI_PRODUCT(pa->pa_id)) {
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case PCI_PRODUCT_INTEL_82810_GC:
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case PCI_PRODUCT_INTEL_82810_DC100_GC:
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case PCI_PRODUCT_INTEL_82810E_GC:
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case PCI_PRODUCT_INTEL_82815_FULL_GRAPH:
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case PCI_PRODUCT_INTEL_82830MP_IV:
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case PCI_PRODUCT_INTEL_82845G_IGD:
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case PCI_PRODUCT_INTEL_82855GM_IGD:
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case PCI_PRODUCT_INTEL_82865_IGD:
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case PCI_PRODUCT_INTEL_82915G_IGD:
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case PCI_PRODUCT_INTEL_82915GM_IGD:
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case PCI_PRODUCT_INTEL_82945P_IGD:
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case PCI_PRODUCT_INTEL_82945GM_IGD:
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case PCI_PRODUCT_INTEL_82945GM_IGD_1:
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case PCI_PRODUCT_INTEL_82965Q_IGD:
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case PCI_PRODUCT_INTEL_82965Q_IGD_1:
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return (1);
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}
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return (0);
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}
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static int
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agp_i965_map_aperture(struct pci_attach_args *pa, struct agp_softc *sc, int reg)
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{
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/*
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* Find the aperture. Don't map it (yet), this would
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* eat KVA.
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*/
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if (pci_mapreg_info(pa->pa_pc, pa->pa_tag, reg,
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PCI_MAPREG_TYPE_MEM|PCI_MAPREG_MEM_TYPE_64BIT, &sc->as_apaddr, &sc->as_apsize,
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&sc->as_apflags) != 0)
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return ENXIO;
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sc->as_apt = pa->pa_memt;
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return 0;
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}
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int
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agp_i810_attach(struct device *parent, struct device *self, void *aux)
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{
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struct agp_softc *sc = (void *)self;
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struct agp_i810_softc *isc;
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struct agp_gatt *gatt;
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int error, apbase;
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bus_size_t mmadrsize;
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isc = malloc(sizeof *isc, M_AGP, M_NOWAIT|M_ZERO);
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if (isc == NULL) {
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aprint_error(": can't allocate chipset-specific softc\n");
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return ENOMEM;
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}
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sc->as_chipc = isc;
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sc->as_methods = &agp_i810_methods;
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if (pci_find_device(&isc->vga_pa, agp_i810_vgamatch) == 0) {
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#if NAGP_INTEL > 0
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const struct pci_attach_args *pa = aux;
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switch (PCI_PRODUCT(pa->pa_id)) {
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case PCI_PRODUCT_INTEL_82840_HB:
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case PCI_PRODUCT_INTEL_82865_HB:
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case PCI_PRODUCT_INTEL_82845G_DRAM:
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case PCI_PRODUCT_INTEL_82815_FULL_HUB:
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return agp_intel_attach(parent, self, aux);
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}
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#endif
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aprint_error(": can't find internal VGA device config space\n");
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free(isc, M_AGP);
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return ENOENT;
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}
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/* XXXfvdl */
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sc->as_dmat = isc->vga_pa.pa_dmat;
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switch (PCI_PRODUCT(isc->vga_pa.pa_id)) {
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case PCI_PRODUCT_INTEL_82810_GC:
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case PCI_PRODUCT_INTEL_82810_DC100_GC:
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case PCI_PRODUCT_INTEL_82810E_GC:
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case PCI_PRODUCT_INTEL_82815_FULL_GRAPH:
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isc->chiptype = CHIP_I810;
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break;
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case PCI_PRODUCT_INTEL_82830MP_IV:
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case PCI_PRODUCT_INTEL_82845G_IGD:
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isc->chiptype = CHIP_I830;
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break;
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case PCI_PRODUCT_INTEL_82855GM_IGD:
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case PCI_PRODUCT_INTEL_82865_IGD:
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isc->chiptype = CHIP_I855;
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break;
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case PCI_PRODUCT_INTEL_82915G_IGD:
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case PCI_PRODUCT_INTEL_82915GM_IGD:
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case PCI_PRODUCT_INTEL_82945P_IGD:
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case PCI_PRODUCT_INTEL_82945GM_IGD:
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case PCI_PRODUCT_INTEL_82945GM_IGD_1:
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isc->chiptype = CHIP_I915;
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break;
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case PCI_PRODUCT_INTEL_82965Q_IGD:
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case PCI_PRODUCT_INTEL_82965Q_IGD_1:
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isc->chiptype = CHIP_I965;
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break;
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}
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apbase = isc->chiptype == CHIP_I915 ? AGP_I915_GMADR : AGP_I810_GMADR;
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if (isc->chiptype == CHIP_I965) {
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error = agp_i965_map_aperture(&isc->vga_pa, sc, AGP_I965_GMADR);
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} else {
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error = agp_map_aperture(&isc->vga_pa, sc, apbase);
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}
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if (error != 0) {
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aprint_error(": can't map aperture\n");
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free(isc, M_AGP);
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return error;
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}
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if (isc->chiptype == CHIP_I915) {
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error = pci_mapreg_map(&isc->vga_pa, AGP_I915_MMADR,
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PCI_MAPREG_TYPE_MEM, 0, &isc->bst, &isc->bsh,
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NULL, &mmadrsize);
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if (error != 0) {
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aprint_error(": can't map mmadr registers\n");
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agp_generic_detach(sc);
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return error;
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}
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error = pci_mapreg_map(&isc->vga_pa, AGP_I915_GTTADR,
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PCI_MAPREG_TYPE_MEM, 0, &isc->gtt_bst, &isc->gtt_bsh,
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NULL, NULL);
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if (error != 0) {
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aprint_error(": can't map gttadr registers\n");
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/* XXX we should release mmadr here */
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agp_generic_detach(sc);
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return error;
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}
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} else if (isc->chiptype == CHIP_I965) {
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error = pci_mapreg_map(&isc->vga_pa, AGP_I965_MMADR,
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PCI_MAPREG_TYPE_MEM, 0, &isc->bst, &isc->bsh,
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NULL, &mmadrsize);
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if (error != 0) {
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aprint_error(": can't map mmadr registers\n");
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agp_generic_detach(sc);
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return error;
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}
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} else {
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error = pci_mapreg_map(&isc->vga_pa, AGP_I810_MMADR,
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PCI_MAPREG_TYPE_MEM, 0, &isc->bst, &isc->bsh,
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NULL, &mmadrsize);
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if (error != 0) {
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aprint_error(": can't map mmadr registers\n");
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agp_generic_detach(sc);
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return error;
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}
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}
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isc->initial_aperture = AGP_GET_APERTURE(sc);
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gatt = malloc(sizeof(struct agp_gatt), M_AGP, M_NOWAIT);
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if (!gatt) {
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agp_generic_detach(sc);
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return ENOMEM;
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}
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isc->gatt = gatt;
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gatt->ag_entries = AGP_GET_APERTURE(sc) >> AGP_PAGE_SHIFT;
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if (isc->chiptype == CHIP_I810) {
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void *virtual;
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int dummyseg;
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/* Some i810s have on-chip memory called dcache */
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if (READ1(AGP_I810_DRT) & AGP_I810_DRT_POPULATED)
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isc->dcache_size = 4 * 1024 * 1024;
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else
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isc->dcache_size = 0;
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/* According to the specs the gatt on the i810 must be 64k */
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if (agp_alloc_dmamem(sc->as_dmat, 64 * 1024,
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0, &gatt->ag_dmamap, &virtual, &gatt->ag_physical,
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&gatt->ag_dmaseg, 1, &dummyseg) != 0) {
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free(gatt, M_AGP);
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agp_generic_detach(sc);
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return ENOMEM;
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}
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gatt->ag_virtual = (uint32_t *)virtual;
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gatt->ag_size = gatt->ag_entries * sizeof(u_int32_t);
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memset(gatt->ag_virtual, 0, gatt->ag_size);
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agp_flush_cache();
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/* Install the GATT. */
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WRITE4(AGP_I810_PGTBL_CTL, gatt->ag_physical | 1);
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} else if (isc->chiptype == CHIP_I830) {
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/* The i830 automatically initializes the 128k gatt on boot. */
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pcireg_t reg;
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u_int32_t pgtblctl;
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u_int16_t gcc1;
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reg = pci_conf_read(sc->as_pc, sc->as_tag, AGP_I830_GCC0);
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gcc1 = (u_int16_t)(reg >> 16);
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switch (gcc1 & AGP_I830_GCC1_GMS) {
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case AGP_I830_GCC1_GMS_STOLEN_512:
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isc->stolen = (512 - 132) * 1024 / 4096;
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break;
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case AGP_I830_GCC1_GMS_STOLEN_1024:
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isc->stolen = (1024 - 132) * 1024 / 4096;
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break;
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case AGP_I830_GCC1_GMS_STOLEN_8192:
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isc->stolen = (8192 - 132) * 1024 / 4096;
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break;
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default:
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isc->stolen = 0;
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aprint_error(
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": unknown memory configuration, disabling\n");
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agp_generic_detach(sc);
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return EINVAL;
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}
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if (isc->stolen > 0) {
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aprint_error(": detected %dk stolen memory\n%s",
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isc->stolen * 4, sc->as_dev.dv_xname);
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}
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/* GATT address is already in there, make sure it's enabled */
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pgtblctl = READ4(AGP_I810_PGTBL_CTL);
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pgtblctl |= 1;
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WRITE4(AGP_I810_PGTBL_CTL, pgtblctl);
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gatt->ag_physical = pgtblctl & ~1;
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} else if (isc->chiptype == CHIP_I855 || isc->chiptype == CHIP_I915 ||
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isc->chiptype == CHIP_I965) {
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pcireg_t reg;
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u_int32_t pgtblctl, stolen;
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u_int16_t gcc1;
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/* Stolen memory is set up at the beginning of the aperture by
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* the BIOS, consisting of the GATT followed by 4kb for the
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* BIOS display.
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*/
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switch (isc->chiptype) {
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case CHIP_I855:
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stolen = 128 + 4;
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break;
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case CHIP_I915:
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stolen = 256 + 4;
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break;
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case CHIP_I965:
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stolen = 512 + 4;
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break;
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default:
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aprint_error(": bad chiptype\n");
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agp_generic_detach(sc);
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return EINVAL;
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}
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reg = pci_conf_read(sc->as_pc, sc->as_tag, AGP_I855_GCC1);
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gcc1 = (u_int16_t)(reg >> 16);
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switch (gcc1 & AGP_I855_GCC1_GMS) {
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case AGP_I855_GCC1_GMS_STOLEN_1M:
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isc->stolen = (1024 - stolen) * 1024 / 4096;
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break;
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case AGP_I855_GCC1_GMS_STOLEN_4M:
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isc->stolen = (4096 - stolen) * 1024 / 4096;
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break;
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case AGP_I855_GCC1_GMS_STOLEN_8M:
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isc->stolen = (8192 - stolen) * 1024 / 4096;
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break;
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case AGP_I855_GCC1_GMS_STOLEN_16M:
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isc->stolen = (16384 - stolen) * 1024 / 4096;
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break;
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case AGP_I855_GCC1_GMS_STOLEN_32M:
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isc->stolen = (32768 - stolen) * 1024 / 4096;
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break;
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case AGP_I915_GCC1_GMS_STOLEN_48M:
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isc->stolen = (49152 - stolen) * 1024 / 4096;
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break;
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case AGP_I915_GCC1_GMS_STOLEN_64M:
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isc->stolen = (65536 - stolen) * 1024 / 4096;
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break;
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default:
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isc->stolen = 0;
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aprint_error(
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": unknown memory configuration, disabling\n");
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agp_generic_detach(sc);
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return EINVAL;
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}
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if (isc->stolen > 0) {
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aprint_error(": detected %dk stolen memory\n%s",
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isc->stolen * 4, sc->as_dev.dv_xname);
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}
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/* GATT address is already in there, make sure it's enabled */
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pgtblctl = READ4(AGP_I810_PGTBL_CTL);
|
|
pgtblctl |= 1;
|
|
WRITE4(AGP_I810_PGTBL_CTL, pgtblctl);
|
|
|
|
gatt->ag_physical = pgtblctl & ~1;
|
|
}
|
|
|
|
/*
|
|
* Make sure the chipset can see everything.
|
|
*/
|
|
agp_flush_cache();
|
|
|
|
isc->sc_powerhook = powerhook_establish(sc->as_dev.dv_xname,
|
|
agp_i810_powerhook, sc);
|
|
if (isc->sc_powerhook == NULL)
|
|
printf("%s: WARNING: unable to establish PCI power hook\n",
|
|
sc->as_dev.dv_xname);
|
|
|
|
#if 0
|
|
/*
|
|
* another device (drm) may need access to this region
|
|
* we do not need it anymore
|
|
*/
|
|
bus_space_unmap(isc->bst, isc->bsh, mmadrsize);
|
|
#endif
|
|
|
|
return 0;
|
|
}
|
|
|
|
#if 0
|
|
static int
|
|
agp_i810_detach(struct agp_softc *sc)
|
|
{
|
|
int error;
|
|
struct agp_i810_softc *isc = sc->as_chipc;
|
|
|
|
error = agp_generic_detach(sc);
|
|
if (error)
|
|
return error;
|
|
|
|
/* Clear the GATT base. */
|
|
if (sc->chiptype == CHIP_I810) {
|
|
WRITE4(AGP_I810_PGTBL_CTL, 0);
|
|
} else {
|
|
unsigned int pgtblctl;
|
|
pgtblctl = READ4(AGP_I810_PGTBL_CTL);
|
|
pgtblctl &= ~1;
|
|
WRITE4(AGP_I810_PGTBL_CTL, pgtblctl);
|
|
}
|
|
|
|
/* Put the aperture back the way it started. */
|
|
AGP_SET_APERTURE(sc, isc->initial_aperture);
|
|
|
|
if (sc->chiptype == CHIP_I810) {
|
|
agp_free_dmamem(sc->as_dmat, gatt->ag_size, gatt->ag_dmamap,
|
|
(void *)gatt->ag_virtual, &gatt->ag_dmaseg, 1);
|
|
}
|
|
free(sc->gatt, M_AGP);
|
|
|
|
return 0;
|
|
}
|
|
#endif
|
|
|
|
static u_int32_t
|
|
agp_i810_get_aperture(struct agp_softc *sc)
|
|
{
|
|
struct agp_i810_softc *isc = sc->as_chipc;
|
|
pcireg_t reg;
|
|
u_int16_t miscc, gcc1, msac;
|
|
|
|
switch (isc->chiptype) {
|
|
case CHIP_I810:
|
|
reg = pci_conf_read(sc->as_pc, sc->as_tag, AGP_I810_SMRAM);
|
|
miscc = (u_int16_t)(reg >> 16);
|
|
if ((miscc & AGP_I810_MISCC_WINSIZE) ==
|
|
AGP_I810_MISCC_WINSIZE_32)
|
|
return 32 * 1024 * 1024;
|
|
else
|
|
return 64 * 1024 * 1024;
|
|
case CHIP_I830:
|
|
reg = pci_conf_read(sc->as_pc, sc->as_tag, AGP_I830_GCC0);
|
|
gcc1 = (u_int16_t)(reg >> 16);
|
|
if ((gcc1 & AGP_I830_GCC1_GMASIZE) == AGP_I830_GCC1_GMASIZE_64)
|
|
return 64 * 1024 * 1024;
|
|
else
|
|
return 128 * 1024 * 1024;
|
|
case CHIP_I855:
|
|
return 128 * 1024 * 1024;
|
|
case CHIP_I915:
|
|
reg = pci_conf_read(sc->as_pc, sc->as_tag, AGP_I915_MSAC);
|
|
msac = (u_int16_t)(reg >> 16);
|
|
if (msac & AGP_I915_MSAC_APER_128M)
|
|
return 128 * 1024 * 1024;
|
|
else
|
|
return 256 * 1024 * 1024;
|
|
case CHIP_I965:
|
|
return 512 * 1024 * 1024;
|
|
default:
|
|
aprint_error(": Unknown chipset\n");
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int
|
|
agp_i810_set_aperture(struct agp_softc *sc, u_int32_t aperture)
|
|
{
|
|
struct agp_i810_softc *isc = sc->as_chipc;
|
|
pcireg_t reg;
|
|
u_int16_t miscc, gcc1;
|
|
|
|
switch (isc->chiptype) {
|
|
case CHIP_I810:
|
|
/*
|
|
* Double check for sanity.
|
|
*/
|
|
if (aperture != (32 * 1024 * 1024) &&
|
|
aperture != (64 * 1024 * 1024)) {
|
|
printf("%s: bad aperture size %d\n",
|
|
sc->as_dev.dv_xname, aperture);
|
|
return EINVAL;
|
|
}
|
|
|
|
reg = pci_conf_read(sc->as_pc, sc->as_tag, AGP_I810_SMRAM);
|
|
miscc = (u_int16_t)(reg >> 16);
|
|
miscc &= ~AGP_I810_MISCC_WINSIZE;
|
|
if (aperture == 32 * 1024 * 1024)
|
|
miscc |= AGP_I810_MISCC_WINSIZE_32;
|
|
else
|
|
miscc |= AGP_I810_MISCC_WINSIZE_64;
|
|
|
|
reg &= 0x0000ffff;
|
|
reg |= ((pcireg_t)miscc) << 16;
|
|
pci_conf_write(sc->as_pc, sc->as_tag, AGP_I810_SMRAM, reg);
|
|
break;
|
|
case CHIP_I830:
|
|
if (aperture != (64 * 1024 * 1024) &&
|
|
aperture != (128 * 1024 * 1024)) {
|
|
printf("%s: bad aperture size %d\n",
|
|
sc->as_dev.dv_xname, aperture);
|
|
return EINVAL;
|
|
}
|
|
reg = pci_conf_read(sc->as_pc, sc->as_tag, AGP_I830_GCC0);
|
|
gcc1 = (u_int16_t)(reg >> 16);
|
|
gcc1 &= ~AGP_I830_GCC1_GMASIZE;
|
|
if (aperture == 64 * 1024 * 1024)
|
|
gcc1 |= AGP_I830_GCC1_GMASIZE_64;
|
|
else
|
|
gcc1 |= AGP_I830_GCC1_GMASIZE_128;
|
|
|
|
reg &= 0x0000ffff;
|
|
reg |= ((pcireg_t)gcc1) << 16;
|
|
pci_conf_write(sc->as_pc, sc->as_tag, AGP_I830_GCC0, reg);
|
|
break;
|
|
case CHIP_I855:
|
|
case CHIP_I915:
|
|
if (aperture != agp_i810_get_aperture(sc)) {
|
|
printf("%s: bad aperture size %d\n",
|
|
sc->as_dev.dv_xname, aperture);
|
|
return EINVAL;
|
|
}
|
|
break;
|
|
case CHIP_I965:
|
|
if (aperture != 512 * 1024 * 1024) {
|
|
printf("%s: bad aperture size %d\n",
|
|
sc->as_dev.dv_xname, aperture);
|
|
return EINVAL;
|
|
}
|
|
break;
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int
|
|
agp_i810_bind_page(struct agp_softc *sc, off_t offset, bus_addr_t physical)
|
|
{
|
|
struct agp_i810_softc *isc = sc->as_chipc;
|
|
|
|
if (offset < 0 || offset >= (isc->gatt->ag_entries << AGP_PAGE_SHIFT)) {
|
|
#ifdef AGP_DEBUG
|
|
printf("%s: failed: offset 0x%08x, shift %d, entries %d\n",
|
|
sc->as_dev.dv_xname, (int)offset, AGP_PAGE_SHIFT,
|
|
isc->gatt->ag_entries);
|
|
#endif
|
|
return EINVAL;
|
|
}
|
|
|
|
if (isc->chiptype != CHIP_I830) {
|
|
if ((offset >> AGP_PAGE_SHIFT) < isc->stolen) {
|
|
#ifdef AGP_DEBUG
|
|
printf("%s: trying to bind into stolen memory",
|
|
sc->as_dev.dv_xname);
|
|
#endif
|
|
return EINVAL;
|
|
}
|
|
}
|
|
|
|
WRITEGTT(offset, physical | 1);
|
|
return 0;
|
|
}
|
|
|
|
static int
|
|
agp_i810_unbind_page(struct agp_softc *sc, off_t offset)
|
|
{
|
|
struct agp_i810_softc *isc = sc->as_chipc;
|
|
|
|
if (offset < 0 || offset >= (isc->gatt->ag_entries << AGP_PAGE_SHIFT))
|
|
return EINVAL;
|
|
|
|
if (isc->chiptype != CHIP_I810 ) {
|
|
if ((offset >> AGP_PAGE_SHIFT) < isc->stolen) {
|
|
#ifdef AGP_DEBUG
|
|
printf("%s: trying to unbind from stolen memory",
|
|
sc->as_dev.dv_xname);
|
|
#endif
|
|
return EINVAL;
|
|
}
|
|
}
|
|
|
|
WRITEGTT(offset, 0);
|
|
return 0;
|
|
}
|
|
|
|
/*
|
|
* Writing via memory mapped registers already flushes all TLBs.
|
|
*/
|
|
static void
|
|
agp_i810_flush_tlb(struct agp_softc *sc)
|
|
{
|
|
}
|
|
|
|
static int
|
|
agp_i810_enable(struct agp_softc *sc, u_int32_t mode)
|
|
{
|
|
|
|
return 0;
|
|
}
|
|
|
|
static struct agp_memory *
|
|
agp_i810_alloc_memory(struct agp_softc *sc, int type, vsize_t size)
|
|
{
|
|
struct agp_i810_softc *isc = sc->as_chipc;
|
|
struct agp_memory *mem;
|
|
|
|
#ifdef AGP_DEBUG
|
|
printf("AGP: alloc(%d, 0x%x)\n", type, (int) size);
|
|
#endif
|
|
|
|
if ((size & (AGP_PAGE_SIZE - 1)) != 0)
|
|
return 0;
|
|
|
|
if (sc->as_allocated + size > sc->as_maxmem)
|
|
return 0;
|
|
|
|
if (type == 1) {
|
|
/*
|
|
* Mapping local DRAM into GATT.
|
|
*/
|
|
if (isc->chiptype != CHIP_I810 )
|
|
return 0;
|
|
if (size != isc->dcache_size)
|
|
return 0;
|
|
} else if (type == 2) {
|
|
/*
|
|
* Bogus mapping for the hardware cursor.
|
|
*/
|
|
if (size != AGP_PAGE_SIZE && size != 4 * AGP_PAGE_SIZE)
|
|
return 0;
|
|
}
|
|
|
|
mem = malloc(sizeof *mem, M_AGP, M_WAITOK|M_ZERO);
|
|
if (mem == NULL)
|
|
return NULL;
|
|
mem->am_id = sc->as_nextid++;
|
|
mem->am_size = size;
|
|
mem->am_type = type;
|
|
|
|
if (type == 2) {
|
|
/*
|
|
* Allocate and wire down the memory now so that we can
|
|
* get its physical address.
|
|
*/
|
|
mem->am_dmaseg = malloc(sizeof *mem->am_dmaseg, M_AGP,
|
|
M_WAITOK);
|
|
if (mem->am_dmaseg == NULL) {
|
|
free(mem, M_AGP);
|
|
return NULL;
|
|
}
|
|
if (agp_alloc_dmamem(sc->as_dmat, size, 0,
|
|
&mem->am_dmamap, &mem->am_virtual, &mem->am_physical,
|
|
mem->am_dmaseg, 1, &mem->am_nseg) != 0) {
|
|
free(mem->am_dmaseg, M_AGP);
|
|
free(mem, M_AGP);
|
|
return NULL;
|
|
}
|
|
memset(mem->am_virtual, 0, size);
|
|
} else if (type != 1) {
|
|
if (bus_dmamap_create(sc->as_dmat, size, size / PAGE_SIZE + 1,
|
|
size, 0, BUS_DMA_NOWAIT,
|
|
&mem->am_dmamap) != 0) {
|
|
free(mem, M_AGP);
|
|
return NULL;
|
|
}
|
|
}
|
|
|
|
TAILQ_INSERT_TAIL(&sc->as_memory, mem, am_link);
|
|
sc->as_allocated += size;
|
|
|
|
return mem;
|
|
}
|
|
|
|
static int
|
|
agp_i810_free_memory(struct agp_softc *sc, struct agp_memory *mem)
|
|
{
|
|
if (mem->am_is_bound)
|
|
return EBUSY;
|
|
|
|
if (mem->am_type == 2) {
|
|
agp_free_dmamem(sc->as_dmat, mem->am_size, mem->am_dmamap,
|
|
mem->am_virtual, mem->am_dmaseg, mem->am_nseg);
|
|
free(mem->am_dmaseg, M_AGP);
|
|
}
|
|
|
|
sc->as_allocated -= mem->am_size;
|
|
TAILQ_REMOVE(&sc->as_memory, mem, am_link);
|
|
free(mem, M_AGP);
|
|
return 0;
|
|
}
|
|
|
|
static int
|
|
agp_i810_bind_memory(struct agp_softc *sc, struct agp_memory *mem,
|
|
off_t offset)
|
|
{
|
|
struct agp_i810_softc *isc = sc->as_chipc;
|
|
u_int32_t regval, i;
|
|
|
|
/*
|
|
* XXX evil hack: the PGTBL_CTL appearently gets overwritten by the
|
|
* X server for mysterious reasons which leads to crashes if we write
|
|
* to the GTT through the MMIO window.
|
|
* Until the issue is solved, simply restore it.
|
|
*/
|
|
|
|
#if 0
|
|
regval = bus_space_read_4(isc->bst, isc->bsh, AGP_I810_PGTBL_CTL);
|
|
if (regval != (isc->gatt->ag_physical | 1)) {
|
|
printf("agp_i810_bind_memory: PGTBL_CTL is 0x%x - fixing\n",
|
|
regval);
|
|
bus_space_write_4(isc->bst, isc->bsh, AGP_I810_PGTBL_CTL,
|
|
isc->gatt->ag_physical | 1);
|
|
}
|
|
#endif
|
|
regval = 0;
|
|
|
|
if (mem->am_type == 2) {
|
|
WRITEGTT(offset, mem->am_physical | 1);
|
|
mem->am_offset = offset;
|
|
mem->am_is_bound = 1;
|
|
return 0;
|
|
}
|
|
|
|
if (mem->am_type != 1)
|
|
return agp_generic_bind_memory(sc, mem, offset);
|
|
|
|
if (isc->chiptype != CHIP_I810)
|
|
return EINVAL;
|
|
|
|
for (i = 0; i < mem->am_size; i += AGP_PAGE_SIZE)
|
|
WRITEGTT(offset, i | 3);
|
|
mem->am_is_bound = 1;
|
|
return 0;
|
|
}
|
|
|
|
static int
|
|
agp_i810_unbind_memory(struct agp_softc *sc, struct agp_memory *mem)
|
|
{
|
|
struct agp_i810_softc *isc = sc->as_chipc;
|
|
u_int32_t i;
|
|
|
|
if (mem->am_type == 2) {
|
|
WRITEGTT(mem->am_offset, 0);
|
|
mem->am_offset = 0;
|
|
mem->am_is_bound = 0;
|
|
return 0;
|
|
}
|
|
|
|
if (mem->am_type != 1)
|
|
return agp_generic_unbind_memory(sc, mem);
|
|
|
|
if (isc->chiptype != CHIP_I810)
|
|
return EINVAL;
|
|
|
|
for (i = 0; i < mem->am_size; i += AGP_PAGE_SIZE)
|
|
WRITEGTT(i, 0);
|
|
mem->am_is_bound = 0;
|
|
return 0;
|
|
}
|
|
|
|
static void
|
|
agp_i810_powerhook(int why, void *arg)
|
|
{
|
|
struct agp_softc *sc = (struct agp_softc *)arg;
|
|
struct agp_i810_softc *isc = sc->as_chipc;
|
|
|
|
if (why == PWR_RESUME) {
|
|
pci_conf_restore(sc->as_pc, sc->as_tag, &isc->sc_pciconf);
|
|
agp_flush_cache();
|
|
} else if ((why == PWR_STANDBY) || (why == PWR_SUSPEND))
|
|
pci_conf_capture(sc->as_pc, sc->as_tag, &isc->sc_pciconf);
|
|
|
|
return;
|
|
}
|