254 lines
6.9 KiB
C
254 lines
6.9 KiB
C
/* $NetBSD: wdc_obio.c,v 1.2 1999/01/22 10:44:38 tsubai Exp $ */
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/*-
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* Copyright (c) 1998 The NetBSD Foundation, Inc.
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* All rights reserved.
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*
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* This code is derived from software contributed to The NetBSD Foundation
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* by Charles M. Hannum and by Onno van der Linden.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by the NetBSD
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* Foundation, Inc. and its contributors.
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* 4. Neither the name of The NetBSD Foundation nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/device.h>
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#include <sys/malloc.h>
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#include <vm/vm.h>
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#include <machine/bus.h>
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#include <machine/autoconf.h>
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#include <dev/ata/atavar.h>
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#include <dev/ic/wdcvar.h>
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#include <macppc/dev/dbdma.h>
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#define WDC_REG_NPORTS 8
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#define WDC_AUXREG_OFFSET 0x16
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#define WDC_DEFAULT_PIO_IRQ 13 /* XXX */
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#define WDC_DEFAULT_DMA_IRQ 2 /* XXX */
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#define WDC_OPTIONS_DMA 0x01
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/*
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* XXX This code currently doesn't even try to allow 32-bit data port use.
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*/
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struct wdc_obio_softc {
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struct wdc_softc sc_wdcdev;
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struct channel_softc *wdc_chanptr;
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struct channel_softc wdc_channel;
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dbdma_regmap_t *sc_dmareg;
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dbdma_command_t *sc_dmacmd;
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};
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int wdc_obio_probe __P((struct device *, struct cfdata *, void *));
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void wdc_obio_attach __P((struct device *, struct device *, void *));
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struct cfattach wdc_obio_ca = {
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sizeof(struct wdc_obio_softc), wdc_obio_probe, wdc_obio_attach
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};
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static int wdc_obio_dma_init __P((void *, int, int, void *, size_t, int));
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static void wdc_obio_dma_start __P((void *, int, int, int));
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static int wdc_obio_dma_finish __P((void *, int, int, int));
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int
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wdc_obio_probe(parent, match, aux)
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struct device *parent;
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struct cfdata *match;
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void *aux;
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{
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struct confargs *ca = aux;
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if (strcmp(ca->ca_name, "ATA") == 0 ||
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strcmp(ca->ca_name, "ata") == 0 ||
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strcmp(ca->ca_name, "ata0") == 0 ||
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strcmp(ca->ca_name, "ide") == 0)
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return 1;
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return 0;
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}
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void
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wdc_obio_attach(parent, self, aux)
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struct device *parent, *self;
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void *aux;
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{
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struct wdc_obio_softc *sc = (void *)self;
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struct confargs *ca = aux;
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struct channel_softc *chp = &sc->wdc_channel;
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int piointr, dmaintr;
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int use_dma = 0;
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piointr = dmaintr = -1;
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if (sc->sc_wdcdev.sc_dev.dv_cfdata->cf_flags & WDC_OPTIONS_DMA) {
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if (ca->ca_nreg >= 16 || ca->ca_nintr == -1)
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use_dma = 1; /* XXX Don't work yet. */
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}
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if (ca->ca_nintr == -1) {
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piointr = WDC_DEFAULT_PIO_IRQ;
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dmaintr = WDC_DEFAULT_DMA_IRQ;
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printf(" irq property not found; using %d,%d",
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piointr, dmaintr);
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}
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if (ca->ca_nintr >= 4 && ca->ca_nreg >= 8) {
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piointr = ca->ca_intr[0];
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printf(" irq %d", piointr);
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}
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if (ca->ca_nintr >= 8 && use_dma) {
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dmaintr = ca->ca_intr[1];
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printf(",%d", dmaintr);
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}
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if (piointr == -1) {
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printf(": couldn't get irq property\n");
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return;
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}
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if (use_dma)
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printf(": DMA transfer");
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printf("\n");
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chp->cmd_iot = chp->ctl_iot =
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macppc_make_bus_space_tag(ca->ca_baseaddr + ca->ca_reg[0], 4);
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if (bus_space_map(chp->cmd_iot, 0, WDC_REG_NPORTS, 0, &chp->cmd_ioh) ||
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bus_space_subregion(chp->cmd_iot, chp->cmd_ioh,
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WDC_AUXREG_OFFSET, 1, &chp->ctl_ioh)) {
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printf("%s: couldn't map registers\n",
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sc->sc_wdcdev.sc_dev.dv_xname);
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return;
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}
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#if 0
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chp->data32iot = chp->cmd_iot;
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chp->data32ioh = chp->cmd_ioh;
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#endif
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intr_establish(piointr, IST_LEVEL, IPL_BIO, wdcintr, chp);
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if (use_dma) {
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if (dmaintr != -1)
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intr_establish(dmaintr, IST_LEVEL, IPL_BIO,
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wdcintr, chp);
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sc->sc_dmacmd = dbdma_alloc(sizeof(dbdma_command_t) * 20);
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sc->sc_dmareg = mapiodev(ca->ca_baseaddr + ca->ca_reg[2],
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ca->ca_reg[3]);
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sc->sc_wdcdev.cap |= WDC_CAPABILITY_DMA;
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}
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sc->sc_wdcdev.cap |= WDC_CAPABILITY_DATA16;
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sc->sc_wdcdev.PIO_cap = 0;
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sc->wdc_chanptr = chp;
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sc->sc_wdcdev.channels = &sc->wdc_chanptr;
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sc->sc_wdcdev.nchannels = 1;
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sc->sc_wdcdev.dma_arg = sc;
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sc->sc_wdcdev.dma_init = wdc_obio_dma_init;
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sc->sc_wdcdev.dma_start = wdc_obio_dma_start;
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sc->sc_wdcdev.dma_finish = wdc_obio_dma_finish;
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chp->channel = 0;
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chp->wdc = &sc->sc_wdcdev;
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chp->ch_queue = malloc(sizeof(struct channel_queue),
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M_DEVBUF, M_NOWAIT);
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if (chp->ch_queue == NULL) {
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printf("%s: can't allocate memory for command queue",
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sc->sc_wdcdev.sc_dev.dv_xname);
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return;
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}
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wdcattach(chp);
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}
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static int
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wdc_obio_dma_init(v, channel, drive, databuf, datalen, read)
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void *v;
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void *databuf;
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size_t datalen;
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int read;
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{
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struct wdc_obio_softc *sc = v;
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vaddr_t va = (vaddr_t)databuf;
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dbdma_command_t *cmdp;
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u_int cmd;
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#ifdef DIAGNOSTIC
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if (va & PGOFSET)
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panic("wdc_obio: databuf not page aligned");
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if (datalen > 65536)
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panic("wdc_obio: datalen too large");
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#endif
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cmdp = sc->sc_dmacmd;
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cmd = read ? DBDMA_CMD_IN_MORE : DBDMA_CMD_OUT_MORE;
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while (datalen > NBPG) {
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DBDMA_BUILD(cmdp, cmd, 0, NBPG, vtophys(va),
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DBDMA_INT_NEVER, DBDMA_WAIT_NEVER, DBDMA_BRANCH_NEVER);
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datalen -= NBPG;
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va += NBPG;
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cmdp++;
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}
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/* the last page (datalen <= NBPG here) */
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cmd = read ? DBDMA_CMD_IN_LAST : DBDMA_CMD_OUT_LAST;
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DBDMA_BUILD(cmdp, cmd, 0, datalen, vtophys(va),
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DBDMA_INT_ALWAYS, DBDMA_WAIT_NEVER, DBDMA_BRANCH_NEVER);
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cmdp++;
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DBDMA_BUILD(cmdp, DBDMA_CMD_STOP, 0, 0, 0,
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DBDMA_INT_NEVER, DBDMA_WAIT_NEVER, DBDMA_BRANCH_NEVER);
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return 0;
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}
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static void
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wdc_obio_dma_start(v, channel, drive, read)
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void *v;
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int channel, drive;
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{
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struct wdc_obio_softc *sc = v;
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dbdma_start(sc->sc_dmareg, sc->sc_dmacmd);
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}
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static int
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wdc_obio_dma_finish(v, channel, drive, read)
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void *v;
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int channel, drive;
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int read;
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{
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/* nothing to do */
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return 0;
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}
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