255 lines
7.1 KiB
C
255 lines
7.1 KiB
C
/* $NetBSD: mcbus.c,v 1.8 2001/05/02 01:24:29 thorpej Exp $ */
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/*
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* Copyright (c) 1998 by Matthew Jacob
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* NASA AMES Research Center.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice immediately at the beginning of the file, without modification,
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* this list of conditions, and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. The name of the author may not be used to endorse or promote products
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* derived from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
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* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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/*
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* Autoconfiguration routines for the MCBUS system
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* bus found on AlphaServer 4100 systems.
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*/
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#include <sys/cdefs.h> /* RCS ID & Copyright macro defns */
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__KERNEL_RCSID(0, "$NetBSD: mcbus.c,v 1.8 2001/05/02 01:24:29 thorpej Exp $");
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/device.h>
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#include <sys/malloc.h>
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#include <machine/autoconf.h>
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#include <machine/rpb.h>
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#include <machine/pte.h>
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#include <alpha/mcbus/mcbusreg.h>
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#include <alpha/mcbus/mcbusvar.h>
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#include <alpha/pci/mcpciareg.h>
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#include "locators.h"
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#define KV(_addr) ((caddr_t)ALPHA_PHYS_TO_K0SEG((_addr)))
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#define MCPCIA_EXISTS(mid, gid) \
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(!badaddr((void *)KV(MCPCIA_BRIDGE_ADDR(gid, mid)), sizeof (u_int32_t)))
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extern struct cfdriver mcbus_cd;
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struct mcbus_cpu_busdep mcbus_primary;
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static int mcbusmatch __P((struct device *, struct cfdata *, void *));
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static void mcbusattach __P((struct device *, struct device *, void *));
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static int mcbusprint __P((void *, const char *));
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static int mcbussbm __P((struct device *, struct cfdata *, void *));
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static char *mcbus_node_type_str __P((u_int8_t));
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typedef struct {
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struct device mcbus_dev;
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u_int8_t mcbus_types[MCBUS_MID_MAX];
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} mcbus_softc_t;
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struct cfattach mcbus_ca = {
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sizeof (mcbus_softc_t), mcbusmatch, mcbusattach
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};
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/*
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* Tru64 UNIX (formerly Digital UNIX (formerly DEC OSF/1)) probes for MCPCIAs
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* in the following order:
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*
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* 5, 4, 7, 6
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*
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* This is so that the built-in CD-ROM on the internal 53c810 is always
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* dka500. We probe them in the same order, for consistency.
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*/
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const int mcbus_mcpcia_probe_order[] = { 5, 4, 7, 6 };
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extern void mcpcia_config_cleanup __P((void));
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static int
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mcbusprint(aux, cp)
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void *aux;
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const char *cp;
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{
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struct mcbus_dev_attach_args *tap = aux;
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printf(" mid %d: %s", tap->ma_mid, mcbus_node_type_str(tap->ma_type));
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return (UNCONF);
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}
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static int
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mcbussbm(parent, cf, aux)
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struct device *parent;
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struct cfdata *cf;
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void *aux;
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{
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struct mcbus_dev_attach_args *tap = aux;
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if (tap->ma_name != mcbus_cd.cd_name)
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return (0);
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if (cf->cf_loc[MCBUSCF_MID] != MCBUSCF_MID_DEFAULT &&
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cf->cf_loc[MCBUSCF_MID] != tap->ma_mid)
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return (0);
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return ((*cf->cf_attach->ca_match)(parent, cf, aux));
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}
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static int
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mcbusmatch(parent, cf, aux)
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struct device *parent;
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struct cfdata *cf;
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void *aux;
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{
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struct mainbus_attach_args *ma = aux;
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/* Make sure we're looking for a MCBUS. */
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if (strcmp(ma->ma_name, mcbus_cd.cd_name) != 0)
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return (0);
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/*
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* Only available on 4100 processor type platforms.
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*/
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if (cputype != ST_DEC_4100)
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return (0);
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return (1);
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}
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static void
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mcbusattach(parent, self, aux)
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struct device *parent;
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struct device *self;
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void *aux;
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{
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static const char *bcs[CPU_BCacheMask + 1] = {
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"No", "1MB", "2MB", "4MB",
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};
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struct mcbus_dev_attach_args ta;
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mcbus_softc_t *mbp = (mcbus_softc_t *)self;
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int i, mid;
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printf(": %s BCache\n", mcbus_primary.mcbus_valid ?
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bcs[mcbus_primary.mcbus_bcache] : "Unknown");
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mbp->mcbus_types[0] = MCBUS_TYPE_RES;
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for (mid = 1; mid <= MCBUS_MID_MAX; ++mid)
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mbp->mcbus_types[mid] = MCBUS_TYPE_UNK;
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/*
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* Find and "configure" memory.
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*/
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ta.ma_name = mcbus_cd.cd_name;
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/*
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* XXX If we ever support more than one MCBUS, we'll
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* XXX have to probe for them, and map them to unit
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* XXX numbers.
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*/
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ta.ma_gid = MCBUS_GID_FROM_INSTANCE(0);
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ta.ma_mid = 1;
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ta.ma_type = MCBUS_TYPE_MEM;
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mbp->mcbus_types[1] = MCBUS_TYPE_MEM;
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(void) config_found_sm(self, &ta, mcbusprint, mcbussbm);
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/*
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* Now find PCI busses.
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*/
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for (i = 0; i < MCPCIA_PER_MCBUS; i++) {
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mid = mcbus_mcpcia_probe_order[i];
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ta.ma_name = mcbus_cd.cd_name;
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/*
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* XXX If we ever support more than one MCBUS, we'll
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* XXX have to probe for them, and map them to unit
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* XXX numbers.
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*/
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ta.ma_gid = MCBUS_GID_FROM_INSTANCE(0);
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ta.ma_mid = mid;
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ta.ma_type = MCBUS_TYPE_PCI;
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if (MCPCIA_EXISTS(ta.ma_mid, ta.ma_gid))
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(void) config_found_sm(self, &ta, mcbusprint, mcbussbm);
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}
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#if 0
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/*
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* Deal with hooking CPU instances to MCBUS module ids.
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*
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* Note that we do this here because it's the read of
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* stupid MCPCIA WHOAMI register that can get us the
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* module ID and type of the configuring CPU.
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*/
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if (mcbus_primary.mcbus_valid) {
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mid = mcbus_primary.mcbus_cpu_mid;
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printf("%s mid %d: %s %s\n", self->dv_xname,
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mid, mcbus_node_type_str(MCBUS_TYPE_CPU),
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bcs[mcbus_primary.mcbus_bcache & 0x7]);
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ta.ma_name = mcbus_cd.cd_name;
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/*
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* XXX If we ever support more than one MCBUS, we'll
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* XXX have to probe for them, and map them to unit
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* XXX numbers.
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*/
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ta.ma_gid = MCBUS_GID_FROM_INSTANCE(0);
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ta.ma_mid = mid;
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ta.ma_type = MCBUS_TYPE_CPU;
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mbp->mcbus_types[mid] = MCBUS_TYPE_CPU;
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(void) config_found_sm(self, &ta, mcbusprint, mcbussbm);
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}
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#endif
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/*
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* Now clean up after configuring everything.
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*
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* This is an unfortunate layering violation- but
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* we can't enable interrupts until *all* probing
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* is done, but the code and knowledge to clean
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* up after probing and to enable interrupts is
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* down in the MCPCIA layer.
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*/
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mcpcia_config_cleanup();
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}
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static char *
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mcbus_node_type_str(type)
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u_int8_t type;
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{
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switch (type) {
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case MCBUS_TYPE_RES:
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panic ("RESERVED TYPE IN MCBUS_NODE_TYPE_STR");
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break;
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case MCBUS_TYPE_UNK:
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panic ("UNKNOWN TYPE IN MCBUS_NODE_TYPE_STR");
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break;
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case MCBUS_TYPE_MEM:
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return ("Memory");
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case MCBUS_TYPE_CPU:
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return ("CPU");
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case MCBUS_TYPE_PCI:
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return ("PCI Bridge");
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default:
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panic("REALLY UNKNWON (%x) TYPE IN MCBUS_NODE_TYPE_STR", type);
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break;
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}
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}
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