311 lines
8.4 KiB
C
311 lines
8.4 KiB
C
/* $NetBSD: pci_map.c,v 1.8 2000/06/28 17:32:48 thorpej Exp $ */
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/*-
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* Copyright (c) 1998, 2000 The NetBSD Foundation, Inc.
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* All rights reserved.
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*
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* This code is derived from software contributed to The NetBSD Foundation
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* by Charles M. Hannum; by William R. Studenmund; by Jason R. Thorpe.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by the NetBSD
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* Foundation, Inc. and its contributors.
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* 4. Neither the name of The NetBSD Foundation nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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/*
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* PCI device mapping.
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*/
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/device.h>
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#include <dev/pci/pcireg.h>
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#include <dev/pci/pcivar.h>
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static int pci_io_find __P((pci_chipset_tag_t, pcitag_t, int, pcireg_t,
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bus_addr_t *, bus_size_t *, int *));
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static int pci_mem_find __P((pci_chipset_tag_t, pcitag_t, int, pcireg_t,
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bus_addr_t *, bus_size_t *, int *));
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static int
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pci_io_find(pc, tag, reg, type, basep, sizep, flagsp)
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pci_chipset_tag_t pc;
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pcitag_t tag;
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int reg;
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pcireg_t type;
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bus_addr_t *basep;
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bus_size_t *sizep;
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int *flagsp;
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{
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pcireg_t address, mask;
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int s;
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if (reg < PCI_MAPREG_START ||
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#if 0
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/*
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* Can't do this check; some devices have mapping registers
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* way out in left field.
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*/
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reg >= PCI_MAPREG_END ||
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#endif
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(reg & 3))
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panic("pci_io_find: bad request");
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/*
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* Section 6.2.5.1, `Address Maps', tells us that:
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*
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* 1) The builtin software should have already mapped the device in a
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* reasonable way.
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*
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* 2) A device which wants 2^n bytes of memory will hardwire the bottom
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* n bits of the address to 0. As recommended, we write all 1s and see
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* what we get back.
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*/
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s = splhigh();
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address = pci_conf_read(pc, tag, reg);
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pci_conf_write(pc, tag, reg, 0xffffffff);
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mask = pci_conf_read(pc, tag, reg);
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pci_conf_write(pc, tag, reg, address);
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splx(s);
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if (PCI_MAPREG_TYPE(address) != PCI_MAPREG_TYPE_IO) {
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printf("pci_io_find: expected type i/o, found mem\n");
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return (1);
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}
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if (PCI_MAPREG_IO_SIZE(mask) == 0) {
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printf("pci_io_find: void region\n");
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return (1);
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}
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if (basep != 0)
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*basep = PCI_MAPREG_IO_ADDR(address);
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if (sizep != 0)
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*sizep = PCI_MAPREG_IO_SIZE(mask);
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if (flagsp != 0)
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*flagsp = 0;
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return (0);
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}
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static int
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pci_mem_find(pc, tag, reg, type, basep, sizep, flagsp)
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pci_chipset_tag_t pc;
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pcitag_t tag;
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int reg;
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pcireg_t type;
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bus_addr_t *basep;
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bus_size_t *sizep;
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int *flagsp;
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{
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pcireg_t address, mask, address1 = 0, mask1 = 0xffffffff;
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u_int64_t waddress, wmask;
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int s, is64bit;
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is64bit = (PCI_MAPREG_MEM_TYPE(type) == PCI_MAPREG_MEM_TYPE_64BIT);
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if (reg < PCI_MAPREG_START ||
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#if 0
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/*
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* Can't do this check; some devices have mapping registers
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* way out in left field.
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*/
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reg >= PCI_MAPREG_END ||
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#endif
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(reg & 3))
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panic("pci_mem_find: bad request");
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if (is64bit && (reg + 4) >= PCI_MAPREG_END)
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panic("pci_mem_find: bad 64-bit request");
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/*
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* Section 6.2.5.1, `Address Maps', tells us that:
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*
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* 1) The builtin software should have already mapped the device in a
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* reasonable way.
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*
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* 2) A device which wants 2^n bytes of memory will hardwire the bottom
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* n bits of the address to 0. As recommended, we write all 1s and see
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* what we get back.
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*/
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s = splhigh();
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address = pci_conf_read(pc, tag, reg);
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pci_conf_write(pc, tag, reg, 0xffffffff);
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mask = pci_conf_read(pc, tag, reg);
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pci_conf_write(pc, tag, reg, address);
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if (is64bit) {
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address1 = pci_conf_read(pc, tag, reg + 4);
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pci_conf_write(pc, tag, reg + 4, 0xffffffff);
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mask1 = pci_conf_read(pc, tag, reg + 4);
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pci_conf_write(pc, tag, reg + 4, address1);
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}
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splx(s);
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if (PCI_MAPREG_TYPE(address) != PCI_MAPREG_TYPE_MEM) {
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printf("pci_mem_find: expected type mem, found i/o\n");
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return (1);
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}
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if (PCI_MAPREG_MEM_TYPE(address) != PCI_MAPREG_MEM_TYPE(type)) {
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printf("pci_mem_find: expected mem type %08x, found %08x\n",
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PCI_MAPREG_MEM_TYPE(type),
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PCI_MAPREG_MEM_TYPE(address));
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return (1);
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}
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waddress = (u_int64_t)address1 << 32UL | address;
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wmask = (u_int64_t)mask1 << 32UL | mask;
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if (PCI_MAPREG_MEM64_SIZE(wmask) == 0) {
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printf("pci_mem_find: void region\n");
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return (1);
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}
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switch (PCI_MAPREG_MEM_TYPE(address)) {
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case PCI_MAPREG_MEM_TYPE_32BIT:
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case PCI_MAPREG_MEM_TYPE_32BIT_1M:
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break;
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case PCI_MAPREG_MEM_TYPE_64BIT:
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/*
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* Handle the case of a 64-bit memory register on a
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* platform with 32-bit addressing. Make sure that
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* the address assigned and the device's memory size
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* fit in 32 bits. We implicitly assume that if
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* bus_addr_t is 64-bit, then so is bus_size_t.
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*/
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if (sizeof(u_int64_t) > sizeof(bus_addr_t) &&
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(address1 != 0 || mask1 != 0xffffffff)) {
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printf("pci_mem_find: 64-bit memory map which is "
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"inaccessible on a 32-bit platform\n");
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return (1);
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}
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break;
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default:
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printf("pci_mem_find: reserved mapping register type\n");
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return (1);
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}
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if (sizeof(u_int64_t) > sizeof(bus_addr_t)) {
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if (basep != 0)
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*basep = PCI_MAPREG_MEM_ADDR(address);
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if (sizep != 0)
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*sizep = PCI_MAPREG_MEM_SIZE(mask);
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} else {
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if (basep != 0)
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*basep = PCI_MAPREG_MEM64_ADDR(waddress);
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if (sizep != 0)
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*sizep = PCI_MAPREG_MEM64_SIZE(wmask);
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}
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if (flagsp != 0)
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*flagsp = PCI_MAPREG_MEM_PREFETCHABLE(address) ?
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BUS_SPACE_MAP_PREFETCHABLE : 0;
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return (0);
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}
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pcireg_t
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pci_mapreg_type(pc, tag, reg)
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pci_chipset_tag_t pc;
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pcitag_t tag;
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int reg;
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{
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pcireg_t rv;
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rv = pci_conf_read(pc, tag, reg);
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if (PCI_MAPREG_TYPE(rv) == PCI_MAPREG_TYPE_IO)
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rv &= PCI_MAPREG_TYPE_MASK;
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else
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rv &= PCI_MAPREG_TYPE_MASK|PCI_MAPREG_MEM_TYPE_MASK;
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return (rv);
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}
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int
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pci_mapreg_info(pc, tag, reg, type, basep, sizep, flagsp)
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pci_chipset_tag_t pc;
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pcitag_t tag;
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int reg;
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pcireg_t type;
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bus_addr_t *basep;
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bus_size_t *sizep;
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int *flagsp;
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{
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if (PCI_MAPREG_TYPE(type) == PCI_MAPREG_TYPE_IO)
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return (pci_io_find(pc, tag, reg, type, basep, sizep,
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flagsp));
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else
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return (pci_mem_find(pc, tag, reg, type, basep, sizep,
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flagsp));
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}
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int
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pci_mapreg_map(pa, reg, type, busflags, tagp, handlep, basep, sizep)
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struct pci_attach_args *pa;
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int reg, busflags;
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pcireg_t type;
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bus_space_tag_t *tagp;
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bus_space_handle_t *handlep;
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bus_addr_t *basep;
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bus_size_t *sizep;
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{
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bus_space_tag_t tag;
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bus_space_handle_t handle;
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bus_addr_t base;
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bus_size_t size;
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int flags;
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if (PCI_MAPREG_TYPE(type) == PCI_MAPREG_TYPE_IO) {
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if ((pa->pa_flags & PCI_FLAGS_IO_ENABLED) == 0)
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return (1);
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if (pci_io_find(pa->pa_pc, pa->pa_tag, reg, type, &base,
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&size, &flags))
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return (1);
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tag = pa->pa_iot;
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} else {
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if ((pa->pa_flags & PCI_FLAGS_MEM_ENABLED) == 0)
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return (1);
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if (pci_mem_find(pa->pa_pc, pa->pa_tag, reg, type, &base,
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&size, &flags))
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return (1);
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tag = pa->pa_memt;
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}
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if (bus_space_map(tag, base, size, busflags | flags, &handle))
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return (1);
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if (tagp != 0)
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*tagp = tag;
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if (handlep != 0)
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*handlep = handle;
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if (basep != 0)
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*basep = base;
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if (sizep != 0)
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*sizep = size;
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return (0);
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}
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