198 lines
5.7 KiB
Plaintext
198 lines
5.7 KiB
Plaintext
$NetBSD: TODO,v 1.13 2000/06/17 09:18:39 soda Exp $
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To do list (not in any particular order).
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o XXX at least 2000/06/07 version is already quite unstable
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on PICA and NEC Image RISCstation. (but almost OK on Magnum)
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Userland commands dumps core randomly.
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This version is before _MIPS_PADDR_T_64BIT changes
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and MIPS3_TLB_WIRED_UPAGES changes.
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o XXX sudden hang up in a few minutes or dozens of minutes.
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2000 Mar 17 -current is OK. Mar 29 is NG.
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o Move the RO and WIRED attribute from the pte to the pv table.
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This saves four instructions in the tlb miss handler.
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o Boot. Standalone boot program instead of booting the kernel directly.
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o Find out why bitmap load to S3-928 flashes screen. (X server)
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Know why (enable linear mode). Need S3 info.
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o Can we have 32 double registers?
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o 64bit kernel/userland
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o NEC RISCstation 2200 support
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- framebuffer?
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- interrupt handling?
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o repair DeskStation support
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- requires bounce buffer bus_dma for Tyne
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- set up rPC44 wired TLB entries explicitly
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o repair Algor support
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- pci/pbcpcibus.c:vtophysaddr(): pbc_version < V96X_VREV_C0 case
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o sysinst
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o install notes
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o www: diskless HOW-TO port-arc specific part.
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o Xserver
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- VXL magnum, some RISCserver 2200
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- vga/S3 pica, Image RISCstation - OpenBSD's?
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- vga/cirrus some RISCserver 2200
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- vga/??? DESKstation Tyne, rPC44
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- TGA RISCserver 2250
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o X clients
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probably pmax binary is good enough.
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o source code structure is quite obsolete,
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general clean up is needed as nisimura-san suggested.
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especially:
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- introduce struct platform and remove ugly ``switch (cputype)''
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in many places.
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- redesign interrupt handler framework to be flexible for
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possible variations; must be sane and useful for R4030/R4230
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'local' devices and any combinations with ISA/EISA/PCI
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- remove inb/outb
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- try to interporate HZ; may be possible for R4030/R4230 system
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or 'hardclock() by R4000' system. Clock resolution of 100Hz
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without any interporation is substandard
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- remove UADDR
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o overblocking on interrupt handler, and related problems
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- SR_INT_IE should be enabled before calling hardclock().
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Since this is not done currently, spllowersoftclock()
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on hardclock() doesn't have effect, and softclock() is
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handled with all interrupt disabled in this case.
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-> overblocking, possibly causes missing hardclock()
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- MIPS3_CLKF_BASEPRI() doesn't work correctly,
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when MIPS_INT_MASK_5 (== MIPS_INT_MASK_CLOCK) is disabled.
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-> micro optimization on hardclock() doesn't work.
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but currently this may make hardclock() latency better
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due to above SR_INT_IE problem.
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s/MIPS_INT_MASK/MIPS3_INT_MASK/ makes this work, although tricky.
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- if (ipending & INT_MASK_REAL_DEV) == 0,
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softnet() and softclock() are handled with all interrupt disabled.
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-> overblocking, possibly causes missing hardclock()
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- softclock() is handled with softnet() disabled.
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-> slightly overblocking
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- `netisr' handling in netintr() implies potential race condition.
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`netisr' access should be protected by splnet().
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currently this is not real problem due to above overblocking.
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`ssir' handling on many mips ports has same problem.
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It should be protected by splnet() or splserial() or splhigh()
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(depends on the highest interrupt level which sets `ssir').
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Since `ssir' is accessed not only by setsoftnet() but also
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by setsoft(), setsoftnet() should protect `ssir' by splserial()
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or something. (i.e. priority level which setsoft() will be called)
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Probably, it is better to split `ssir' variable for each
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priority level.
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also, _clearsoftintr() should be called before `ssir' access.
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currently this is not real problem due to above overblocking.
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- INT_MASK_REAL_DEV should be removed
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- make CLKF_INTR() work.
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- major rework, possibly by software emulated spl.
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splserial()/splsoftserial()
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o it is better to always disable MIPS_INT_MASK_CLOCK.
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those are the points which should be fixed:
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mips_idle: li t0, (MIPS_INT_MASK | MIPS_SR_INT_IE)
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machdep.c: curpcb->pcb_context[11] = MIPS_INT_MASK | MIPS_SR_INT_IE;
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spl0()
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splnone()
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- MIPS_INT_MASK_CLOCK should be removed in someway
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o fix kernel start address
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o allocate PICA_TL_BASE and SONICBUF dynamically
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o merge new wscons
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o fix mem_clusters[] usage.
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o test and merge soren's clean up about proc0.p_addr.
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o parse ARC BIOS configuration information and use it
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o omit __BROKEN_CONFIG_UNIT_USAGE
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o omit __SWAP_BROKEN in <mips/types.h>
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o fix implementation of DELAY(), clean up clock implementation
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o increase MAXPHYS to 64KB
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o asc.c scsi clock/NCR53CF94 handling clean up
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o if_sn.c
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- ether address handling clean up
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- bus_dma'fy
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- bus_space'fy
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- split frontend and backend
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- make this MI, and share with mac68k, newsmips/apbus
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o com_lbus.c clock handling clean up
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o intrcnt[] name cleanup
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o implement NCR 53c700(?) driver for NEC RISCserver 2200,
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RISCstation 2200 and RISCstation 2250.
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based on MI siop driver?
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o audio driver
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o use MI driver
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- use MI ncr53c9x driver instead of home grown asc
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- use MI bha driver instead of home grown btl
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- make fd driver MI, and share it with i386
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(contact christos about MI fd driver)
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- make pccons MI, and share it with i386,
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or simply eliminate pccons
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- LKM
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o ARC boot device name -> NetBSD root device conversion
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o and missing MI devices
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ses?, lkm, vcoda, ...
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o bus_dmamap_sync: Hit_Invalidate and Hit_Write_Back cache operation
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o clean up ALEAF/NLEAF/NON_LEAF/NNON_LEAF in userland.
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o resolve "XXX"
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Lots of other things.....
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