112 lines
4.8 KiB
C
112 lines
4.8 KiB
C
/* $NetBSD: apcdmareg.h,v 1.1 1999/06/05 14:29:10 mrg Exp $ */
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/*-
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* Copyright (c) 1998, 1999 The NetBSD Foundation, Inc.
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* All rights reserved.
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*
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* This code is derived from software contributed to The NetBSD Foundation
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* by Paul Kranenburg.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by the NetBSD
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* Foundation, Inc. and its contributors.
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* 4. Neither the name of The NetBSD Foundation nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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/*
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* APC DMA hardware; from SunOS header
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* Thanks to Derrick J. Brashear for additional info on the
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* meaning of some of these bits.
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*/
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struct apc_dma {
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volatile u_int32_t dmacsr; /* APC CSR */
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volatile u_int32_t lpad[3]; /* */
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volatile u_int32_t dmacva; /* Capture Virtual Address */
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volatile u_int32_t dmacc; /* Capture Count */
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volatile u_int32_t dmacnva; /* Capture Next Virtual Address */
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volatile u_int32_t dmacnc; /* Capture next count */
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volatile u_int32_t dmapva; /* Playback Virtual Address */
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volatile u_int32_t dmapc; /* Playback Count */
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volatile u_int32_t dmapnva; /* Playback Next VAddress */
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volatile u_int32_t dmapnc; /* Playback Next Count */
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};
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/*
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* APC CSR Register bit definitions
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*/
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#define APC_IP 0x00800000 /* Interrupt Pending */
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#define APC_PI 0x00400000 /* Playback interrupt */
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#define APC_CI 0x00200000 /* Capture interrupt */
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#define APC_EI 0x00100000 /* General interrupt */
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#define APC_IE 0x00080000 /* General ext int. enable */
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#define APC_PIE 0x00040000 /* Playback ext intr */
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#define APC_CIE 0x00020000 /* Capture ext intr */
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#define APC_EIE 0x00010000 /* Error ext intr */
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#define APC_PMI 0x00008000 /* Pipe empty interrupt */
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#define APC_PM 0x00004000 /* Play pipe empty */
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#define APC_PD 0x00002000 /* Playback NVA dirty */
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#define APC_PMIE 0x00001000 /* play pipe empty Int enable */
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#define APC_CM 0x00000800 /* Cap data dropped on floor */
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#define APC_CD 0x00000400 /* Capture NVA dirty */
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#define APC_CMI 0x00000200 /* Capture pipe empty interrupt */
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#define APC_CMIE 0x00000100 /* Cap. pipe empty int enable */
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#define APC_PPAUSE 0x00000080 /* Pause the play DMA */
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#define APC_CPAUSE 0x00000040 /* Pause the capture DMA */
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#define APC_CODEC_PDN 0x00000020 /* CODEC RESET */
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#define PDMA_GO 0x00000008
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#define CDMA_GO 0x00000004 /* bit 2 of the csr */
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#define APC_RESET 0x00000001 /* Reset the chip */
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#define APC_BITS \
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"\20\30IP\27PI\26CI\25EI\24IE" \
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"\23PIE\22CIE\21EIE\20PMI\17PM\16PD\15PMIE" \
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"\14CM\13CD\12CMI\11CMIE\10PPAUSE\7CPAUSE\6PDN\4PGO\3CGO"
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/*
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* To start DMA, you write to dma[cp]nva and dma[cp]nc and set [CP]DMA_GO
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* in dmacsr. dma[cp]va and dma[cp]c, when read, appear to be the live
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* counter as the DMA operation progresses.
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* Supposedly, you get an interrupt with the "dirty" bits (APC_PD,APC_CD)
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* set, when the next DMA buffer can be programmed, while the current one
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* is still in progress. We don't currently use this feature, since I
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* haven't been able to make it work.. instead the next buffer goes in
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* as soon as we see a "pipe empty" (APC_PM) interrupt.
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*/
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/* It's not clear if there's a maximum DMA size.. */
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#define APC_MAX (sc->sc_blksz)/*(16*1024)*/
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/*
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* List of device memory allocations (see cs4231_malloc/cs4231_free).
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*/
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struct cs_dma {
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struct cs_dma *next;
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caddr_t addr;
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bus_dma_segment_t segs[1];
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int nsegs;
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size_t size;
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};
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