141 lines
5.9 KiB
C
141 lines
5.9 KiB
C
/* $NetBSD: uda1341.h,v 1.2 2001/07/15 20:19:32 ichiro Exp $ */
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/*-
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* Copyright (c) 2001 The NetBSD Foundation, Inc. All rights reserved.
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*
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* This code is derived from software contributed to The NetBSD Foundation
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* by Ichiro FUKUHARA (ichiro@ichiro.org).
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by the NetBSD
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* Foundation, Inc. and its contributors.
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* 4. Neither the name of The NetBSD Foundation nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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/*
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* Philips UDA1341 L3 type
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*/
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/*
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* Microcontroller L3-interface timing (MIN)
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* expressed in micro-second
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*/
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#define L3_DATA_SETUP 1 /* 190 nsec */
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#define L3_DATA_HOLD 1 /* 30 nsec */
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#define L3_MODE_SETUP 1 /* 190 nsec */
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#define L3_MODE_HOLD 1 /* 190 nsec */
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#define L3_CLK_HIGH 1 /* 250 nsec */
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#define L3_CLK_LOW 1 /* 250 nsec */
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#define L3_HALT 1 /* 190 nsec */
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/*
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* Philips UDA1341 L3 address and command types
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*/
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#define L3_ADDRESS_COM 5
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#define L3_ADDRESS_DATA0 0
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#define L3_ADDRESS_DATA1 1
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#define L3_ADDRESS_STATUS 2
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/*
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* Philips UDA1341 Status control
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*/
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#define STATUS0_RST (1<<0) /* UDA1341 Reset */
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#define STATUS0_SC_512 (0<<4) /* System clock freq.
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512fs */
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#define STATUS0_SC_384 (1<<4) /* 384fs */
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#define STATUS0_SC_256 (2<<4) /* 256fs */
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#define STATUS0_IF_I2S (0<<1) /* Data Input format
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I2C */
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#define STATUS0_IF_LSB16 (1<<1) /* LSB 16 bits */
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#define STATUS0_IF_LSB18 (2<<1) /* LSB 18 bits */
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#define STATUS0_IF_LSB20 (3<<1) /* LSB 20 bits */
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#define STATUS0_IF_MSB (4<<1) /* MSB */
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#define STATUS0_IF_MSB16 (5<<1) /* LSB 16 bits and MSB-output */
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#define STATUS0_IF_MSB18 (6<<1) /* LSB 18 bits and MSB-output */
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#define STATUS0_IF_MSB20 (7<<1) /* LSB 20 bits and MSB-output */
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#define STATUS0_DC (1<<0) /* UDA1341 DC-filter ON */
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#define STATUS1_OGS (1<<6) /* UDA1341 DAC Gain switch */
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#define STATUS1_IGS (1<<5) /* UDA1341 ADC Gain switch */
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#define STATUS1_PAD (1<<4) /* Polarity of ADC is inverting */
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#define STATUS1_PDA (1<<3) /* Polarity of DAC is inverting */
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#define STATUS1_DS (1<<2) /* double speed playback */
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#define STATUS1_PC_OFF (0<<0) /* ADC:off DAC:off */
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#define STATUS1_PC_DAC (1<<0) /* ADC:off DAC:on */
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#define STATUS1_PC_ADC (2<<0) /* ADC:on DAC:off */
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#define STATUS1_PC_ON (3<<0) /* ADC:on DAC:on */
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/*
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* Philips UDA1341 DATA0 control
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*/
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/* Data0 direct programming registers (8 bits) */
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#define DATA0_VC(val) (63 - (((val)+1) * 63) / 100)
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/* Volume control val=(0<->100) */
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#define DATA0_COMMON (0<<6) /* DATA0_0 common bits(6-7) */
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#define DATA1_BB(val) (((((val)+1) * 15) / 100) << 3)
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/* Bass Boost control val=(0<->100) */
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#define DATA1_TR(val) ((((val)+1) * 3) / 100)
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/* Treble control val=(0<->100) */
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#define DATA1_COMMON (1<<6) /* DATA0_1 common bits(6-7) */
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#define DATA2_MODE_FLAT (0<<0) /* Mode filter is flat */
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#define DATA2_MODE_MIN (2<<0) /* Mode filter is minimum */
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#define DATA2_MODE_MAX (3<<0) /* Mode filter is maximum */
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#define DATA2_MUTE (1<<2) /* Mute on */
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#define DATA2_PP (1<<5) /* Peak Detection */
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#define DATA2_COMMON (2<<6) /* DATA0_2 common bits(6-7) */
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/* Data0 extended programming registers (16 bits) */
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#define EXT_ADDR_COMMON (3<<6) /* Extended Address Common bits */
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# define EXT_ADDR_E0 0 /* Extended Address of E0 */
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# define EXT_ADDR_E1 1 /* Extended Address of E1 */
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# define EXT_ADDR_E2 2 /* Extended Address of E2 */
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# define EXT_ADDR_E3 4 /* Extended Address of E3 */
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# define EXT_ADDR_E4 5 /* Extended Address of E4 */
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# define EXT_ADDR_E5 6 /* Extended Address of E5 */
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#define EXT_DATA_COMMN (7<<5) /* Extended Data Common bits */
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#define DATA_E0_MA(val) ((((val) + 1) * 31) / 100)
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/* mixer gain control val=(0<->100) */
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#define DATA_E1_MB(val) ((((val) + 1) * 31) / 100)
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/* mixer gain control val=(0<->100) */
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#define DATA_E2_MS(val) (((((val) + 1) * 6) / 100) << 3)
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/* MIC sensitivity control val=(0<->100) */
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#define DATA_E2_MM0 0 /* Double differential mode */
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#define DATA_E2_MM1 1 /* input channel 1 select */
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#define DATA_E2_MM2 2 /* input channel 2 select */
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#define DATA_E2_MM3 3 /* digital mixer mode */
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#define DATA_E3_AG (1<<4) /* AGC control ON */
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#define DATA_E3_IG_L(val) (((val * 127) / 100) & 3)
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/* Input AMP-Gain control (low 2 bits) */
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#define DATA_E4_IG_H(val) (((val * 127) / 100) >> 2)
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/* Input AMP-Gain control (high 5 bits) */
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#define DATA_E5_AL(val) (((val + 1) * 3) / 100)
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/* AGC output level val=(0<->100) */
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/* end of uda1341.h */
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