NetBSD/sys/arch/evbsh5/conf/SIMULATOR

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# $NetBSD: SIMULATOR,v 1.12 2006/08/12 15:29:53 christos Exp $
# NetBSD/sh5 on the simple `chess' based simulator.
#
# This won't get to single-user, but it serves as a useful way to debug
# startup code.
include "arch/evbsh5/conf/std.evbsh5.el"
maxusers 2
options INCLUDE_CONFIG_FILE
options SYSCTL_INCLUDE_DESCR # Include sysctl descriptions in kernel
options SH5_SIM
options KERNEL_IPT_SIZE=0x8000
options SH5_CPU_SPEED=10
#ident "SIMULATOR-$Revision: 1.12 $"
# Uncomment this to build a 64-bit kernel
#makeoptions SH5_ABI=64
makeoptions DEFCOPTS="-g"
makeoptions DEBUG="-g"
options DIAGNOSTIC
options DEBUG
options DDB
options KTRACE # system call tracing via ktrace(1)
#options SYSTRACE # system call vetting via systrace(1)
file-system FFS
file-system KERNFS
file-system MFS
options FFS_NO_SNAPSHOT # No FFS snapshot support
options INET
config netbsd root on ? type ?
pseudo-device loop
pseudo-device bpfilter
pseudo-device pty
pseudo-device rnd
# The mainbus to which all devices attach
mainbus0 at root
#
# The SuperHyway bus is the main interconnect between the constituent
# "modules" which make up an SH-5 system
#
superhyway0 at mainbus0
#
# Only the CPU and a cut-down Peripheral Bridge module exists on the simulator.
#
cpu0 at superhyway0 pport 0x0d # A single CPU
pbridge0 at superhyway0 pport 0x09 # Peripheral Bridge
#
# The simulated Peripheral Bridge has the following devices:
#
cprc0 at pbridge0 # Clock, Power & Reset Control
intc0 at pbridge0 # Interrupt controller
tmu0 at pbridge0 ipl 14 intevt 0x400 # Timer
rtc0 at pbridge0 # Battery-backed Date/Time chip
clock0 at cprc0 # Primary clock generator
#
# The DTF debug interface.
#
dtfcons0 at mainbus0