278 lines
7.7 KiB
C
278 lines
7.7 KiB
C
/* $NetBSD: tlsb.c,v 1.31 2005/12/11 12:16:21 christos Exp $ */
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/*
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* Copyright (c) 1997 by Matthew Jacob
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* NASA AMES Research Center.
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* All rights reserved.
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*
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* Based in part upon a prototype version by Jason Thorpe
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* Copyright (c) 1996, 1998 by Jason Thorpe.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice immediately at the beginning of the file, without modification,
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* this list of conditions, and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. The name of the author may not be used to endorse or promote products
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* derived from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
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* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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/*
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* Autoconfiguration and support routines for the TurboLaser System Bus
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* found on AlphaServer 8200 and 8400 systems.
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*/
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#include <sys/cdefs.h> /* RCS ID & Copyright macro defns */
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__KERNEL_RCSID(0, "$NetBSD: tlsb.c,v 1.31 2005/12/11 12:16:21 christos Exp $");
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#include "opt_multiprocessor.h"
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/device.h>
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#include <sys/malloc.h>
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#include <machine/autoconf.h>
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#include <machine/cpu.h>
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#include <machine/cpuvar.h>
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#include <machine/rpb.h>
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#include <machine/pte.h>
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#include <machine/alpha.h>
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#include <alpha/tlsb/tlsbreg.h>
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#include <alpha/tlsb/tlsbvar.h>
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#include "locators.h"
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#define KV(_addr) ((caddr_t)ALPHA_PHYS_TO_K0SEG((_addr)))
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static int tlsbmatch __P((struct device *, struct cfdata *, void *));
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static void tlsbattach __P((struct device *, struct device *, void *));
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CFATTACH_DECL(tlsb, sizeof (struct device),
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tlsbmatch, tlsbattach, NULL, NULL);
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extern struct cfdriver tlsb_cd;
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static int tlsbprint __P((void *, const char *));
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static const char *tlsb_node_type_str __P((u_int32_t));
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/*
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* There can be only one TurboLaser, and we'll overload it
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* with a bitmap of found turbo laser nodes. Note that
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* these are just the actual hard TL node IDS that we
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* discover here, not the virtual IDs that get assigned
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* to CPUs. During TLSB specific error handling we
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* only need to know which actual TLSB slots have boards
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* in them (irrespective of how many CPUs they have).
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*/
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int tlsb_found;
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static int
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tlsbprint(aux, pnp)
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void *aux;
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const char *pnp;
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{
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struct tlsb_dev_attach_args *tap = aux;
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if (pnp)
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aprint_normal("%s at %s node %d",
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tlsb_node_type_str(tap->ta_dtype), pnp, tap->ta_node);
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else
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aprint_normal(" node %d: %s", tap->ta_node,
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tlsb_node_type_str(tap->ta_dtype));
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return (UNCONF);
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}
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static int
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tlsbmatch(parent, cf, aux)
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struct device *parent;
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struct cfdata *cf;
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void *aux;
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{
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struct mainbus_attach_args *ma = aux;
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/* Make sure we're looking for a TurboLaser. */
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if (strcmp(ma->ma_name, tlsb_cd.cd_name) != 0)
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return (0);
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/*
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* Only one instance of TurboLaser allowed,
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* and only available on 21000 processor type
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* platforms.
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*/
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if ((cputype != ST_DEC_21000) || tlsb_found)
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return (0);
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return (1);
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}
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static void
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tlsbattach(parent, self, aux)
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struct device *parent;
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struct device *self;
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void *aux;
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{
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struct tlsb_dev_attach_args ta;
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u_int32_t tldev;
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int node;
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int locs[TLSBCF_NLOCS];
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printf("\n");
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/*
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* Attempt to find all devices on the bus, including
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* CPUs, memory modules, and I/O modules.
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*/
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/*
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* Sigh. I would like to just start off nicely,
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* but I need to treat I/O modules differently-
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* The highest priority I/O node has to be in
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* node #8, and I want to find it *first*, since
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* it will have the primary disks (most likely)
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* on it.
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*/
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for (node = 0; node <= TLSB_NODE_MAX; ++node) {
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/*
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* Check for invalid address. This may not really
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* be necessary, but what the heck...
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*/
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if (badaddr(TLSB_NODE_REG_ADDR(node, TLDEV), sizeof(u_int32_t)))
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continue;
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tldev = TLSB_GET_NODEREG(node, TLDEV);
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if (tldev == 0) {
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/* Nothing at this node. */
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continue;
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}
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/*
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* Store up that we found something at this node.
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* We do this so that we don't have to do something
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* silly at fault time like try a 'baddadr'...
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*/
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tlsb_found |= (1 << node);
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if (TLDEV_ISIOPORT(tldev))
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continue; /* not interested right now */
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ta.ta_node = node;
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ta.ta_dtype = TLDEV_DTYPE(tldev);
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ta.ta_swrev = TLDEV_SWREV(tldev);
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ta.ta_hwrev = TLDEV_HWREV(tldev);
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/*
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* Deal with hooking CPU instances to TurboLaser nodes.
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*/
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if (TLDEV_ISCPU(tldev)) {
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printf("%s node %d: %s\n", self->dv_xname,
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node, tlsb_node_type_str(tldev));
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}
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/*
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* Attach any children nodes, including a CPU's GBus
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*/
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locs[TLSBCF_NODE] = node;
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locs[TLSBCF_OFFSET] = 0; /* XXX unused? */
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config_found_sm_loc(self, "tlsb", locs, &ta,
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tlsbprint, config_stdsubmatch);
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}
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/*
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* *Now* search for I/O nodes (in descending order)
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*/
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while (--node > 0) {
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if (badaddr(TLSB_NODE_REG_ADDR(node, TLDEV), sizeof(u_int32_t)))
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continue;
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tldev = TLSB_GET_NODEREG(node, TLDEV);
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if (tldev == 0) {
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continue;
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}
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if (TLDEV_ISIOPORT(tldev)) {
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#if defined(MULTIPROCESSOR)
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/*
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* XXX Eventually, we want to select a secondary
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* XXX processor on which to field interrupts for
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* XXX this node. However, we just send them to
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* XXX the primary CPU for now.
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*
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* XXX Maybe multiple CPUs? Does the hardware
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* XXX round-robin, or check the length of the
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* XXX per-CPU interrupt queue?
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*/
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printf("%s node %d: routing interrupts to %s\n",
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self->dv_xname, node,
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cpu_info[hwrpb->rpb_primary_cpu_id]->ci_softc->sc_dev.dv_xname);
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TLSB_PUT_NODEREG(node, TLCPUMASK,
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(1UL << hwrpb->rpb_primary_cpu_id));
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#else
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/*
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* Make sure interrupts are sent to the primary CPU.
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*/
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TLSB_PUT_NODEREG(node, TLCPUMASK,
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(1UL << hwrpb->rpb_primary_cpu_id));
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#endif /* MULTIPROCESSOR */
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ta.ta_node = node;
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ta.ta_dtype = TLDEV_DTYPE(tldev);
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ta.ta_swrev = TLDEV_SWREV(tldev);
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ta.ta_hwrev = TLDEV_HWREV(tldev);
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locs[TLSBCF_NODE] = node;
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locs[TLSBCF_OFFSET] = 0; /* XXX unused? */
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config_found_sm_loc(self, "tlsb", locs, &ta,
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tlsbprint, config_stdsubmatch);
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}
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}
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}
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static const char *
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tlsb_node_type_str(dtype)
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u_int32_t dtype;
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{
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static char tlsb_line[64];
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switch (dtype & TLDEV_DTYPE_MASK) {
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case TLDEV_DTYPE_KFTHA:
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return ("KFTHA I/O interface");
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case TLDEV_DTYPE_KFTIA:
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return ("KFTIA I/O interface");
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case TLDEV_DTYPE_MS7CC:
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return ("MS7CC Memory Module");
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case TLDEV_DTYPE_SCPU4:
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return ("Single CPU, 4MB cache");
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case TLDEV_DTYPE_SCPU16:
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return ("Single CPU, 16MB cache");
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case TLDEV_DTYPE_DCPU4:
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return ("Dual CPU, 4MB cache");
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case TLDEV_DTYPE_DCPU16:
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return ("Dual CPU, 16MB cache");
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default:
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memset(tlsb_line, 0, sizeof(tlsb_line));
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sprintf(tlsb_line, "unknown, dtype 0x%x", dtype);
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return (tlsb_line);
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}
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/* NOTREACHED */
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}
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