drochner ba0f309a91 Before checking the (Intel specific) SCR_T4 register, make ... sure the chip implements 100T4 (in BMSR). The 82562 (which doesn't implement 100T4) has the SCR_T4 bit (always?) set, which led to wrong media status reports. approved by thorpej		2003-03-27 19:36:49 +00:00
..
acphy.c
acphyreg.h
amhphy.c
amhphyreg.h
bmtphy.c
bmtphyreg.h
brgphy.c
brgphyreg.h
devlist2h.awk
dmphy.c
dmphyreg.h
exphy.c
files.mii
gentbi.c
glxtphy.c
glxtphyreg.h
gphyter.c
gphyterreg.h
icsphy.c
icsphyreg.h
inphy.c	Before checking the (Intel specific) SCR_T4 register, make	2003-03-27 19:36:49 +00:00
inphyreg.h
iophy.c
iophyreg.h
lxtphy.c
lxtphyreg.h
Makefile.miidevs
makphy.c
makphyreg.h
mii_bitbang.c
mii_bitbang.h
mii_physubr.c
mii.c
mii.h
miidevs
miidevs_data.h
miidevs.h
miivar.h
nsphy.c
nsphyreg.h
nsphyter.c
nsphyterreg.h
pnaphy.c
qsphy.c
qsphyreg.h
sqphy.c
sqphyreg.h
tlphy.c
tlphyreg.h
tlphyvar.h
tqphy.c
tqphyreg.h
ukphy_subr.c
ukphy.c
urlphy.c
urlphyreg.h