142 lines
4.7 KiB
C
142 lines
4.7 KiB
C
/* $NetBSD: sbdvar.h,v 1.3 2007/03/04 05:59:47 christos Exp $ */
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/*-
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* Copyright (c) 2004, 2005 The NetBSD Foundation, Inc.
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* All rights reserved.
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*
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* This code is derived from software contributed to The NetBSD Foundation
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* by UCHIYAMA Yasushi.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by the NetBSD
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* Foundation, Inc. and its contributors.
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* 4. Neither the name of The NetBSD Foundation nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef _EWS4800MIPS_SBDVAR_H_
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#define _EWS4800MIPS_SBDVAR_H_
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#include <sys/kcore.h> /* phys_ram_seg_t */
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#include <machine/autoconf.h> /* mainbus_attach_args */
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#include <machine/vmparam.h> /* VM_PHYSSEG_MAX */
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#include <machine/sbd.h> /* enum sbd_machine_type */
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#include <machine/sbdiovar.h> /* sbdio_attach_args */
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/* Software representation of system board */
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struct sbd {
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/* Machine identification */
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enum sbd_machine_type machine;
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char name[32];
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int cpu_clock;
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/* mainbus node table */
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const char **mainbusdevs;
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/* System Board I/O device table */
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const struct sbdiodevdesc *sbdiodevs;
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/* Memory */
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phys_ram_seg_t mem_clseters[VM_PHYSSEG_MAX];
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size_t mem_size; /* total size of memory */
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void (*mem_init)(void *, void *);
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/* Cache configuration (determine L2-cache size) */
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void (*cache_config)(void);
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/* Write buffer */
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void (*wbflush)(void);
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/* Interrupt services */
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void (*intr_init)(void);
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void *(*intr_establish)(int, int (*)(void *), void *);
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void (*intr_disestablish)(void *);
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void (*intr)(uint32_t, uint32_t, uint32_t, uint32_t);
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/* Interval timer helper routines */
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void (*initclocks)(void);
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/* Miscellaneous */
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void (*consinit)(void);
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int (*ipl_bootdev)(void);
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void (*reboot)(void);
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void (*poweroff)(void);
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void (*ether_addr)(uint8_t *);
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};
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#define SBD_DECL(x) \
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void x ## _cache_config(void); \
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void x ## _wbflush(void); \
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void x ## _mem_init(void *, void *); \
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void x ## _intr_init(void); \
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void *x ## _intr_establish(int, int (*)(void *), void *); \
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void x ## _intr_disestablish(void *); \
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void x ## _intr(uint32_t, uint32_t, uint32_t, uint32_t); \
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void x ## _initclocks(void); \
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void x ## _consinit(void); \
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int x ## _ipl_bootdev(void); \
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void x ## _reboot(void); \
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void x ## _poweroff(void); \
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void x ## _ether_addr(uint8_t *); \
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extern const uint32_t x ## _sr_bits[]
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#define _SBD_OPS_SET(m, x) platform . x = m ## _ ## x
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#define _SBD_OPS_REGISTER_ALL(m) \
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_SBD_OPS_SET(m, cache_config); \
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_SBD_OPS_SET(m, wbflush); \
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_SBD_OPS_SET(m, mem_init); \
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_SBD_OPS_SET(m, intr_init); \
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_SBD_OPS_SET(m, intr_establish); \
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_SBD_OPS_SET(m, intr_disestablish); \
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_SBD_OPS_SET(m, intr); \
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_SBD_OPS_SET(m, initclocks); \
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_SBD_OPS_SET(m, consinit); \
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_SBD_OPS_SET(m, ipl_bootdev); \
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_SBD_OPS_SET(m, reboot); \
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_SBD_OPS_SET(m, poweroff); \
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_SBD_OPS_SET(m, ether_addr); \
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extern struct sbd platform;
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extern int mem_cluster_cnt;
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extern phys_ram_seg_t mem_clusters[VM_PHYSSEG_MAX];
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void sbd_init(void);
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void sbd_set_mainfo(uint32_t);
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void sbd_memcluster_init(uint32_t);
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void sbd_memcluster_setup(void *, void *);
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void sbd_memcluster_check(void);
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void tr2_init(void);
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void tr2a_init(void);
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#endif /* !_EWS4800MIPS_SBDVAR_H_ */
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