271 lines
6.8 KiB
C
271 lines
6.8 KiB
C
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/* $NetBSD: scmdspi.c,v 1.3 2022/01/19 05:21:44 thorpej Exp $ */
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/*
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* Copyright (c) 2021 Brad Spencer <brad@anduin.eldar.org>
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*
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* Permission to use, copy, modify, and distribute this software for any
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* purpose with or without fee is hereby granted, provided that the above
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* copyright notice and this permission notice appear in all copies.
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*
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* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
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* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
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* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
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* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
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* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
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* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: scmdspi.c,v 1.3 2022/01/19 05:21:44 thorpej Exp $");
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/*
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* SPI driver for the Sparkfun Serial motor controller.
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* Uses the common scmd driver to do the real work.
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*/
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/kernel.h>
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#include <sys/device.h>
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#include <sys/module.h>
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#include <sys/conf.h>
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#include <sys/sysctl.h>
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#include <sys/mutex.h>
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#include <sys/condvar.h>
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#include <sys/pool.h>
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#include <sys/kmem.h>
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#include <dev/i2c/i2cvar.h>
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#include <dev/spi/spivar.h>
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#include <dev/ic/scmdreg.h>
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#include <dev/ic/scmdvar.h>
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extern void scmd_attach(struct scmd_sc *);
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static int scmdspi_match(device_t, cfdata_t, void *);
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static void scmdspi_attach(device_t, device_t, void *);
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static int scmdspi_detach(device_t, int);
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static int scmdspi_activate(device_t, enum devact);
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#define SCMD_DEBUG
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#ifdef SCMD_DEBUG
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#define DPRINTF(s, l, x) \
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do { \
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if (l <= s->sc_scmddebug) \
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printf x; \
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} while (/*CONSTCOND*/0)
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#else
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#define DPRINTF(s, l, x)
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#endif
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CFATTACH_DECL_NEW(scmdspi, sizeof(struct scmd_sc),
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scmdspi_match, scmdspi_attach, scmdspi_detach, scmdspi_activate);
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/* For the SPI interface on this device, the reads are done in an odd
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* manor. The first part is normal enough, you send the register binary
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* or'ed with 0x80 and then the receive the data. However, you MUST also
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* then receive a dummy value otherwise, everything gets out of sync and
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* no further reads appear to work unless you do a SPI receive all by itself.
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* This is documented in the data sheet for this device.
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*
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* Please note that the Ardunio code does this a little differently. What is
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* below works on a Raspberry PI 3 without any apparent problems.
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*
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* The delays are also mentioned in the datasheet as being 20us, however, the
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* Ardunio code does 50us, so do likewise.
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*/
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static int
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scmdspi_read_reg_direct(struct spi_handle *sh, uint8_t reg,
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uint8_t *buf)
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{
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int err;
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uint8_t b;
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uint8_t rreg = reg | 0x80;
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err = spi_send(sh, 1, &rreg);
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if (err)
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return err;
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delay(50);
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b = SCMD_HOLE_VALUE;
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err = spi_recv(sh, 1, &b);
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if (err)
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return err;
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*buf = b;
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delay(50);
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b = SCMD_HOLE_VALUE;
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err = spi_recv(sh, 1, &b);
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delay(50);
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return err;
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}
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static int
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scmdspi_read_reg(struct scmd_sc *sc, uint8_t reg, uint8_t *buf)
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{
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return scmdspi_read_reg_direct(sc->sc_sh, reg, buf);
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}
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/* SPI writes to this device are normal enough. You send the register
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* you want making sure that the high bit, 0x80, is clear and then the
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* data.
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*
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* The rule about waiting between operations appears to not apply, however.
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* This does more or less what the Ardunio code does.
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*/
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static int
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scmdspi_write_reg_direct(struct spi_handle *sh, uint8_t reg,
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uint8_t buf)
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{
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uint8_t rreg = reg & 0x7F;
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int err;
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err = spi_send(sh, 1, &rreg);
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if (err)
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return err;
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err = spi_send(sh, 1, &buf);
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if (err)
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return err;
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delay(50);
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return err;
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}
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static int
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scmdspi_write_reg(struct scmd_sc *sc, uint8_t reg, uint8_t buf)
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{
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return scmdspi_write_reg_direct(sc->sc_sh, reg, buf);
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}
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/* These are to satisfy the common code */
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static int
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scmdspi_acquire_bus(struct scmd_sc *sc)
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{
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return 0;
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}
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static void
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scmdspi_release_bus(struct scmd_sc *sc)
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{
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return;
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}
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/* Nothing more is done here. It would be nice if the device was
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* actually checked to make sure it was there, but at least on the
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* Raspberry PI 3 the SPI pins were not set up in ALT0 mode yet and
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* everything acts like it succeeds. No errors are ever produced while
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* in that state.
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*/
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static int
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scmdspi_match(device_t parent, cfdata_t match, void *aux)
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{
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struct spi_attach_args *sa = aux;
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const bool matchdebug = true;
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if (matchdebug) {
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printf("Trying to match\n");
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}
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return 1;
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}
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static void
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scmdspi_attach(device_t parent, device_t self, void *aux)
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{
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struct scmd_sc *sc;
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struct spi_attach_args *sa;
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int error;
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sa = aux;
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sc = device_private(self);
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sc->sc_dev = self;
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sc->sc_sh = sa->sa_handle;
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sc->sc_scmddebug = 0;
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sc->sc_topaddr = 0xff;
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sc->sc_opened = false;
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sc->sc_dying = false;
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sc->sc_func_acquire_bus = &scmdspi_acquire_bus;
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sc->sc_func_release_bus = &scmdspi_release_bus;
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sc->sc_func_read_register = &scmdspi_read_reg;
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sc->sc_func_write_register = &scmdspi_write_reg;
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mutex_init(&sc->sc_mutex, MUTEX_DEFAULT, IPL_NONE);
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mutex_init(&sc->sc_condmutex, MUTEX_DEFAULT, IPL_NONE);
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mutex_init(&sc->sc_dying_mutex, MUTEX_DEFAULT, IPL_NONE);
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cv_init(&sc->sc_condvar, "scmdspicv");
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cv_init(&sc->sc_cond_dying, "scmdspidc");
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/* configure for 1MHz and SPI mode 0 according to the data sheet */
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error = spi_configure(self, sa->sa_handle, SPI_MODE_0, 1000000);
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if (error) {
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return;
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}
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/* Please note that if the pins are not set up for SPI, the attachment
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* will work, but it will not figure out that there are slave modules.
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* It is likely required that a re-enumeration be performed after the pins
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* are set. This can be done from userland later.
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*/
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scmd_attach(sc);
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return;
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}
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/* These really do not do a whole lot, as SPI devices do not seem to work
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* as modules.
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*/
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static int
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scmdspi_detach(device_t self, int flags)
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{
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struct scmd_sc *sc;
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sc = device_private(self);
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mutex_enter(&sc->sc_mutex);
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sc->sc_dying = true;
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/* If this is true we are still open, destroy the condvar */
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if (sc->sc_opened) {
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mutex_enter(&sc->sc_dying_mutex);
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DPRINTF(sc, 2, ("%s: Will wait for anything to exit\n",
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device_xname(sc->sc_dev)));
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/* In the worst case this will time out after 5 seconds.
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* It really should not take that long for the drain / whatever
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* to happen
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*/
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cv_timedwait_sig(&sc->sc_cond_dying,
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&sc->sc_dying_mutex, mstohz(5000));
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mutex_exit(&sc->sc_dying_mutex);
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cv_destroy(&sc->sc_cond_dying);
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}
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cv_destroy(&sc->sc_condvar);
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mutex_exit(&sc->sc_mutex);
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mutex_destroy(&sc->sc_mutex);
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mutex_destroy(&sc->sc_condmutex);
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return 0;
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}
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int
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scmdspi_activate(device_t self, enum devact act)
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{
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struct scmd_sc *sc = device_private(self);
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switch (act) {
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case DVACT_DEACTIVATE:
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sc->sc_dying = true;
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return 0;
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default:
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return EOPNOTSUPP;
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}
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}
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