d15dc38fd9
Implemented a more sophisticated mechanism for handling transmitter interrupts which now defers them until the transmit queue if filled up with completed buffers. This has two advantages: first, it reduces the number of transmitter interrupts to just 1/120th of the rate that they occured previously, and two, running down many buffers at once has much improved cache effects. Defer rundown (m_freem) of completed transmit buffers for no longer than 1 second. This brings us up-to-date with the most recent "fxp" driver in FreeBSD.
204 lines
7.6 KiB
C
204 lines
7.6 KiB
C
/* $NetBSD: if_fxpvar.h,v 1.8 1998/12/19 01:14:38 thorpej Exp $ */
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/*-
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* Copyright (c) 1997, 1998 The NetBSD Foundation, Inc.
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* All rights reserved.
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*
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* This code is derived from software contributed to The NetBSD Foundation
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* by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
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* NASA Ames Research Center.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by the NetBSD
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* Foundation, Inc. and its contributors.
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* 4. Neither the name of The NetBSD Foundation nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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/*
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* Copyright (c) 1995, David Greenman
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice unmodified, this list of conditions, and the following
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* disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* Id: if_fxpvar.h,v 1.4 1997/11/29 08:11:01 davidg Exp
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*/
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/*
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* Misc. defintions for the Intel EtherExpress Pro/100B PCI Fast
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* Ethernet driver
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*/
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/*
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* Number of completed TX commands at which point an interrupt
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* will be generated to garbage collect the attached buffers.
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* Must be at least one less than FXP_NTXCB, and should be
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* enough less so that the transmitter doesn't become idle
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* during the buffer rundown (which would reduce performance).
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*/
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#define FXP_CXINT_THRESH 120
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/*
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* Number of transmit control blocks. This determines the number
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* of transmit buffers that can be chained in the CB list. This
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* must be a power of two.
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*/
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#define FXP_NTXCB 128
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/*
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* TxCB list index mask. This is used to do list wrap-around.
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*/
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#define FXP_TXCB_MASK (FXP_NTXCB - 1)
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/*
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* Number of receive frame area buffers. These are large, so
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* choose wisely.
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*/
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#define FXP_NRFABUFS 64
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/*
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* Maximum number of seconds that the reciever can be idle before we
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* assume it's dead and attempt to reset it by reprogramming the
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* multicast filter. This is part of a work-around for a bug in the
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* NIC. See fxp_stats_update().
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*/
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#define FXP_MAX_RX_IDLE 15
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/*
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* Misc. DMA'd data structures are allocated in a single clump, that
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* maps to a single DMA segment, to make several things easier (computing
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* offsets, setting up DMA maps, etc.)
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*/
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struct fxp_control_data {
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/*
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* The transmit control blocks. The first if these
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* is also used as the config CB.
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*/
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struct fxp_cb_tx fcd_txcbs[FXP_NTXCB];
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/*
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* The multicast setup CB.
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*/
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struct fxp_cb_mcs fcd_mcscb;
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/*
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* The NIC statistics.
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*/
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struct fxp_stats fcd_stats;
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};
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#define FXP_CDOFF(x) offsetof(struct fxp_control_data, x)
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/*
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* Receive buffer descriptor (software only). This is the analog of
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* the software portion of the fxp_cb_tx.
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*/
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struct fxp_rxdesc {
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struct fxp_rxdesc *fr_next; /* next in the chain */
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struct mbuf *fr_mbhead; /* pointer to mbuf chain */
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bus_dmamap_t fr_dmamap; /* our DMA map */
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};
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struct fxp_softc {
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struct device sc_dev; /* generic device structures */
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void *sc_ih; /* interrupt handler cookie */
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bus_space_tag_t sc_st; /* bus space tag */
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bus_space_handle_t sc_sh; /* bus space handle */
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bus_dma_tag_t sc_dmat; /* bus dma tag */
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struct ethercom sc_ethercom; /* ethernet common part */
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#define sc_if sc_ethercom.ec_if
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/*
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* We create a single DMA map that maps all data structure
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* overhead, except for RFAs, which are mapped by the
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* fxp_rxdesc DMA map on a per-mbuf basis.
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*/
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bus_dmamap_t sc_dmamap;
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#define sc_cddma sc_dmamap->dm_segs[0].ds_addr
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/*
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* These DMA maps map transmit and recieve buffers.
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*/
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bus_dmamap_t sc_tx_dmamaps[FXP_NTXCB];
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bus_dmamap_t sc_rx_dmamaps[FXP_NRFABUFS];
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/*
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* Control data - TxCBs, stats, etc.
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*/
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struct fxp_control_data *control_data;
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struct fxp_rxdesc *sc_rxdescs; /* receive buffer descriptors */
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struct mii_data sc_mii; /* MII media information */
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struct fxp_cb_tx *cbl_first; /* first active TxCB in list */
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struct fxp_cb_tx *cbl_last; /* last active TxCB in list */
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int tx_queued; /* # of active TxCB's */
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int need_mcsetup; /* multicast filter needs programming */
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struct fxp_rxdesc *rfa_head; /* first mbuf in receive frame area */
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struct fxp_rxdesc *rfa_tail; /* last mbuf in receive frame area */
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int rx_idle_secs; /* # of seconds RX has been idle */
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int all_mcasts; /* receive all multicasts */
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int promisc_mode; /* promiscuous mode enabled */
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int phy_primary_addr; /* address of primary PHY */
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int phy_primary_device; /* device type of primary PHY */
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int phy_10Mbps_only; /* PHY is 10Mbps-only device */
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#if NRND > 0
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rndsource_element_t rnd_source; /* random source */
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#endif
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};
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/* Macros to ease CSR access. */
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#define CSR_READ_1(sc, reg) \
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bus_space_read_1((sc)->sc_st, (sc)->sc_sh, (reg))
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#define CSR_READ_2(sc, reg) \
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bus_space_read_2((sc)->sc_st, (sc)->sc_sh, (reg))
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#define CSR_READ_4(sc, reg) \
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bus_space_read_4((sc)->sc_st, (sc)->sc_sh, (reg))
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#define CSR_WRITE_1(sc, reg, val) \
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bus_space_write_1((sc)->sc_st, (sc)->sc_sh, (reg), (val))
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#define CSR_WRITE_2(sc, reg, val) \
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bus_space_write_2((sc)->sc_st, (sc)->sc_sh, (reg), (val))
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#define CSR_WRITE_4(sc, reg, val) \
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bus_space_write_4((sc)->sc_st, (sc)->sc_sh, (reg), (val))
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