92 lines
3.2 KiB
C
92 lines
3.2 KiB
C
/* $NetBSD: pte.h,v 1.4 2010/01/16 13:59:42 skrll Exp $ */
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/* $OpenBSD: pte.h,v 1.11 2002/09/05 18:41:19 mickey Exp $ */
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/*
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* Copyright (c) 1990,1993,1994 The University of Utah and
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* the Computer Systems Laboratory at the University of Utah (CSL).
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* All rights reserved.
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*
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* Permission to use, copy, modify and distribute this software is hereby
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* granted provided that (1) source code retains these copyright, permission,
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* and disclaimer notices, and (2) redistributions including binaries
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* reproduce the notices in supporting documentation, and (3) all advertising
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* materials mentioning features or use of this software display the following
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* acknowledgement: ``This product includes software developed by the
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* Computer Systems Laboratory at the University of Utah.''
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*
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* THE UNIVERSITY OF UTAH AND CSL ALLOW FREE USE OF THIS SOFTWARE IN ITS "AS
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* IS" CONDITION. THE UNIVERSITY OF UTAH AND CSL DISCLAIM ANY LIABILITY OF
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* ANY KIND FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
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*
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* CSL requests users of this software to return to csl-dist@cs.utah.edu any
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* improvements that they make and grant CSL redistribution rights.
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*
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* Utah $Hdr: pmap.h 1.24 94/12/14$
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* Author: Mike Hibler, Bob Wheeler, University of Utah CSL, 9/90
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*/
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#ifndef _HPPA_PTE_H_
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#define _HPPA_PTE_H_
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typedef uint32_t pt_entry_t;
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#define PTE_PROT_SHIFT 19
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#define PTE_PROT(tlb) ((tlb) >> PTE_PROT_SHIFT)
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#define TLB_PROT(pte) ((pte) << PTE_PROT_SHIFT)
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#define PDE_MASK (0xffc00000)
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#define PDE_SIZE (0x00400000)
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#define PTE_MASK (0x003ff000)
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#define PTE_PAGE(pte) ((pte) & ~PGOFSET)
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/* TLB access/protection values */
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/* 0x80000000 has no pt_entry_t equivalent */
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#define TLB_WIRED 0x40000000 /* software only */
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#define TLB_REFTRAP 0x20000000 /* bit 2, T */
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#define TLB_DIRTY 0x10000000 /* bit 3, D */
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#define TLB_BREAK 0x08000000 /* bit 4, B */
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#define TLB_AR_MASK 0x07f00000 /* bits 5-11, Access Rights */
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#define TLB_READ 0x00000000
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#define TLB_WRITE 0x01000000
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#define TLB_EXECUTE 0x02000000
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#define TLB_GATEWAY 0x04000000
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#define TLB_USER 0x00f00000
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#define TLB_AR_NA 0x07300000
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#define TLB_AR_R TLB_READ
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#define TLB_AR_RW TLB_READ|TLB_WRITE
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#define TLB_AR_RX TLB_READ|TLB_EXECUTE
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#define TLB_AR_RWX TLB_READ|TLB_WRITE|TLB_EXECUTE
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#define TLB_UNCACHEABLE 0x00080000 /* bit 12, U */
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/* bit 13-30, Access ID */
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#define TLB_PID_MASK 0x0000fffe
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/* 0x00000001 has no pt_entry_t equivalent */
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#define TLB_BITS \
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"\177\020" /* New bitmask */ \
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"b\036wired\0" /* bit 30 (1) */ \
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"b\035T\0" /* bit 29 (2) */ \
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"b\034D\0" /* bit 28 (3) */ \
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"b\033B\0" /* bit 27 (4) */ \
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"b\023U\0" /* bit 19 (12) */ \
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"f\024\07ar\0" /* bit 20 (11) .. 26 (5) */ \
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"=\x73" "------\0" \
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"=\x00" "r-----\0" \
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"=\x10" "rw----\0" \
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"=\x20" "r-x---\0" \
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"=\x30" "rwx---\0" \
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"=\x0f" "r--r--\0" \
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"=\x1f" "rw-rw-\0" \
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"=\x2f" "r-xr-x\0" \
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"=\x3f" "rwxrwx\0" \
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"=\x4c" "gate\0" \
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"=\x2c" "break\0" \
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"f\001\017pid\0\0" /* bit 1 (30) .. 15 (16) */
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/* protection for a gateway page */
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#define TLB_GATE_PROT 0x04c00000
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/* protection for break page */
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#define TLB_BREAK_PROT 0x02c00000
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#endif /* _HPPA_PTE_H_ */
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