227 lines
6.2 KiB
C
227 lines
6.2 KiB
C
/* $NetBSD: mcpcia.c,v 1.3 1998/06/06 01:33:23 thorpej Exp $ */
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/*
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* Copyright (c) 1998 by Matthew Jacob
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* NASA AMES Research Center.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice immediately at the beginning of the file, without modification,
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* this list of conditions, and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. The name of the author may not be used to endorse or promote products
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* derived from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
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* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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/*
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* MCPCIA mcbus to PCI bus adapter
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* found on AlphaServer 4100 systems.
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*/
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#include <sys/cdefs.h> /* RCS ID & Copyright macro defns */
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__KERNEL_RCSID(0, "$NetBSD: mcpcia.c,v 1.3 1998/06/06 01:33:23 thorpej Exp $");
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/device.h>
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#include <sys/malloc.h>
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#include <machine/autoconf.h>
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#include <machine/rpb.h>
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#include <machine/pte.h>
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#include <alpha/mcbus/mcbusreg.h>
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#include <alpha/mcbus/mcbusvar.h>
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#include <alpha/pci/mcpciareg.h>
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#include <alpha/pci/mcpciavar.h>
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#include <alpha/pci/pci_kn300.h>
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struct mcpcia_softc *mcpcias = NULL;
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static struct mcpcia_softc *mcpcia_lt = NULL;
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#define KV(_addr) ((caddr_t)ALPHA_PHYS_TO_K0SEG((_addr)))
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#define MCPCIA_SYSBASE(sc) \
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((((unsigned long) (sc)->mcpcia_gid) << MCBUS_GID_SHIFT) | \
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(((unsigned long) (sc)->mcpcia_mid) << MCBUS_MID_SHIFT) | \
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(MCBUS_IOSPACE))
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static int mcpciamatch __P((struct device *, struct cfdata *, void *));
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static void mcpciaattach __P((struct device *, struct device *, void *));
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struct cfattach mcpcia_ca = {
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sizeof(struct mcpcia_softc), mcpciamatch, mcpciaattach
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};
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static int mcpciaprint __P((void *, const char *));
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static int
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mcpciaprint(aux, pnp)
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void *aux;
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const char *pnp;
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{
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register struct pcibus_attach_args *pba = aux;
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/* only PCIs can attach to MCPCIA for now */
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if (pnp)
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printf("%s at %s", pba->pba_busname, pnp);
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printf(" bus %d", pba->pba_bus);
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return (UNCONF);
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}
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static int
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mcpciamatch(parent, cf, aux)
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struct device *parent;
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struct cfdata *cf;
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void *aux;
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{
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struct mcbus_dev_attach_args *ma = aux;
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if (ma->ma_type == MCBUS_TYPE_PCI)
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return (1);
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return (0);
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}
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static void
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mcpciaattach(parent, self, aux)
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struct device *parent;
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struct device *self;
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void *aux;
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{
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static int first = 1;
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struct mcbus_dev_attach_args *ma = aux;
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struct mcpcia_softc *mcp = (struct mcpcia_softc *)self;
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struct pcibus_attach_args pba;
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mcp->mcpcia_dev = *self;
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mcp->mcpcia_mid = ma->ma_mid;
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mcp->mcpcia_gid = ma->ma_gid;
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printf("\n");
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mcpcia_init(mcp);
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mcpcia_dma_init(&mcp->mcpcia_cc);
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mcp->mcpcia_next = NULL;
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if (mcpcia_lt == NULL) {
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mcpcias = mcp;
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} else {
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mcpcia_lt->mcpcia_next = mcp;
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}
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mcpcia_lt = mcp;
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/*
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* Set up interrupts
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*/
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pci_kn300_pickintr(&mcp->mcpcia_cc, first);
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#ifdef EVCNT_COUNTERS
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if (first == 1) {
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evcnt_attach(self, "intr", kn300_intr_evcnt);
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first = 0;
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}
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#else
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first = 0;
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#endif
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/*
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* Attach PCI bus
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*/
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pba.pba_busname = "pci";
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pba.pba_iot = &mcp->mcpcia_cc.cc_iot;
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pba.pba_memt = &mcp->mcpcia_cc.cc_memt;
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pba.pba_dmat = /* start with direct, may change... */
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alphabus_dma_get_tag(&mcp->mcpcia_cc.cc_dmat_direct, ALPHA_BUS_PCI);
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pba.pba_pc = &mcp->mcpcia_cc.cc_pc;
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pba.pba_bus = 0;
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pba.pba_flags = PCI_FLAGS_IO_ENABLED | PCI_FLAGS_MEM_ENABLED;
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config_found(self, &pba, mcpciaprint);
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}
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void
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mcpcia_init(mcp)
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struct mcpcia_softc *mcp;
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{
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u_int32_t ctl;
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struct mcpcia_config *ccp = &mcp->mcpcia_cc;
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if (ccp->cc_initted == 0) {
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mcpcia_bus_io_init(&ccp->cc_iot, ccp);
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mcpcia_bus_mem_init(&ccp->cc_memt, ccp);
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}
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mcpcia_pci_init(&ccp->cc_pc, ccp);
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ccp->cc_sc = mcp;
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/*
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* Establish a precalculated base for convenience's sake.
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*/
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ccp->cc_sysbase = MCPCIA_SYSBASE(mcp);
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ctl = REGVAL(MCPCIA_PCI_REV(mcp));
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printf("%s: Horse Revision %d, %s Handed Saddle Revision %d,"
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" CAP Revision %d\n", mcp->mcpcia_dev.dv_xname, HORSE_REV(ctl),
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(SADDLE_TYPE(ctl) & 1)? "Right": "Left", SADDLE_REV(ctl),
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CAP_REV(ctl));
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/*
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* Disable interrupts and clear errors prior to probing
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*/
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REGVAL(MCPCIA_INT_MASK0(mcp)) = 0;
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REGVAL(MCPCIA_INT_MASK1(mcp)) = 0;
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REGVAL(MCPCIA_CAP_ERR(mcp)) = 0xFFFFFFFF;
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alpha_mb();
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/*
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* Clean up any post probe errors (W1TC).
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*/
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REGVAL(MCPCIA_CAP_ERR(mcp)) = 0xFFFFFFFF;
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alpha_mb();
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/*
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* Use this opportunity to also find out the MID and CPU
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* type of the currently running CPU (that's us, billybob....)
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*/
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ctl = REGVAL(MCPCIA_WHOAMI(mcp));
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mcbus_primary.mcbus_cpu_mid = MCBUS_CPU_MID(ctl);
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if ((ctl & CPU_Fill_Err) == 0 && mcbus_primary.mcbus_valid == 0) {
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mcbus_primary.mcbus_bcache =
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MCBUS_CPU_INFO(ctl) & CPU_BCacheMask;
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mcbus_primary.mcbus_valid = 1;
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}
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alpha_mb();
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ccp->cc_initted = 1;
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}
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void
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mcpcia_config_cleanup()
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{
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volatile u_int32_t ctl;
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struct mcpcia_softc *mcp;
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/*
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* Turn on Hard, Soft error interrupts. Maybe i2c too.
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*/
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for (mcp = mcpcias; mcp; mcp = mcp->mcpcia_next) {
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ctl = REGVAL(MCPCIA_INT_MASK0(mcp));
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ctl |= MCPCIA_GEN_IENABL;
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REGVAL(MCPCIA_INT_MASK0(mcp)) = ctl;
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alpha_mb();
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/* force stall while write completes */
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ctl = REGVAL(MCPCIA_INT_MASK0(mcp));
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}
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}
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