161 lines
3.9 KiB
ArmAsm
161 lines
3.9 KiB
ArmAsm
/* $NetBSD: i386-asm.S,v 1.1 2008/05/05 17:54:14 ad Exp $ */
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/*-
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* Copyright (c) 1998, 2000, 2004, 2006, 2007 The NetBSD Foundation, Inc.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <machine/asm.h>
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#include <machine/cputypes.h>
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#include <machine/psl.h>
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.data
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_C_LABEL(cpu):
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.long 0
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.globl _C_LABEL(cpu)
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_C_LABEL(cpu_info_level):
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.long -1
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.globl _C_LABEL(cpu_info_level)
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.text
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ENTRY(x86_cpuid2)
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pushl %ebx
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pushl %edi
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movl 12(%esp), %eax
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movl 16(%esp), %ecx
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movl 20(%esp), %edi
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cpuid
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movl %eax, 0(%edi)
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movl %ebx, 4(%edi)
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movl %ecx, 8(%edi)
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movl %edx, 12(%edi)
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popl %edi
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popl %ebx
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ret
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END(x86_cpuid2)
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ENTRY(x86_identify)
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pushl %ebx
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/* Try to toggle alignment check flag; does not exist on 386. */
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pushfl
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popl %eax
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movl %eax,%ecx
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orl $PSL_AC,%eax
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pushl %eax
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popfl
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pushfl
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popl %eax
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xorl %ecx,%eax
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andl $PSL_AC,%eax
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pushl %ecx
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popfl
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testl %eax,%eax
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jnz try486
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/*
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* Try the test of a NexGen CPU -- ZF will not change on a DIV
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* instruction on a NexGen, it will on an i386. Documented in
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* Nx586 Processor Recognition Application Note, NexGen, Inc.
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*/
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movl $0x5555,%eax
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xorl %edx,%edx
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movl $2,%ecx
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divl %ecx
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jnz is386
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isnx586:
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/*
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* Don't try cpuid, as Nx586s reportedly don't support the
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* PSL_ID bit.
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*/
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movl $CPU_NX586,_C_LABEL(cpu)
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jmp 2f
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is386:
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movl $CPU_386,_C_LABEL(cpu)
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jmp 2f
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try486: /* Try to toggle identification flag; does not exist on early 486s. */
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pushfl
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popl %eax
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movl %eax,%ecx
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xorl $PSL_ID,%eax
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pushl %eax
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popfl
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pushfl
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popl %eax
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xorl %ecx,%eax
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andl $PSL_ID,%eax
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pushl %ecx
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popfl
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testl %eax,%eax
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jnz try586
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is486: movl $CPU_486,_C_LABEL(cpu)
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/*
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* Check Cyrix CPU
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* Cyrix CPUs do not change the undefined flags following
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* execution of the divide instruction which divides 5 by 2.
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*
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* Note: CPUID is enabled on M2, so it passes another way.
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*/
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pushfl
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movl $0x5555, %eax
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xorl %edx, %edx
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movl $2, %ecx
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clc
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divl %ecx
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jnc trycyrix486
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popfl
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jmp 2f
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trycyrix486:
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movl $CPU_6x86,_C_LABEL(cpu) # set CPU type
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/*
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* Check for Cyrix 486 CPU by seeing if the flags change during a
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* divide. This is documented in the Cx486SLC/e SMM Programmer's
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* Guide.
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*/
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xorl %edx,%edx
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cmpl %edx,%edx # set flags to known state
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pushfl
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popl %ecx # store flags in ecx
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movl $-1,%eax
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movl $4,%ebx
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divl %ebx # do a long division
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pushfl
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popl %eax
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xorl %ecx,%eax # are the flags different?
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testl $0x8d5,%eax # only check C|PF|AF|Z|N|V
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jne 2f # yes; must be Cyrix 6x86 CPU
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movl $CPU_486DLC,_C_LABEL(cpu)# set CPU type
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jmp 2f
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try586: /* Use the `cpuid' instruction. */
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xorl %eax,%eax
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cpuid
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movl %eax,_C_LABEL(cpu_info_level)
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2:
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popl %ebx
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ret
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