1177 lines
28 KiB
C
1177 lines
28 KiB
C
/* Print Motorola 68k instructions.
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Copyright 1986, 87, 89, 91, 92, 93, 94, 95, 96, 1997
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Free Software Foundation, Inc.
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This file is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
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#include "dis-asm.h"
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#include "floatformat.h"
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#include <libiberty.h>
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#include "opcode/m68k.h"
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/* Local function prototypes */
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static int
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fetch_data PARAMS ((struct disassemble_info *, bfd_byte *));
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static void
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dummy_print_address PARAMS ((bfd_vma, struct disassemble_info *));
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static int
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fetch_arg PARAMS ((unsigned char *, int, int, disassemble_info *));
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static void
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print_base PARAMS ((int, bfd_vma, disassemble_info*));
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static unsigned char *
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print_indexed PARAMS ((int, unsigned char *, bfd_vma, disassemble_info *));
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static int
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print_insn_arg PARAMS ((const char *, unsigned char *, unsigned char *,
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bfd_vma, disassemble_info *));
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CONST char * CONST fpcr_names[] = {
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"", "%fpiar", "%fpsr", "%fpiar/%fpsr", "%fpcr",
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"%fpiar/%fpcr", "%fpsr/%fpcr", "%fpiar/%fpsr/%fpcr"};
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static char *const reg_names[] = {
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"%d0", "%d1", "%d2", "%d3", "%d4", "%d5", "%d6", "%d7",
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"%a0", "%a1", "%a2", "%a3", "%a4", "%a5", "%fp", "%sp",
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"%ps", "%pc"};
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/* Sign-extend an (unsigned char). */
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#if __STDC__ == 1
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#define COERCE_SIGNED_CHAR(ch) ((signed char)(ch))
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#else
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#define COERCE_SIGNED_CHAR(ch) ((int)(((ch) ^ 0x80) & 0xFF) - 128)
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#endif
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/* Get a 1 byte signed integer. */
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#define NEXTBYTE(p) (p += 2, FETCH_DATA (info, p), COERCE_SIGNED_CHAR(p[-1]))
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/* Get a 2 byte signed integer. */
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#define COERCE16(x) ((int) (((x) ^ 0x8000) - 0x8000))
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#define NEXTWORD(p) \
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(p += 2, FETCH_DATA (info, p), \
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COERCE16 ((p[-2] << 8) + p[-1]))
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/* Get a 4 byte signed integer. */
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#define COERCE32(x) ((int) (((x) ^ 0x80000000) - 0x80000000))
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#define NEXTLONG(p) \
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(p += 4, FETCH_DATA (info, p), \
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(COERCE32 ((((((p[-4] << 8) + p[-3]) << 8) + p[-2]) << 8) + p[-1])))
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/* Get a single precision float. */
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#define NEXTSINGLE(val, p) \
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(p += 4, FETCH_DATA (info, p), \
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floatformat_to_double (&floatformat_ieee_single_big, (char *) p - 4, &val))
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/* Get a double precision float. */
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#define NEXTDOUBLE(val, p) \
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(p += 8, FETCH_DATA (info, p), \
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floatformat_to_double (&floatformat_ieee_double_big, (char *) p - 8, &val))
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/* Get an extended precision float. */
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#define NEXTEXTEND(val, p) \
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(p += 12, FETCH_DATA (info, p), \
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floatformat_to_double (&floatformat_m68881_ext, (char *) p - 12, &val))
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/* Need a function to convert from packed to double
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precision. Actually, it's easier to print a
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packed number than a double anyway, so maybe
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there should be a special case to handle this... */
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#define NEXTPACKED(p) \
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(p += 12, FETCH_DATA (info, p), 0.0)
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/* Maximum length of an instruction. */
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#define MAXLEN 22
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#include <setjmp.h>
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struct private
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{
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/* Points to first byte not fetched. */
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bfd_byte *max_fetched;
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bfd_byte the_buffer[MAXLEN];
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bfd_vma insn_start;
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jmp_buf bailout;
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};
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/* Make sure that bytes from INFO->PRIVATE_DATA->BUFFER (inclusive)
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to ADDR (exclusive) are valid. Returns 1 for success, longjmps
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on error. */
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#define FETCH_DATA(info, addr) \
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((addr) <= ((struct private *)(info->private_data))->max_fetched \
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? 1 : fetch_data ((info), (addr)))
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static int
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fetch_data (info, addr)
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struct disassemble_info *info;
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bfd_byte *addr;
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{
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int status;
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struct private *priv = (struct private *)info->private_data;
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bfd_vma start = priv->insn_start + (priv->max_fetched - priv->the_buffer);
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status = (*info->read_memory_func) (start,
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priv->max_fetched,
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addr - priv->max_fetched,
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info);
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if (status != 0)
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{
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(*info->memory_error_func) (status, start, info);
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longjmp (priv->bailout, 1);
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}
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else
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priv->max_fetched = addr;
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return 1;
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}
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/* This function is used to print to the bit-bucket. */
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static int
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#ifdef __STDC__
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dummy_printer (FILE * file, const char * format, ...)
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#else
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dummy_printer (file) FILE *file;
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#endif
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{ return 0; }
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static void
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dummy_print_address (vma, info)
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bfd_vma vma;
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struct disassemble_info *info;
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{
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}
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/* Print the m68k instruction at address MEMADDR in debugged memory,
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on INFO->STREAM. Returns length of the instruction, in bytes. */
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int
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print_insn_m68k (memaddr, info)
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bfd_vma memaddr;
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disassemble_info *info;
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{
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register int i;
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register unsigned char *p;
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unsigned char *save_p;
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register const char *d;
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register unsigned long bestmask;
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const struct m68k_opcode *best = 0;
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struct private priv;
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bfd_byte *buffer = priv.the_buffer;
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fprintf_ftype save_printer = info->fprintf_func;
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void (*save_print_address) PARAMS((bfd_vma, struct disassemble_info*))
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= info->print_address_func;
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int major_opcode;
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static int numopcodes[16];
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static const struct m68k_opcode **opcodes[16];
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if (!opcodes[0])
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{
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/* Speed up the matching by sorting the opcode table on the upper
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four bits of the opcode. */
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const struct m68k_opcode **opc_pointer[16];
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/* First count how many opcodes are in each of the sixteen buckets. */
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for (i = 0; i < m68k_numopcodes; i++)
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numopcodes[(m68k_opcodes[i].opcode >> 28) & 15]++;
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/* Then create a sorted table of pointers that point into the
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unsorted table. */
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opc_pointer[0] = ((const struct m68k_opcode **)
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xmalloc (sizeof (struct m68k_opcode *)
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* m68k_numopcodes));
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opcodes[0] = opc_pointer[0];
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for (i = 1; i < 16; i++)
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{
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opc_pointer[i] = opc_pointer[i - 1] + numopcodes[i - 1];
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opcodes[i] = opc_pointer[i];
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}
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for (i = 0; i < m68k_numopcodes; i++)
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*opc_pointer[(m68k_opcodes[i].opcode >> 28) & 15]++ = &m68k_opcodes[i];
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}
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info->private_data = (PTR) &priv;
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/* Tell objdump to use two bytes per chunk and six bytes per line for
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displaying raw data. */
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info->bytes_per_chunk = 2;
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info->bytes_per_line = 6;
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info->display_endian = BFD_ENDIAN_BIG;
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priv.max_fetched = priv.the_buffer;
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priv.insn_start = memaddr;
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if (setjmp (priv.bailout) != 0)
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/* Error return. */
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return -1;
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bestmask = 0;
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FETCH_DATA (info, buffer + 2);
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major_opcode = (buffer[0] >> 4) & 15;
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for (i = 0; i < numopcodes[major_opcode]; i++)
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{
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const struct m68k_opcode *opc = opcodes[major_opcode][i];
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unsigned long opcode = opc->opcode;
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unsigned long match = opc->match;
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if (((0xff & buffer[0] & (match >> 24)) == (0xff & (opcode >> 24)))
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&& ((0xff & buffer[1] & (match >> 16)) == (0xff & (opcode >> 16)))
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/* Only fetch the next two bytes if we need to. */
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&& (((0xffff & match) == 0)
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(FETCH_DATA (info, buffer + 4)
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&& ((0xff & buffer[2] & (match >> 8)) == (0xff & (opcode >> 8)))
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&& ((0xff & buffer[3] & match) == (0xff & opcode)))
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))
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{
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/* Don't use for printout the variants of divul and divsl
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that have the same register number in two places.
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The more general variants will match instead. */
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for (d = opc->args; *d; d += 2)
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if (d[1] == 'D')
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break;
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/* Don't use for printout the variants of most floating
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point coprocessor instructions which use the same
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register number in two places, as above. */
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if (*d == '\0')
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for (d = opc->args; *d; d += 2)
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if (d[1] == 't')
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break;
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/* Don't match fmovel with more than one register; wait for
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fmoveml. */
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if (*d == '\0')
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{
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for (d = opc->args; *d; d += 2)
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{
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if (d[0] == 's' && d[1] == '8')
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{
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int val;
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val = fetch_arg (buffer, d[1], 3, info);
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if ((val & (val - 1)) != 0)
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break;
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}
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}
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}
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if (*d == '\0' && match > bestmask)
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{
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best = opc;
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bestmask = match;
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}
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}
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}
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if (best == 0)
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goto invalid;
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/* Point at first word of argument data,
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and at descriptor for first argument. */
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p = buffer + 2;
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/* Figure out how long the fixed-size portion of the instruction is.
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The only place this is stored in the opcode table is
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in the arguments--look for arguments which specify fields in the 2nd
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or 3rd words of the instruction. */
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for (d = best->args; *d; d += 2)
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{
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/* I don't think it is necessary to be checking d[0] here; I suspect
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all this could be moved to the case statement below. */
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if (d[0] == '#')
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{
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if (d[1] == 'l' && p - buffer < 6)
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p = buffer + 6;
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else if (p - buffer < 4 && d[1] != 'C' && d[1] != '8' )
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p = buffer + 4;
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}
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if ((d[0] == 'L' || d[0] == 'l') && d[1] == 'w' && p - buffer < 4)
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p = buffer + 4;
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switch (d[1])
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{
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case '1':
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case '2':
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case '3':
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case '7':
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case '8':
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case '9':
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case 'i':
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if (p - buffer < 4)
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p = buffer + 4;
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break;
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case '4':
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case '5':
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case '6':
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if (p - buffer < 6)
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p = buffer + 6;
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break;
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default:
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break;
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}
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}
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/* Some opcodes like pflusha and lpstop are exceptions; they take no
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arguments but are two words long. Recognize them by looking at
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the lower 16 bits of the mask. */
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if (p - buffer < 4 && (best->match & 0xFFFF) != 0)
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p = buffer + 4;
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FETCH_DATA (info, p);
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d = best->args;
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/* We can the operands twice. The first time we don't print anything,
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but look for errors. */
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save_p = p;
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info->print_address_func = dummy_print_address;
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info->fprintf_func = (fprintf_ftype)dummy_printer;
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for ( ; *d; d += 2)
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{
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int eaten = print_insn_arg (d, buffer, p, memaddr + p - buffer, info);
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if (eaten >= 0)
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p += eaten;
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else if (eaten == -1)
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goto invalid;
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else
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{
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(*info->fprintf_func)(info->stream,
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"<internal error in opcode table: %s %s>\n",
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best->name,
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best->args);
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goto invalid;
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}
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}
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p = save_p;
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info->fprintf_func = save_printer;
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info->print_address_func = save_print_address;
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d = best->args;
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(*info->fprintf_func) (info->stream, "%s", best->name);
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if (*d)
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(*info->fprintf_func) (info->stream, " ");
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while (*d)
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{
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p += print_insn_arg (d, buffer, p, memaddr + p - buffer, info);
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d += 2;
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if (*d && *(d - 2) != 'I' && *d != 'k')
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(*info->fprintf_func) (info->stream, ",");
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}
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return p - buffer;
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invalid:
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/* Handle undefined instructions. */
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info->fprintf_func = save_printer;
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info->print_address_func = save_print_address;
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(*info->fprintf_func) (info->stream, "0%o",
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(buffer[0] << 8) + buffer[1]);
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return 2;
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}
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/* Returns number of bytes "eaten" by the operand, or
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return -1 if an invalid operand was found, or -2 if
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an opcode tabe error was found. */
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static int
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print_insn_arg (d, buffer, p0, addr, info)
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const char *d;
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unsigned char *buffer;
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unsigned char *p0;
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bfd_vma addr; /* PC for this arg to be relative to */
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disassemble_info *info;
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{
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register int val = 0;
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register int place = d[1];
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register unsigned char *p = p0;
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int regno;
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register CONST char *regname;
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register unsigned char *p1;
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double flval;
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int flt_p;
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switch (*d)
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{
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case 'c': /* cache identifier */
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{
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static char *const cacheFieldName[] = { "nc", "dc", "ic", "bc" };
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val = fetch_arg (buffer, place, 2, info);
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(*info->fprintf_func) (info->stream, cacheFieldName[val]);
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break;
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}
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case 'a': /* address register indirect only. Cf. case '+'. */
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{
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(*info->fprintf_func)
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(info->stream,
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"%s@",
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reg_names [fetch_arg (buffer, place, 3, info) + 8]);
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break;
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}
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case '_': /* 32-bit absolute address for move16. */
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{
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val = NEXTLONG (p);
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(*info->print_address_func) (val, info);
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break;
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}
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case 'C':
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(*info->fprintf_func) (info->stream, "%%ccr");
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break;
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case 'S':
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(*info->fprintf_func) (info->stream, "%%sr");
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break;
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case 'U':
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(*info->fprintf_func) (info->stream, "%%usp");
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break;
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case 'J':
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{
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static const struct { char *name; int value; } names[]
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= {{"%sfc", 0x000}, {"%dfc", 0x001}, {"%cacr", 0x002},
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{"%tc", 0x003}, {"%itt0",0x004}, {"%itt1", 0x005},
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{"%dtt0",0x006}, {"%dtt1",0x007}, {"%buscr",0x008},
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{"%usp", 0x800}, {"%vbr", 0x801}, {"%caar", 0x802},
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{"%msp", 0x803}, {"%isp", 0x804},
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/* Should we be calling this psr like we do in case 'Y'? */
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{"%mmusr",0x805},
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{"%urp", 0x806}, {"%srp", 0x807}, {"%pcr", 0x808}};
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val = fetch_arg (buffer, place, 12, info);
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for (regno = sizeof names / sizeof names[0] - 1; regno >= 0; regno--)
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if (names[regno].value == val)
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{
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(*info->fprintf_func) (info->stream, "%s", names[regno].name);
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break;
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}
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if (regno < 0)
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(*info->fprintf_func) (info->stream, "%d", val);
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}
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break;
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case 'Q':
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val = fetch_arg (buffer, place, 3, info);
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/* 0 means 8, except for the bkpt instruction... */
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if (val == 0 && d[1] != 's')
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val = 8;
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(*info->fprintf_func) (info->stream, "#%d", val);
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break;
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case 'M':
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val = fetch_arg (buffer, place, 8, info);
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if (val & 0x80)
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val = val - 0x100;
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(*info->fprintf_func) (info->stream, "#%d", val);
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break;
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case 'T':
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val = fetch_arg (buffer, place, 4, info);
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(*info->fprintf_func) (info->stream, "#%d", val);
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break;
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case 'D':
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(*info->fprintf_func) (info->stream, "%s",
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reg_names[fetch_arg (buffer, place, 3, info)]);
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break;
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case 'A':
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(*info->fprintf_func)
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(info->stream, "%s",
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reg_names[fetch_arg (buffer, place, 3, info) + 010]);
|
||
break;
|
||
|
||
case 'R':
|
||
(*info->fprintf_func)
|
||
(info->stream, "%s",
|
||
reg_names[fetch_arg (buffer, place, 4, info)]);
|
||
break;
|
||
|
||
case 'r':
|
||
regno = fetch_arg (buffer, place, 4, info);
|
||
if (regno > 7)
|
||
(*info->fprintf_func) (info->stream, "%s@", reg_names[regno]);
|
||
else
|
||
(*info->fprintf_func) (info->stream, "@(%s)", reg_names[regno]);
|
||
break;
|
||
|
||
case 'F':
|
||
(*info->fprintf_func)
|
||
(info->stream, "%%fp%d",
|
||
fetch_arg (buffer, place, 3, info));
|
||
break;
|
||
|
||
case 'O':
|
||
val = fetch_arg (buffer, place, 6, info);
|
||
if (val & 0x20)
|
||
(*info->fprintf_func) (info->stream, "%s", reg_names [val & 7]);
|
||
else
|
||
(*info->fprintf_func) (info->stream, "%d", val);
|
||
break;
|
||
|
||
case '+':
|
||
(*info->fprintf_func)
|
||
(info->stream, "%s@+",
|
||
reg_names[fetch_arg (buffer, place, 3, info) + 8]);
|
||
break;
|
||
|
||
case '-':
|
||
(*info->fprintf_func)
|
||
(info->stream, "%s@-",
|
||
reg_names[fetch_arg (buffer, place, 3, info) + 8]);
|
||
break;
|
||
|
||
case 'k':
|
||
if (place == 'k')
|
||
(*info->fprintf_func)
|
||
(info->stream, "{%s}",
|
||
reg_names[fetch_arg (buffer, place, 3, info)]);
|
||
else if (place == 'C')
|
||
{
|
||
val = fetch_arg (buffer, place, 7, info);
|
||
if ( val > 63 ) /* This is a signed constant. */
|
||
val -= 128;
|
||
(*info->fprintf_func) (info->stream, "{#%d}", val);
|
||
}
|
||
else
|
||
return -2;
|
||
break;
|
||
|
||
case '#':
|
||
case '^':
|
||
p1 = buffer + (*d == '#' ? 2 : 4);
|
||
if (place == 's')
|
||
val = fetch_arg (buffer, place, 4, info);
|
||
else if (place == 'C')
|
||
val = fetch_arg (buffer, place, 7, info);
|
||
else if (place == '8')
|
||
val = fetch_arg (buffer, place, 3, info);
|
||
else if (place == '3')
|
||
val = fetch_arg (buffer, place, 8, info);
|
||
else if (place == 'b')
|
||
val = NEXTBYTE (p1);
|
||
else if (place == 'w' || place == 'W')
|
||
val = NEXTWORD (p1);
|
||
else if (place == 'l')
|
||
val = NEXTLONG (p1);
|
||
else
|
||
return -2;
|
||
(*info->fprintf_func) (info->stream, "#%d", val);
|
||
break;
|
||
|
||
case 'B':
|
||
if (place == 'b')
|
||
val = NEXTBYTE (p);
|
||
else if (place == 'B')
|
||
val = COERCE_SIGNED_CHAR(buffer[1]);
|
||
else if (place == 'w' || place == 'W')
|
||
val = NEXTWORD (p);
|
||
else if (place == 'l' || place == 'L' || place == 'C')
|
||
val = NEXTLONG (p);
|
||
else if (place == 'g')
|
||
{
|
||
val = NEXTBYTE (buffer);
|
||
if (val == 0)
|
||
val = NEXTWORD (p);
|
||
else if (val == -1)
|
||
val = NEXTLONG (p);
|
||
}
|
||
else if (place == 'c')
|
||
{
|
||
if (buffer[1] & 0x40) /* If bit six is one, long offset */
|
||
val = NEXTLONG (p);
|
||
else
|
||
val = NEXTWORD (p);
|
||
}
|
||
else
|
||
return -2;
|
||
|
||
(*info->print_address_func) (addr + val, info);
|
||
break;
|
||
|
||
case 'd':
|
||
val = NEXTWORD (p);
|
||
(*info->fprintf_func)
|
||
(info->stream, "%s@(%d)",
|
||
reg_names[fetch_arg (buffer, place, 3, info) + 8], val);
|
||
break;
|
||
|
||
case 's':
|
||
(*info->fprintf_func) (info->stream, "%s",
|
||
fpcr_names[fetch_arg (buffer, place, 3, info)]);
|
||
break;
|
||
|
||
case 'I':
|
||
/* Get coprocessor ID... */
|
||
val = fetch_arg (buffer, 'd', 3, info);
|
||
|
||
if (val != 1) /* Unusual coprocessor ID? */
|
||
(*info->fprintf_func) (info->stream, "(cpid=%d) ", val);
|
||
break;
|
||
|
||
case '*':
|
||
case '~':
|
||
case '%':
|
||
case ';':
|
||
case '@':
|
||
case '!':
|
||
case '$':
|
||
case '?':
|
||
case '/':
|
||
case '&':
|
||
case '`':
|
||
case '|':
|
||
case '<':
|
||
case '>':
|
||
|
||
if (place == 'd')
|
||
{
|
||
val = fetch_arg (buffer, 'x', 6, info);
|
||
val = ((val & 7) << 3) + ((val >> 3) & 7);
|
||
}
|
||
else
|
||
val = fetch_arg (buffer, 's', 6, info);
|
||
|
||
/* Get register number assuming address register. */
|
||
regno = (val & 7) + 8;
|
||
regname = reg_names[regno];
|
||
switch (val >> 3)
|
||
{
|
||
case 0:
|
||
(*info->fprintf_func) (info->stream, "%s", reg_names[val]);
|
||
break;
|
||
|
||
case 1:
|
||
(*info->fprintf_func) (info->stream, "%s", regname);
|
||
break;
|
||
|
||
case 2:
|
||
(*info->fprintf_func) (info->stream, "%s@", regname);
|
||
break;
|
||
|
||
case 3:
|
||
(*info->fprintf_func) (info->stream, "%s@+", regname);
|
||
break;
|
||
|
||
case 4:
|
||
(*info->fprintf_func) (info->stream, "%s@-", regname);
|
||
break;
|
||
|
||
case 5:
|
||
val = NEXTWORD (p);
|
||
(*info->fprintf_func) (info->stream, "%s@(%d)", regname, val);
|
||
break;
|
||
|
||
case 6:
|
||
p = print_indexed (regno, p, addr, info);
|
||
break;
|
||
|
||
case 7:
|
||
switch (val & 7)
|
||
{
|
||
case 0:
|
||
val = NEXTWORD (p);
|
||
(*info->print_address_func) (val, info);
|
||
break;
|
||
|
||
case 1:
|
||
val = NEXTLONG (p);
|
||
(*info->print_address_func) (val, info);
|
||
break;
|
||
|
||
case 2:
|
||
val = NEXTWORD (p);
|
||
(*info->print_address_func) (addr + val, info);
|
||
break;
|
||
|
||
case 3:
|
||
p = print_indexed (-1, p, addr, info);
|
||
break;
|
||
|
||
case 4:
|
||
flt_p = 1; /* Assume it's a float... */
|
||
switch( place )
|
||
{
|
||
case 'b':
|
||
val = NEXTBYTE (p);
|
||
flt_p = 0;
|
||
break;
|
||
|
||
case 'w':
|
||
val = NEXTWORD (p);
|
||
flt_p = 0;
|
||
break;
|
||
|
||
case 'l':
|
||
val = NEXTLONG (p);
|
||
flt_p = 0;
|
||
break;
|
||
|
||
case 'f':
|
||
NEXTSINGLE(flval, p);
|
||
break;
|
||
|
||
case 'F':
|
||
NEXTDOUBLE(flval, p);
|
||
break;
|
||
|
||
case 'x':
|
||
NEXTEXTEND(flval, p);
|
||
break;
|
||
|
||
case 'p':
|
||
flval = NEXTPACKED(p);
|
||
break;
|
||
|
||
default:
|
||
return -1;
|
||
}
|
||
if ( flt_p ) /* Print a float? */
|
||
(*info->fprintf_func) (info->stream, "#%g", flval);
|
||
else
|
||
(*info->fprintf_func) (info->stream, "#%d", val);
|
||
break;
|
||
|
||
default:
|
||
return -1;
|
||
}
|
||
}
|
||
break;
|
||
|
||
case 'L':
|
||
case 'l':
|
||
if (place == 'w')
|
||
{
|
||
char doneany;
|
||
p1 = buffer + 2;
|
||
val = NEXTWORD (p1);
|
||
/* Move the pointer ahead if this point is farther ahead
|
||
than the last. */
|
||
p = p1 > p ? p1 : p;
|
||
if (val == 0)
|
||
{
|
||
(*info->fprintf_func) (info->stream, "#0");
|
||
break;
|
||
}
|
||
if (*d == 'l')
|
||
{
|
||
register int newval = 0;
|
||
for (regno = 0; regno < 16; ++regno)
|
||
if (val & (0x8000 >> regno))
|
||
newval |= 1 << regno;
|
||
val = newval;
|
||
}
|
||
val &= 0xffff;
|
||
doneany = 0;
|
||
for (regno = 0; regno < 16; ++regno)
|
||
if (val & (1 << regno))
|
||
{
|
||
int first_regno;
|
||
if (doneany)
|
||
(*info->fprintf_func) (info->stream, "/");
|
||
doneany = 1;
|
||
(*info->fprintf_func) (info->stream, "%s", reg_names[regno]);
|
||
first_regno = regno;
|
||
while (val & (1 << (regno + 1)))
|
||
++regno;
|
||
if (regno > first_regno)
|
||
(*info->fprintf_func) (info->stream, "-%s",
|
||
reg_names[regno]);
|
||
}
|
||
}
|
||
else if (place == '3')
|
||
{
|
||
/* `fmovem' insn. */
|
||
char doneany;
|
||
val = fetch_arg (buffer, place, 8, info);
|
||
if (val == 0)
|
||
{
|
||
(*info->fprintf_func) (info->stream, "#0");
|
||
break;
|
||
}
|
||
if (*d == 'l')
|
||
{
|
||
register int newval = 0;
|
||
for (regno = 0; regno < 8; ++regno)
|
||
if (val & (0x80 >> regno))
|
||
newval |= 1 << regno;
|
||
val = newval;
|
||
}
|
||
val &= 0xff;
|
||
doneany = 0;
|
||
for (regno = 0; regno < 8; ++regno)
|
||
if (val & (1 << regno))
|
||
{
|
||
int first_regno;
|
||
if (doneany)
|
||
(*info->fprintf_func) (info->stream, "/");
|
||
doneany = 1;
|
||
(*info->fprintf_func) (info->stream, "%%fp%d", regno);
|
||
first_regno = regno;
|
||
while (val & (1 << (regno + 1)))
|
||
++regno;
|
||
if (regno > first_regno)
|
||
(*info->fprintf_func) (info->stream, "-%%fp%d", regno);
|
||
}
|
||
}
|
||
else if (place == '8')
|
||
{
|
||
/* fmoveml for FP status registers */
|
||
(*info->fprintf_func) (info->stream, "%s",
|
||
fpcr_names[fetch_arg (buffer, place, 3,
|
||
info)]);
|
||
}
|
||
else
|
||
return -2;
|
||
break;
|
||
|
||
case 'X':
|
||
place = '8';
|
||
case 'Y':
|
||
case 'Z':
|
||
case 'W':
|
||
case '0':
|
||
case '1':
|
||
case '2':
|
||
case '3':
|
||
{
|
||
int val = fetch_arg (buffer, place, 5, info);
|
||
char *name = 0;
|
||
switch (val)
|
||
{
|
||
case 2: name = "%tt0"; break;
|
||
case 3: name = "%tt1"; break;
|
||
case 0x10: name = "%tc"; break;
|
||
case 0x11: name = "%drp"; break;
|
||
case 0x12: name = "%srp"; break;
|
||
case 0x13: name = "%crp"; break;
|
||
case 0x14: name = "%cal"; break;
|
||
case 0x15: name = "%val"; break;
|
||
case 0x16: name = "%scc"; break;
|
||
case 0x17: name = "%ac"; break;
|
||
case 0x18: name = "%psr"; break;
|
||
case 0x19: name = "%pcsr"; break;
|
||
case 0x1c:
|
||
case 0x1d:
|
||
{
|
||
int break_reg = ((buffer[3] >> 2) & 7);
|
||
(*info->fprintf_func)
|
||
(info->stream, val == 0x1c ? "%%bad%d" : "%%bac%d",
|
||
break_reg);
|
||
}
|
||
break;
|
||
default:
|
||
(*info->fprintf_func) (info->stream, "<mmu register %d>", val);
|
||
}
|
||
if (name)
|
||
(*info->fprintf_func) (info->stream, "%s", name);
|
||
}
|
||
break;
|
||
|
||
case 'f':
|
||
{
|
||
int fc = fetch_arg (buffer, place, 5, info);
|
||
if (fc == 1)
|
||
(*info->fprintf_func) (info->stream, "%%dfc");
|
||
else if (fc == 0)
|
||
(*info->fprintf_func) (info->stream, "%%sfc");
|
||
else
|
||
(*info->fprintf_func) (info->stream, "<function code %d>", fc);
|
||
}
|
||
break;
|
||
|
||
case 'V':
|
||
(*info->fprintf_func) (info->stream, "%%val");
|
||
break;
|
||
|
||
case 't':
|
||
{
|
||
int level = fetch_arg (buffer, place, 3, info);
|
||
(*info->fprintf_func) (info->stream, "%d", level);
|
||
}
|
||
break;
|
||
|
||
default:
|
||
return -2;
|
||
}
|
||
|
||
return p - p0;
|
||
}
|
||
|
||
/* Fetch BITS bits from a position in the instruction specified by CODE.
|
||
CODE is a "place to put an argument", or 'x' for a destination
|
||
that is a general address (mode and register).
|
||
BUFFER contains the instruction. */
|
||
|
||
static int
|
||
fetch_arg (buffer, code, bits, info)
|
||
unsigned char *buffer;
|
||
int code;
|
||
int bits;
|
||
disassemble_info *info;
|
||
{
|
||
register int val = 0;
|
||
switch (code)
|
||
{
|
||
case 's':
|
||
val = buffer[1];
|
||
break;
|
||
|
||
case 'd': /* Destination, for register or quick. */
|
||
val = (buffer[0] << 8) + buffer[1];
|
||
val >>= 9;
|
||
break;
|
||
|
||
case 'x': /* Destination, for general arg */
|
||
val = (buffer[0] << 8) + buffer[1];
|
||
val >>= 6;
|
||
break;
|
||
|
||
case 'k':
|
||
FETCH_DATA (info, buffer + 3);
|
||
val = (buffer[3] >> 4);
|
||
break;
|
||
|
||
case 'C':
|
||
FETCH_DATA (info, buffer + 3);
|
||
val = buffer[3];
|
||
break;
|
||
|
||
case '1':
|
||
FETCH_DATA (info, buffer + 3);
|
||
val = (buffer[2] << 8) + buffer[3];
|
||
val >>= 12;
|
||
break;
|
||
|
||
case '2':
|
||
FETCH_DATA (info, buffer + 3);
|
||
val = (buffer[2] << 8) + buffer[3];
|
||
val >>= 6;
|
||
break;
|
||
|
||
case '3':
|
||
case 'j':
|
||
FETCH_DATA (info, buffer + 3);
|
||
val = (buffer[2] << 8) + buffer[3];
|
||
break;
|
||
|
||
case '4':
|
||
FETCH_DATA (info, buffer + 5);
|
||
val = (buffer[4] << 8) + buffer[5];
|
||
val >>= 12;
|
||
break;
|
||
|
||
case '5':
|
||
FETCH_DATA (info, buffer + 5);
|
||
val = (buffer[4] << 8) + buffer[5];
|
||
val >>= 6;
|
||
break;
|
||
|
||
case '6':
|
||
FETCH_DATA (info, buffer + 5);
|
||
val = (buffer[4] << 8) + buffer[5];
|
||
break;
|
||
|
||
case '7':
|
||
FETCH_DATA (info, buffer + 3);
|
||
val = (buffer[2] << 8) + buffer[3];
|
||
val >>= 7;
|
||
break;
|
||
|
||
case '8':
|
||
FETCH_DATA (info, buffer + 3);
|
||
val = (buffer[2] << 8) + buffer[3];
|
||
val >>= 10;
|
||
break;
|
||
|
||
case '9':
|
||
FETCH_DATA (info, buffer + 3);
|
||
val = (buffer[2] << 8) + buffer[3];
|
||
val >>= 5;
|
||
break;
|
||
|
||
case 'e':
|
||
val = (buffer[1] >> 6);
|
||
break;
|
||
|
||
default:
|
||
abort ();
|
||
}
|
||
|
||
switch (bits)
|
||
{
|
||
case 2:
|
||
return val & 3;
|
||
case 3:
|
||
return val & 7;
|
||
case 4:
|
||
return val & 017;
|
||
case 5:
|
||
return val & 037;
|
||
case 6:
|
||
return val & 077;
|
||
case 7:
|
||
return val & 0177;
|
||
case 8:
|
||
return val & 0377;
|
||
case 12:
|
||
return val & 07777;
|
||
default:
|
||
abort ();
|
||
}
|
||
}
|
||
|
||
/* Print an indexed argument. The base register is BASEREG (-1 for pc).
|
||
P points to extension word, in buffer.
|
||
ADDR is the nominal core address of that extension word. */
|
||
|
||
static unsigned char *
|
||
print_indexed (basereg, p, addr, info)
|
||
int basereg;
|
||
unsigned char *p;
|
||
bfd_vma addr;
|
||
disassemble_info *info;
|
||
{
|
||
register int word;
|
||
static char *const scales[] = {"", ":2", ":4", ":8"};
|
||
bfd_vma base_disp;
|
||
bfd_vma outer_disp;
|
||
char buf[40];
|
||
char vmabuf[50];
|
||
|
||
word = NEXTWORD (p);
|
||
|
||
/* Generate the text for the index register.
|
||
Where this will be output is not yet determined. */
|
||
sprintf (buf, "%s:%c%s",
|
||
reg_names[(word >> 12) & 0xf],
|
||
(word & 0x800) ? 'l' : 'w',
|
||
scales[(word >> 9) & 3]);
|
||
|
||
/* Handle the 68000 style of indexing. */
|
||
|
||
if ((word & 0x100) == 0)
|
||
{
|
||
word &= 0xff;
|
||
if ((word & 0x80) != 0)
|
||
word -= 0x100;
|
||
if (basereg == -1)
|
||
word += addr;
|
||
print_base (basereg, word, info);
|
||
(*info->fprintf_func) (info->stream, ",%s)", buf);
|
||
return p;
|
||
}
|
||
|
||
/* Handle the generalized kind. */
|
||
/* First, compute the displacement to add to the base register. */
|
||
|
||
if (word & 0200)
|
||
{
|
||
if (basereg == -1)
|
||
basereg = -3;
|
||
else
|
||
basereg = -2;
|
||
}
|
||
if (word & 0100)
|
||
buf[0] = '\0';
|
||
base_disp = 0;
|
||
switch ((word >> 4) & 3)
|
||
{
|
||
case 2:
|
||
base_disp = NEXTWORD (p);
|
||
break;
|
||
case 3:
|
||
base_disp = NEXTLONG (p);
|
||
}
|
||
if (basereg == -1)
|
||
base_disp += addr;
|
||
|
||
/* Handle single-level case (not indirect) */
|
||
|
||
if ((word & 7) == 0)
|
||
{
|
||
print_base (basereg, base_disp, info);
|
||
if (buf[0] != '\0')
|
||
(*info->fprintf_func) (info->stream, ",%s", buf);
|
||
(*info->fprintf_func) (info->stream, ")");
|
||
return p;
|
||
}
|
||
|
||
/* Two level. Compute displacement to add after indirection. */
|
||
|
||
outer_disp = 0;
|
||
switch (word & 3)
|
||
{
|
||
case 2:
|
||
outer_disp = NEXTWORD (p);
|
||
break;
|
||
case 3:
|
||
outer_disp = NEXTLONG (p);
|
||
}
|
||
|
||
print_base (basereg, base_disp, info);
|
||
if ((word & 4) == 0 && buf[0] != '\0')
|
||
{
|
||
(*info->fprintf_func) (info->stream, ",%s", buf);
|
||
buf[0] = '\0';
|
||
}
|
||
sprintf_vma (vmabuf, outer_disp);
|
||
(*info->fprintf_func) (info->stream, ")@(%s", vmabuf);
|
||
if (buf[0] != '\0')
|
||
(*info->fprintf_func) (info->stream, ",%s", buf);
|
||
(*info->fprintf_func) (info->stream, ")");
|
||
|
||
return p;
|
||
}
|
||
|
||
/* Print a base register REGNO and displacement DISP, on INFO->STREAM.
|
||
REGNO = -1 for pc, -2 for none (suppressed). */
|
||
|
||
static void
|
||
print_base (regno, disp, info)
|
||
int regno;
|
||
bfd_vma disp;
|
||
disassemble_info *info;
|
||
{
|
||
if (regno == -1)
|
||
{
|
||
(*info->fprintf_func) (info->stream, "%%pc@(");
|
||
(*info->print_address_func) (disp, info);
|
||
}
|
||
else
|
||
{
|
||
char buf[50];
|
||
|
||
if (regno == -2)
|
||
(*info->fprintf_func) (info->stream, "@(");
|
||
else if (regno == -3)
|
||
(*info->fprintf_func) (info->stream, "%%zpc@(");
|
||
else
|
||
(*info->fprintf_func) (info->stream, "%s@(", reg_names[regno]);
|
||
|
||
sprintf_vma (buf, disp);
|
||
(*info->fprintf_func) (info->stream, "%s", buf);
|
||
}
|
||
}
|