296 lines
9.9 KiB
C
296 lines
9.9 KiB
C
/* $NetBSD: bus_dma_defs.h,v 1.1 2011/07/01 17:28:55 dyoung Exp $ */
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/*-
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* Copyright (c) 1997, 1998, 2000, 2001 The NetBSD Foundation, Inc.
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* All rights reserved.
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*
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* This code is derived from software contributed to The NetBSD Foundation
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* by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
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* NASA Ames Research Center.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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/*
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* Copyright (c) 1996 Carnegie-Mellon University.
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* All rights reserved.
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*
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* Author: Chris G. Demetriou
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*
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* Permission to use, copy, modify and distribute this software and
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* its documentation is hereby granted, provided that both the copyright
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* notice and this permission notice appear in all copies of the
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* software, derivative works or modified versions, and any portions
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* thereof, and that both notices appear in supporting documentation.
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*
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* CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
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* CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND
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* FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
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*
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* Carnegie Mellon requests users of this software to return to
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*
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* Software Distribution Coordinator or Software.Distribution@CS.CMU.EDU
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* School of Computer Science
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* Carnegie Mellon University
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* Pittsburgh PA 15213-3890
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*
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* any improvements or extensions that they make and grant Carnegie the
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* rights to redistribute these changes.
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*/
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#ifndef _MIPS_BUS_DMA_DEFS_H_
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#define _MIPS_BUS_DMA_DEFS_H_
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#include <sys/types.h>
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#ifdef _KERNEL
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/*
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* Bus DMA methods.
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*/
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/*
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* Flags used in various bus DMA methods.
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*/
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#define BUS_DMA_WAITOK 0x000 /* safe to sleep (pseudo-flag) */
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#define BUS_DMA_NOWAIT 0x001 /* not safe to sleep */
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#define BUS_DMA_ALLOCNOW 0x002 /* perform resource allocation now */
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#define BUS_DMA_COHERENT 0x004 /* hint: map memory DMA coherent */
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#define BUS_DMA_STREAMING 0x008 /* hint: sequential, unidirectional */
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#define BUS_DMA_BUS1 0x010 /* placeholders for bus functions... */
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#define BUS_DMA_BUS2 0x020
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#define BUS_DMA_BUS3 0x040
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#define BUS_DMA_BUS4 0x080
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#define BUS_DMA_READ 0x100 /* mapping is device -> memory only */
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#define BUS_DMA_WRITE 0x200 /* mapping is memory -> device only */
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#define BUS_DMA_NOCACHE 0x400 /* hint: map non-cached memory */
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/*
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* Private flags stored in the DMA map.
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*/
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#define _BUS_DMAMAP_COHERENT 0x10000 /* no cache flush necessary on sync */
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/* Forwards needed by prototypes below. */
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struct mbuf;
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struct uio;
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/*
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* Operations performed by bus_dmamap_sync().
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*/
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#define BUS_DMASYNC_PREREAD 0x01 /* pre-read synchronization */
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#define BUS_DMASYNC_POSTREAD 0x02 /* post-read synchronization */
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#define BUS_DMASYNC_PREWRITE 0x04 /* pre-write synchronization */
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#define BUS_DMASYNC_POSTWRITE 0x08 /* post-write synchronization */
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typedef struct mips_bus_dma_tag *bus_dma_tag_t;
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typedef struct mips_bus_dmamap *bus_dmamap_t;
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/*
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* bus_dma_segment_t
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*
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* Describes a single contiguous DMA transaction. Values
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* are suitable for programming into DMA registers.
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*/
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struct mips_bus_dma_segment {
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bus_addr_t ds_addr; /* DMA address */
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bus_size_t ds_len; /* length of transfer */
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bus_addr_t _ds_vaddr; /* virtual address, 0 if invalid */
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};
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typedef struct mips_bus_dma_segment bus_dma_segment_t;
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/*
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* DMA mapping methods.
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*/
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struct mips_bus_dmamap_ops {
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int (*dmamap_create)(bus_dma_tag_t, bus_size_t, int,
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bus_size_t, bus_size_t, int, bus_dmamap_t *);
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void (*dmamap_destroy)(bus_dma_tag_t, bus_dmamap_t);
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int (*dmamap_load)(bus_dma_tag_t, bus_dmamap_t, void *,
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bus_size_t, struct proc *, int);
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int (*dmamap_load_mbuf)(bus_dma_tag_t, bus_dmamap_t,
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struct mbuf *, int);
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int (*dmamap_load_uio)(bus_dma_tag_t, bus_dmamap_t,
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struct uio *, int);
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int (*dmamap_load_raw)(bus_dma_tag_t, bus_dmamap_t,
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bus_dma_segment_t *, int, bus_size_t, int);
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void (*dmamap_unload)(bus_dma_tag_t, bus_dmamap_t);
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void (*dmamap_sync)(bus_dma_tag_t, bus_dmamap_t,
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bus_addr_t, bus_size_t, int);
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};
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/*
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* DMA memory utility functions.
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*/
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struct mips_bus_dmamem_ops {
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int (*dmamem_alloc)(bus_dma_tag_t, bus_size_t, bus_size_t,
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bus_size_t, bus_dma_segment_t *, int, int *, int);
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void (*dmamem_free)(bus_dma_tag_t,
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bus_dma_segment_t *, int);
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int (*dmamem_map)(bus_dma_tag_t, bus_dma_segment_t *,
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int, size_t, void **, int);
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void (*dmamem_unmap)(bus_dma_tag_t, void *, size_t);
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paddr_t (*dmamem_mmap)(bus_dma_tag_t, bus_dma_segment_t *,
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int, off_t, int, int);
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};
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/*
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* DMA tag utility functions.
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*/
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struct mips_bus_dmatag_ops {
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int (*dmatag_subregion)(bus_dma_tag_t, bus_addr_t, bus_addr_t,
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bus_dma_tag_t *, int);
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void (*dmatag_destroy)(bus_dma_tag_t);
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};
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/*
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* bus_dma_tag_t
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*
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* A machine-dependent opaque type describing the implementation of
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* DMA for a given bus.
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*/
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struct mips_bus_dma_tag {
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void *_cookie; /* cookie used in the guts */
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bus_addr_t _wbase; /* DMA window base */
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int _tag_needs_free; /* number of references (maybe 0) */
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bus_addr_t _bounce_thresh;
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bus_addr_t _bounce_alloc_lo; /* physical base of the window */
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bus_addr_t _bounce_alloc_hi; /* physical limit of the windows */
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int (*_may_bounce)(bus_dma_tag_t, bus_dmamap_t, int, int *);
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struct mips_bus_dmamap_ops _dmamap_ops;
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struct mips_bus_dmamem_ops _dmamem_ops;
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struct mips_bus_dmatag_ops _dmatag_ops;
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};
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/*
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* bus_dmamap_t
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*
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* Describes a DMA mapping.
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*/
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struct mips_bus_dmamap {
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/*
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* PRIVATE MEMBERS: not for use my machine-independent code.
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*/
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bus_size_t _dm_size; /* largest DMA transfer mappable */
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int _dm_segcnt; /* number of segs this map can map */
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bus_size_t _dm_maxmaxsegsz; /* fixed largest possible segment */
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bus_size_t _dm_boundary; /* don't cross this */
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bus_addr_t _dm_bounce_thresh; /* bounce threshold; see tag */
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int _dm_flags; /* misc. flags */
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struct vmspace *_dm_vmspace; /* vmspace that owns the mapping */
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/*
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* Private cookie to be used by the DMA back-end.
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*/
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void *_dm_cookie;
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/*
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* PUBLIC MEMBERS: these are used by machine-independent code.
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*/
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bus_size_t dm_maxsegsz; /* largest possible segment */
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bus_size_t dm_mapsize; /* size of the mapping */
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int dm_nsegs; /* # valid segments in mapping */
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bus_dma_segment_t dm_segs[1]; /* segments; variable length */
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};
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#ifdef _MIPS_BUS_DMA_PRIVATE
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#define _BUS_AVAIL_END mips_avail_end
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/*
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* Cookie used for bounce buffers. A pointer to one of these it stashed in
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* the DMA map.
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*/
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struct mips_bus_dma_cookie {
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int id_flags; /* flags; see below */
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/*
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* Information about the original buffer used during
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* DMA map syncs. Note that origibuflen is only used
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* for ID_BUFTYPE_LINEAR.
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*/
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union {
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void *un_origbuf; /* pointer to orig buffer if
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bouncing */
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char *un_linearbuf;
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struct mbuf *un_mbuf;
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struct uio *un_uio;
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} id_origbuf_un;
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#define id_origbuf id_origbuf_un.un_origbuf
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#define id_origlinearbuf id_origbuf_un.un_linearbuf
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#define id_origmbuf id_origbuf_un.un_mbuf
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#define id_origuio id_origbuf_un.un_uio
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bus_size_t id_origbuflen; /* ...and size */
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int id_buftype; /* type of buffer */
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void *id_bouncebuf; /* pointer to the bounce buffer */
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bus_size_t id_bouncebuflen; /* ...and size */
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int id_nbouncesegs; /* number of valid bounce segs */
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bus_dma_segment_t id_bouncesegs[0]; /* array of bounce buffer
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physical memory segments */
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};
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/* id_flags */
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#endif /* _MIPS_BUS_DMA_PRIVATE */
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#define _BUS_DMA_MIGHT_NEED_BOUNCE 0x01 /* may need bounce buffers */
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#ifdef _MIPS_BUS_DMA_PRIVATE
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#define _BUS_DMA_HAS_BOUNCE 0x02 /* has bounce buffers */
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#define _BUS_DMA_IS_BOUNCING 0x04 /* is bouncing current xfer */
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/* id_buftype */
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#define _BUS_DMA_BUFTYPE_INVALID 0
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#define _BUS_DMA_BUFTYPE_LINEAR 1
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#define _BUS_DMA_BUFTYPE_MBUF 2
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#define _BUS_DMA_BUFTYPE_UIO 3
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#define _BUS_DMA_BUFTYPE_RAW 4
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extern const struct mips_bus_dmamap_ops mips_bus_dmamap_ops;
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extern const struct mips_bus_dmamem_ops mips_bus_dmamem_ops;
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extern const struct mips_bus_dmatag_ops mips_bus_dmatag_ops;
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#define _BUS_DMAMAP_OPS_INITIALIZER { \
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.dmamap_create = _bus_dmamap_create, \
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.dmamap_destroy = _bus_dmamap_destroy, \
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.dmamap_load = _bus_dmamap_load, \
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.dmamap_load_mbuf = _bus_dmamap_load_mbuf, \
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.dmamap_load_uio = _bus_dmamap_load_uio, \
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.dmamap_load_raw = _bus_dmamap_load_raw, \
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.dmamap_unload = _bus_dmamap_unload, \
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.dmamap_sync = _bus_dmamap_sync, \
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}
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#define _BUS_DMAMEM_OPS_INITIALIZER { \
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.dmamem_alloc = _bus_dmamem_alloc, \
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.dmamem_free = _bus_dmamem_free, \
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.dmamem_map = _bus_dmamem_map, \
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.dmamem_unmap = _bus_dmamem_unmap, \
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.dmamem_mmap = _bus_dmamem_mmap, \
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}
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#define _BUS_DMATAG_OPS_INITIALIZER { \
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.dmatag_subregion = _bus_dmatag_subregion, \
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.dmatag_destroy = _bus_dmatag_destroy, \
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}
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#endif /* _MIPS_BUS_DMA_PRIVATE */
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#endif /* _KERNEL */
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#endif /* _MIPS_BUS_DMA_DEFS_H_ */
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