90 lines
3.6 KiB
C
90 lines
3.6 KiB
C
/* $NetBSD: dmavar.h,v 1.7 1996/03/31 22:32:48 pk Exp $ */
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/*
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* Copyright (c) 1994 Peter Galbavy. All rights reserved.
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by Peter Galbavy.
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* 4. The name of the author may not be used to endorse or promote products
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* derived from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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struct dma_softc {
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struct device sc_dev; /* us as a device */
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struct sbusdev sc_sd; /* sbus device */
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struct esp_softc *sc_esp; /* my scsi */
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struct le_softc *sc_le; /* my ethernet */
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struct dma_regs *sc_regs; /* the registers */
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int sc_active; /* DMA active ? */
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int sc_rev; /* revision */
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int sc_node; /* PROM node ID */
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caddr_t sc_dvmakaddr; /* DVMA cookies */
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caddr_t sc_dvmaaddr; /* */
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size_t sc_dmasize;
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caddr_t *sc_dmaaddr;
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size_t *sc_dmalen;
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void (*reset)(struct dma_softc *); /* reset routine */
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void (*enintr)(struct dma_softc *); /* enable interrupts */
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int (*isintr)(struct dma_softc *); /* interrupt ? */
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int (*intr)(struct dma_softc *); /* interrupt ! */
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int (*setup)(struct dma_softc *, caddr_t *, size_t *, int, size_t *);
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void (*go)(struct dma_softc *);
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};
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#define DMACSR(sc) (sc->sc_regs->csr)
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#define DMADDR(sc) (sc->sc_regs->addr)
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/*
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* We are not allowed to touch the DMA "flush" and "drain" bits
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* while it is still thinking about a request (DMA_RP).
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*/
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/*
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* TIME WAIT (to debug hanging machine problem)
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*/
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#define TIME_WAIT(COND, MSG, SC) { int count = 500000; \
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while (--count > 0 && (COND)) DELAY(1); \
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if (count == 0) { \
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printf("CSR = %lx\n",\
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SC->sc_regs->csr);\
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panic(MSG); } \
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}
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#define DMAWAIT(sc) TIME_WAIT((sc->sc_regs->csr & D_R_PEND), "DMAWAIT", sc)
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#define DMAWAIT1(sc) TIME_WAIT((sc->sc_regs->csr & D_DRAINING), "DMAWAIT1", sc)
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#define DMAREADY(sc) TIME_WAIT((!(sc->sc_regs->csr & D_DMA_ON)), "DMAREADY", sc)
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#define DMA_DRAIN(sc) if (sc->sc_rev < DMAREV_2) { \
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DMACSR(sc) |= D_DRAIN; \
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DMAWAIT1(sc); \
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}
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/* DMA engine functions */
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#define DMA_ENINTR(r) (((r)->enintr)(r))
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#define DMA_ISINTR(r) (((r)->isintr)(r))
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#define DMA_RESET(r) (((r)->reset)(r))
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#define DMA_INTR(r) (((r)->intr)(r))
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#define DMA_ISACTIVE(r) ((r)->sc_active)
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#define DMA_SETUP(a, b, c, d, e) (((a)->setup)(a, b, c, d, e))
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#define DMA_GO(r) (((r)->go)(r))
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