128 lines
3.5 KiB
ArmAsm
128 lines
3.5 KiB
ArmAsm
/* $NetBSD: imx31lk_start.S,v 1.5 2014/03/30 23:12:26 matt Exp $ */
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/*-
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* Copyright (c) 2011 The NetBSD Foundation, Inc.
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* All rights reserved.
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*
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* This code is derived from software contributed to The NetBSD Foundation
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* by Matt Thomas of 3am Software Foundry.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <machine/asm.h>
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#include <arm/armreg.h>
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#include "assym.h"
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RCSID("$NetBSD: imx31lk_start.S,v 1.5 2014/03/30 23:12:26 matt Exp $")
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#ifndef SDRAM_START
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#define SDRAM_START 0x80000000
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#endif
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/*
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* L1 == "Level One" == "first-level"
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* L2 == "Level Two" == "second-level"
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*/
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.text
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.global _C_LABEL(imx31lk_start)
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_C_LABEL(imx31lk_start):
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cpsid if, #PSR_SVC32_MODE
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/*
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* Firmware already mapped SDRAM VA == PA. at 0x800..
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* now map SDRAM also at VA 0x800...
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*/
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mrc p15, 0, r0, c2, c0, 0 /* L1 table addr into r0 */
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#ifdef ARM_MMU_EXTENDED
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mcr p15, 0, r0, c2, c0, 1 /* copy it to TTBR1 */
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mov r3, #TTBCR_S_N_1
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mcr p15, 0, r3, c2, c0, 2 /* set TTBCR to enable TTBR1 */
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#endif
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mov r1, #(KERNEL_BASE_EXT >> L1_S_SHIFT)
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add r2, r1, #0x80 /* 128 1MB entries */
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ldr r3, .Lsdram_pde
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1:
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/* and looplooploop */
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str r3, [r0, r1, lsl #2]
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add r3, r3, #L1_S_SIZE
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add r1, r1, #1
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cmp r1, r2
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blt 1b
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/*
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* Map an L1 section for each device to make this easy.
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*/
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/* UART1 */
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mov r1, #0xfd0 /* offset to 0xfd000000 */
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ldr r3, .Lio_pde
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str r3, [r0, r1, lsl #2]
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/* etc, TBD... */
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/*
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* Make domain control go full art.
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*/
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mov r0, #((DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL * 2))|DOMAIN_CLIENT)
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mcr p15, 0, r0, c3, c0, 0
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/*
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* Now let's clean the cache again to make sure everything is in place.
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*/
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bl _C_LABEL(arm11x6_idcache_wbinv_all)
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/* Invalidate TLBs just to be sure */
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mov r0, #0
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mcr p15, 0, r0, c8, c7, 0
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/*
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* You are standing at the gate to NetBSD. --More--
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* Unspeakable cruelty and harm lurk down there. --More--
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* Are you sure you want to enter?
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*/
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#ifdef KERNEL_BASES_EQUAL
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b start
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#else
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adr r0, .Lstart
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ldr ip, [r0]
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bx ip
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#endif
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/* symbol to use for address calculation in the right VA */
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#ifndef KERNEL_BASES_EQUAL
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.Lstart:
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.word start
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#endif
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#if L1_S_DOM_KERNEL
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#error kernel domain (L1_S_DOM_KERNEL) is not 0
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#endif
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.Lsdram_pde:
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.word 0x80000000|L1_S_AP_KRW|L1_S_C|L1_S_B|L1_TYPE_S
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.Lio_pde:
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.word 0x43f00000|L1_S_AP_KRW|L1_TYPE_S
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END(imx31lk_start)
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