96cc888f77
- New audio driver - Add new devices rtc and digfilt - Use BOOT_ARGS if defined in kernel configuration
417 lines
11 KiB
C
417 lines
11 KiB
C
/* $Id: imx23_olinuxino_machdep.c,v 1.6 2015/01/10 12:18:09 jmcneill Exp $ */
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/*
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* Copyright (c) 2012 The NetBSD Foundation, Inc.
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* All rights reserved.
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*
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* This code is derived from software contributed to The NetBSD Foundation
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* by Petri Laakso.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#include "opt_imx.h"
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#include <sys/bus.h>
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#include <sys/cdefs.h>
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#include <sys/device.h>
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#include <sys/mount.h>
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#include <sys/reboot.h>
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#include <sys/systm.h>
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#include <sys/termios.h>
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#include <sys/types.h>
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#include <uvm/uvm_prot.h>
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#include <machine/bootconfig.h>
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#include <machine/db_machdep.h>
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#include <machine/pmap.h>
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#include <arm/armreg.h>
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#include <arm/cpu.h>
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#include <arm/cpufunc.h>
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#include <arm/locore.h>
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#include <arm/arm32/machdep.h>
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#include <arm/arm32/pte.h>
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#include <arm/imx/imx23_clkctrlreg.h>
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#include <arm/imx/imx23_digctlreg.h>
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#include <arm/imx/imx23_rtcreg.h>
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#include <arm/imx/imx23_uartdbgreg.h>
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#include <arm/imx/imx23var.h>
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#include "plcom.h"
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#if (NPLCOM > 0)
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#include <evbarm/dev/plcomreg.h>
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#include <evbarm/dev/plcomvar.h>
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#endif
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#include "opt_evbarm_boardtype.h"
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#include "opt_machdep.h"
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#define KERNEL_VM_BASE (KERNEL_BASE + 0x8000000)
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#define KERNEL_VM_SIZE 0x20000000
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#define L1_PAGE_TABLE (DRAM_BASE + MEMSIZE * 1024 * 1024 - L1_TABLE_SIZE)
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#define BOOTIMX23_ARGS (L1_PAGE_TABLE - MAX_BOOT_STRING - 1)
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#define PLCONMODE ((TTYDEF_CFLAG & ~(CSIZE | CSTOPB | PARENB)) | CS8) /* 8N1 */
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#define PLCONSPEED 115200
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#define REG_RD(reg) *(volatile uint32_t *)(reg)
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#define REG_WR(reg, val) \
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do { \
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*(volatile uint32_t *)((reg)) = val; \
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} while (0)
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#define KERNEL_BASE_PHYS ((paddr_t)&KERNEL_BASE_phys)
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#define KERNEL_BASE_VIRT ((vaddr_t)&KERNEL_BASE_virt)
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#define KERN_VTOPHYS(va) \
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((paddr_t)((vaddr_t)(va) - KERNEL_BASE + KERNEL_BASE_PHYS))
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#define KERN_PHYSTOV(pa) \
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((vaddr_t)((paddr_t)(pa) + KERNEL_BASE_VIRT + KERNEL_BASE))
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/*
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* Static device map for i.MX23 peripheral address space.
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*/
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#define _A(a) ((a) & ~L1_S_OFFSET)
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#define _S(s) (((s) + L1_S_SIZE - 1) & ~(L1_S_SIZE-1))
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static const struct pmap_devmap devmap[] = {
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{
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_A(APBH_BASE), /* Virtual address. */
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_A(APBH_BASE), /* Physical address. */
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_S(APBH_SIZE + APBX_SIZE), /* APBX located after APBH. */
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VM_PROT_READ|VM_PROT_WRITE, /* Protection bits. */
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PTE_NOCACHE /* Cache attributes. */
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},
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{ 0, 0, 0, 0, 0 }
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};
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#undef _A
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#undef _S
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static struct plcom_instance imx23_pi = {
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.pi_type = PLCOM_TYPE_PL011,
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.pi_iot = &imx23_bus_space,
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.pi_size = PL011COM_UART_SIZE,
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.pi_iobase = HW_UARTDBG_BASE
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};
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extern char KERNEL_BASE_phys;
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extern char KERNEL_BASE_virt;
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BootConfig bootconfig;
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char *boot_args;
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static char kernel_boot_args[MAX_BOOT_STRING];
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#define SSP_DIV 2
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#define IO_FRAC 27
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static void power_vddio_from_dcdc(int, int);
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static void set_ssp_div(unsigned int);
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static void set_io_frac(unsigned int);
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static void bypass_ssp(void);
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/*
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* Initialize ARM and return new SVC stack pointer.
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*/
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u_int
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initarm(void *arg)
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{
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psize_t ram_size;
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if (set_cpufuncs())
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panic("set_cpufuncs failed");
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pmap_devmap_register(devmap);
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consinit();
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#define BDSTR(s) _BDSTR(s)
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#define _BDSTR(s) #s
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printf("\nNetBSD/evbarm (" BDSTR(EVBARM_BOARDTYPE) ") booting ...\n");
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#undef BDSTR
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#undef _BDSTR
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/*
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* SSP_CLK setup was postponed here from bootimx23 because SB wasn't
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* able to load kernel if clocks were changed.
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*/
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power_vddio_from_dcdc(3300, 2925);
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set_ssp_div(SSP_DIV);
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set_io_frac(IO_FRAC);
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bypass_ssp();
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cpu_domains((DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL*2)) | DOMAIN_CLIENT);
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/* Copy boot arguments passed from bootimx23. */
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boot_args = (char *)KERN_PHYSTOV(BOOTIMX23_ARGS);
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memcpy(kernel_boot_args, boot_args, MAX_BOOT_STRING);
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#ifdef BOOT_ARGS
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strcpy(kernel_boot_args, BOOT_ARGS);
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#endif
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boot_args = kernel_boot_args;
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#ifdef VERBOSE_INIT_ARM
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printf("boot_args @ %lx: '%s'\n", KERN_PHYSTOV(BOOTIMX23_ARGS),
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boot_args);
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#endif
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parse_mi_bootargs(boot_args);
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ram_size = MEMSIZE * 1024 * 1024;
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bootconfig.dramblocks = 1;
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bootconfig.dram[0].address = DRAM_BASE;
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bootconfig.dram[0].pages = ram_size / PAGE_SIZE;
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bootconfig.dram[0].flags = BOOT_DRAM_CAN_DMA | BOOT_DRAM_PREFER;
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arm32_bootmem_init(bootconfig.dram[0].address, ram_size,
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((vsize_t)&KERNEL_BASE_phys));
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arm32_kernel_vm_init(KERNEL_VM_BASE, ARM_VECTORS_HIGH, 0, devmap,
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false);
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return initarm_common(KERNEL_VM_BASE, KERNEL_VM_SIZE, NULL, 0);
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}
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/*
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* Initialize console.
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*/
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void
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consinit(void)
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{
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/* consinit() is called from also from the main(). */
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static int consinit_called = 0;
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if (consinit_called)
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return;
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plcomcnattach(&imx23_pi, PLCONSPEED, IMX23_UART_CLK, PLCONMODE, 0);
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consinit_called = 1;
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return;
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}
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/*
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* Reboot or halt the system.
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*/
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void
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cpu_reboot(int howto, char *bootstr)
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{
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static int cpu_reboot_called = 0;
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boothowto |= howto;
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/*
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* If this is the first invocation of cpu_reboot() and the RB_NOSYNC
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* flag is not set in howto; sync and unmount the system disks by
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* calling vfs_shutdown(9) and set the time of day clock by calling
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* resettodr(9).
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*/
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if (!cpu_reboot_called && !(boothowto & RB_NOSYNC)) {
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vfs_shutdown();
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resettodr();
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}
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cpu_reboot_called = 1;
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IRQdisable; /* FIQ's stays on because they are special. */
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/*
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* If rebooting after a crash (i.e., if RB_DUMP is set in howto, but
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* RB_HALT is not), save a system crash dump.
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*/
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if ((boothowto & RB_DUMP) && !(boothowto & RB_HALT)) {
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panic("please implement crash dump!"); // XXX
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for(;;);
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/* NOTREACHED */
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}
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/* Run any shutdown hooks by calling pmf_system_shutdown(9). */
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pmf_system_shutdown(boothowto);
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printf("system %s.\n", boothowto & RB_HALT ? "halted" : "rebooted");
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if (boothowto & RB_HALT) {
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/* Enable i.MX233 wait-for-interrupt mode. */
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REG_WR(HW_CLKCTRL_BASE + HW_CLKCTRL_CPU,
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(REG_RD(HW_CLKCTRL_BASE + HW_CLKCTRL_CPU) |
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HW_CLKCTRL_CPU_INTERRUPT_WAIT));
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/* Disable FIQ's and wait for interrupt (which never arrives) */
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__asm volatile( \
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"mrs r0, cpsr\n\t" \
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"orr r0, #0x40\n\t" \
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"msr cpsr_c, r0\n\t" \
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"mov r0, #0\n\t" \
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"mcr p15, 0, r0, c7, c0, 4\n\t"
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);
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for(;;);
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/* NOT REACHED */
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}
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/* Reboot the system. */
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REG_WR(HW_RTC_BASE + HW_RTC_WATCHDOG, 10000);
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REG_WR(HW_RTC_BASE + HW_RTC_CTRL_SET, HW_RTC_CTRL_WATCHDOGEN);
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REG_WR(HW_RTC_BASE + HW_RTC_WATCHDOG, 0);
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for(;;);
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/* NOT REACHED */
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}
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/*
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* Delay us microseconds.
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*/
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void
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delay(unsigned int us)
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{
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uint32_t start;
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uint32_t now;
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uint32_t elapsed;
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uint32_t total;
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uint32_t last;
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total = 0;
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last = 0;
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start = REG_RD(HW_DIGCTL_BASE + HW_DIGCTL_MICROSECONDS);
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do {
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now = REG_RD(HW_DIGCTL_BASE + HW_DIGCTL_MICROSECONDS);
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if (start <= now)
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elapsed = now - start;
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else /* Take care of overflow. */
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elapsed = (UINT32_MAX - start) + 1 + now;
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total += elapsed - last;
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last = elapsed;
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} while (total < us);
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return;
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}
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#include <arm/imx/imx23_powerreg.h>
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#define PWR_VDDIOCTRL (HW_POWER_BASE + HW_POWER_VDDIOCTRL)
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#define PWR_CTRL (HW_POWER_BASE + HW_POWER_CTRL)
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#define PWR_CTRL_S (HW_POWER_BASE + HW_POWER_CTRL_SET)
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#define PWR_CTRL_C (HW_POWER_BASE + HW_POWER_CTRL_CLR)
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static void
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power_vddio_from_dcdc(int target, int brownout)
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{
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uint32_t tmp_r;
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/* BO_OFFSET must be withing 2700mV - 3475mV */
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if (brownout > 3475)
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brownout = 3475;
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else if (brownout < 2700)
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brownout = 2700;
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/* Set LINREG_OFFSET one step below TRG. */
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tmp_r = REG_RD(PWR_VDDIOCTRL);
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tmp_r &= ~HW_POWER_VDDIOCTRL_LINREG_OFFSET;
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tmp_r |= __SHIFTIN(2, HW_POWER_VDDIOCTRL_LINREG_OFFSET);
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REG_WR(PWR_VDDIOCTRL, tmp_r);
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delay(10000);
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/* Enable VDDIO switching converter output. */
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tmp_r = REG_RD(PWR_VDDIOCTRL);
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tmp_r &= ~HW_POWER_VDDIOCTRL_DISABLE_FET;
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REG_WR(PWR_VDDIOCTRL, tmp_r);
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delay(10000);
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/* Set target voltage and brownout level. */
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tmp_r = REG_RD(PWR_VDDIOCTRL);
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tmp_r &= ~(HW_POWER_VDDIOCTRL_BO_OFFSET | HW_POWER_VDDIOCTRL_TRG);
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tmp_r |= __SHIFTIN(((target - brownout) / 25),
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HW_POWER_VDDIOCTRL_BO_OFFSET);
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tmp_r |= __SHIFTIN(((target - 2800) / 25), HW_POWER_VDDIOCTRL_TRG);
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REG_WR(PWR_VDDIOCTRL, tmp_r);
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delay(10000);
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/* Enable PWDN_BRNOUT. */
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REG_WR(PWR_CTRL_C, HW_POWER_CTRL_VDDIO_BO_IRQ);
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tmp_r = REG_RD(PWR_VDDIOCTRL);
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tmp_r |= HW_POWER_VDDIOCTRL_PWDN_BRNOUT;
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REG_WR(PWR_VDDIOCTRL, tmp_r);
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return;
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}
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#include <arm/imx/imx23_clkctrlreg.h>
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#define CLKCTRL_SSP (HW_CLKCTRL_BASE + HW_CLKCTRL_SSP)
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#define CLKCTRL_FRAC (HW_CLKCTRL_BASE + HW_CLKCTRL_FRAC)
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#define CLKCTRL_SEQ_C (HW_CLKCTRL_BASE + HW_CLKCTRL_CLKSEQ_CLR)
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static
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void set_ssp_div(unsigned int div)
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{
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uint32_t tmp_r;
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tmp_r = REG_RD(CLKCTRL_SSP);
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tmp_r &= ~HW_CLKCTRL_SSP_CLKGATE;
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REG_WR(CLKCTRL_SSP, tmp_r);
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while (REG_RD(CLKCTRL_SSP) & HW_CLKCTRL_SSP_BUSY)
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;
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tmp_r = REG_RD(CLKCTRL_SSP);
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tmp_r &= ~HW_CLKCTRL_SSP_DIV;
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tmp_r |= __SHIFTIN(div, HW_CLKCTRL_SSP_DIV);
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REG_WR(CLKCTRL_SSP, tmp_r);
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while (REG_RD(CLKCTRL_SSP) & HW_CLKCTRL_SSP_BUSY)
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;
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return;
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}
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static
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void set_io_frac(unsigned int frac)
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{
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uint8_t *io_frac;
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uint32_t tmp_r;
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io_frac = (uint8_t *)(CLKCTRL_FRAC);
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io_frac++; /* emi */
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io_frac++; /* pix */
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io_frac++; /* io */
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tmp_r = (*io_frac)<<24;
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tmp_r &= ~(HW_CLKCTRL_FRAC_CLKGATEIO | HW_CLKCTRL_FRAC_IOFRAC);
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tmp_r |= __SHIFTIN(frac, HW_CLKCTRL_FRAC_IOFRAC);
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*io_frac = (uint8_t)(tmp_r>>24);
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return;
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}
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static
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void bypass_ssp(void)
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{
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REG_WR(CLKCTRL_SEQ_C, HW_CLKCTRL_CLKSEQ_BYPASS_SSP);
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return;
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}
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