566 lines
13 KiB
C
566 lines
13 KiB
C
/*
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* Copyright (c) 1992, 1993
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* The Regents of the University of California. All rights reserved.
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*
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* This code is derived from software contributed to Berkeley by
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* Sony Corp. and Kazumasa Utashiro of Software Research Associates, Inc.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by the University of
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* California, Berkeley and its contributors.
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* 4. Neither the name of the University nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* from: $Hdr: scsireg.h,v 4.300 91/06/09 06:38:12 root Rel41 $ SONY
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*
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* @(#)scsireg.h 8.1 (Berkeley) 6/11/93
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*/
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/*
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* scsireg.h
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*/
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#ifndef __SCSIREG__
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#define __SCSIREG__ 1
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/*
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* initiator status byte bit image
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*/
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#define INST_EP 0x80 /* End of Process */
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#define INST_WR 0x40 /* Waiting Reselection */
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#define INST_IP 0x20 /* In Process */
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#define INST_WAIT 0x10 /* Waiting Bus free */
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#define INST_LB 0x8 /* Loss of BUSY */
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#define INST_TO 0x4 /* Time Out */
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#define INST_PRE 0x2 /* PaRameter Error */
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#define INST_HE 0x1 /* Hard Error */
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#define INSTERMASK 0x7
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/*
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* target status byte bit image
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*/
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#define VENDOR 0x61
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#define TGSTMASK 0x1e
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#define TGST_RSVCFLCT 0x18
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#define TGST_INTERMED 0x10
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#define TGST_BUSY 0x8
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#define TGST_CC 0x2
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#define TGST_GOOD 0x0
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#define TS_MAPPED_PIO 0x01 /* program I/O with map */
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#define TS_CONTR_ON 0x02 /* contiguous transfer on */
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#define TS_CONTR_OFF 0x04 /* contiguous transfer off */
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#define TS_BYTE_DMA 0x08 /* DMA transfer(byte access) */
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#define TS_LONG_DMA 0x10 /* DMA transfer(long access) */
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/*
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* message byte
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*/
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#define MSG_IDENT 0x80
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#define MSG_RESELEN 0x40
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#define MSG_CCOMP 0
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#define MSG_EXTND 1
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#define MSG_SDP 2
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#define MSG_RDP 3
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#define MSG_DCNT 4
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#define MSG_IDE 5
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/*#define MSG_ABORT 6*/
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#define MSG_MREJ 7
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#define MSG_NOP 8
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#define MSG_PERROR 9
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/*
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* message identify byte bit image
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*/
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#define IDT_DISCON 0x40
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#define IDT_DRMASK 0x7
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/*
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* scsi command opcodes
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*/
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#define SCOP_TST 0x00
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#define SCOP_REZERO 0x01
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#define SCOP_REWIND 0x01
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#define SCOP_RSENSE 0x03
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#define SCOP_FMT 0x04
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#define SCOP_RBLIM 0x05
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#define SCOP_SPARAM 0x06
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#define SCOP_RASBLK 0x07
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#define SCOP_READ 0x08
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#define SCOP_MOERASE 0x09
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#define SCOP_WRITE 0x0a
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#define SCOP_SEEK 0x0b
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#define SCOP_MERASE 0x0e
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#define SCOP_WFMARK 0x10
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#define SCOP_SPACE 0x11
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#define SCOP_INQUIRY 0x12
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#define SCOP_SVERIFY 0x13
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#define SCOP_RBDATA 0x14
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#define SCOP_MSELECT 0x15
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#define SCOP_ERASE 0x19
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#define SCOP_MSENSE 0x1a
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#define SCOP_STST 0x1b
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#define SCOP_LOAD 0x1b
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#define SCOP_RECDIAG 0x1c
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#define SCOP_SNDDIAG 0x1d
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#define SCOP_MEDRMV 0x1e
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#define SCOP_RCAP 0x25
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#define SCOP_EREAD 0x28
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#define SCOP_EWRITE 0x2a
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#define SCOP_BSSRCH 0x2c
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#define SCOP_WSSRCH 0x2d
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#define SCOP_WRTVRFY 0x2e
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#define SCOP_VERIFY 0x2f
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#define SCOP_RDL 0x37
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#define SCOP_WBUF 0x3b
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#define SCOP_RBUF 0x3c
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#define SCOP_EJECT 0xc0
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#define SCOP_EESENSE 0xc1
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#define SCOP_READTOC 0xc1
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#define SCOP_READID 0xc2
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#define SCOP_ADP 0xc2
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#define SCOP_READQ 0xc2
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#define SCOP_BLANKS 0xc3
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#define SCOP_READHEAD 0xc3
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#define SCOP_PBSTS 0xc4
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#define SCOP_RCVDISK 0xc4
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#define SCOP_PAUSE 0xc5
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#define SCOP_PLAYTRACK 0xc6
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#define SCOP_PLAYMSF 0xc7
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#define SCOP_PLAYAUDIO 0xc8
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#define SCOP_ERASED 0xe7
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#define SCOP_RESET 0xff
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/*
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* other definition
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*/
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#define ON 1
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#define OFF 0
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/*
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* scsi internal parameter block
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*/
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struct scsi {
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/*00*/ u_char sc_istatus;
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/*01*/ u_char sc_tstatus;
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/*02*/ u_char sc_identify;
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/*03*/ u_char sc_message;
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/*04*/ u_int sc_mpages;
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/*08*/ u_int sc_bytesec;
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/*0c*/ u_char *sc_cpoint;
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/*10*/ u_int sc_ctrnscnt;
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/*14*/ struct sc_map *sc_map;
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union {
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struct un_type0 {
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/*18*/ u_int t0_opcode : 8;
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/*19*/ u_int t0_lun : 3;
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/*19*/ u_int t0_lad : 21;
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/*1c*/ u_char t0_count;
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/*1d*/ u_char t0_ctrl;
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/*1e*/
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} un_type0;
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struct un_tuio {
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/*18*/ u_char tu_opcode;
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/*19*/ u_char tu_lun : 3;
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/*19*/ u_char tu_resved : 3;
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/*19*/ u_char tu_code : 2;
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/*1a*/ u_char tu_count1;
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/*1b*/ u_char tu_count2;
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/*1c*/ u_char tu_count3;
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/*1d*/ u_char tu_ctrl;
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/*1e*/
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} un_tuio;
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struct un_mtio {
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/*18*/ u_char mt_opcode;
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/*19*/ u_char mt_lun : 3;
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/*19*/ u_char mt_resvd : 2;
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/*19*/ u_char mt_st : 1;
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/*19*/ u_char mt_code : 2;
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/*1a*/ u_char mt_len1;
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/*1b*/ u_char mt_len2;
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/*1c*/ u_char mt_len3;
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/*1d*/ u_char mt_ctrl;
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/*1e*/
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} un_mtio;
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struct un_type1 {
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/*18*/ u_char t1_opcode;
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/*19*/ u_char t1_lun : 3;
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/*19*/ u_char t1_rsvd : 4;
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/*19*/ u_char t1_relat : 1;
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/*1a*/ u_short t1_ladhi;
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/*1c*/ u_short t1_ladlo;
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/*1e*/ u_char t1_p1;
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/*1f*/ u_char t1_p2;
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/*20*/ u_char t1_p3;
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/*21*/ u_char t1_ctrl;
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/*22*/
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} un_type1;
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/*18*/ u_char un_reserved[12];
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/*24*/
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} sc_cdb;
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/*24*/ u_char sc_param[20];
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/*38*/ int sc_hbinfo; /* Copy of the hb_ctlr->hm_hbinfo */
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/*3c*/ u_int sc_ctag;
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/*40*/ u_int sc_coffset;
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/*44*/ void *sc_xs;
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/*48*/
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};
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#define sc_opcode sc_cdb.un_type0.t0_opcode
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#define sc_lun sc_cdb.un_type0.t0_lun
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#define sc_lad sc_cdb.un_type0.t0_lad
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#define sc_count sc_cdb.un_type0.t0_count
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#define sc_nsect sc_cdb.un_type0.t0_count
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#define sc_switch sc_cdb.un_type0.t0_count
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#define sc_ctrl sc_cdb.un_type0.t0_ctrl
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#define sc_tucode sc_cdb.un_tuio.tu_code
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#define sc_tucount1 sc_cdb.un_tuio.tu_count1
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#define sc_tucount2 sc_cdb.un_tuio.tu_count2
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#define sc_tucount3 sc_cdb.un_tuio.tu_count3
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#define sc_tunsect1 sc_cdb.un_tuio.tu_count1
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#define sc_tunsect2 sc_cdb.un_tuio.tu_count2
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#define sc_tunsect3 sc_cdb.un_tuio.tu_count3
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#define sc_mtst sc_cdb.un_mtio.mt_st
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#define sc_mtcode sc_cdb.un_mtio.mt_code
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#define sc_mtlen1 sc_cdb.un_mtio.mt_len1
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#define sc_mtlen2 sc_cdb.un_mtio.mt_len2
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#define sc_mtlen3 sc_cdb.un_mtio.mt_len3
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#define sc_mtcount1 sc_cdb.un_mtio.mt_len1
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#define sc_mtcount2 sc_cdb.un_mtio.mt_len2
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#define sc_mtcount3 sc_cdb.un_mtio.mt_len3
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#define sc_mtnsect1 sc_cdb.un_mtio.mt_len1
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#define sc_mtnsect2 sc_cdb.un_mtio.mt_len2
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#define sc_mtnsect3 sc_cdb.un_mtio.mt_len3
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#define sc_mtctrl sc_cdb.un_mtio.mt_ctrl
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#define sc_mtfxd sc_mtcode
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#define sc_mtimm sc_mtcode
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#define sc_mtlng sc_mtcode
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#define sc_ladhi sc_cdb.un_type1.t1_ladhi
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#define sc_ladlo sc_cdb.un_type1.t1_ladlo
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#define sc_pmi sc_cdb.un_type1.t1_p3
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#define scop_load(a,b,c,d,e) scop_stst(a,b,c,d,e)
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/*
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* tape unit space operation code definitions
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*/
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#define SCSC_DATA 0
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#define SCSC_FM 1
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#define SCSC_SQFM 2
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#define SCSC_EOD 3
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/*
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* scsi map table format
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*/
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#ifdef news3400
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#define NSCMAP 120
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#endif
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#ifdef news3800
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#define NSCMAP 129
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#endif
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struct sc_map {
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/*000*/ unsigned mp_offset;
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/*004*/ unsigned mp_pages;
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/*008*/ unsigned mp_addr[NSCMAP];
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};
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/*
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* scsi nonextended sense data
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*/
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struct sc_nextnd {
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/*00*/ u_int scn_advalid : 1;
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/*00*/ u_int scn_ecode : 7;
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/*01*/ u_int scn_resvd : 3;
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/*01*/ u_int scn_secno : 21;
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/*04*/
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};
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/*
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* scsi extended sense data
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*/
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struct sc_extnd {
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/*00*/ u_char sce_advalid : 1;
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/*00*/ u_char sce_extend : 7;
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/*01*/ u_char sce_segno;
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/*02*/ u_char sce_fm : 1;
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/*02*/ u_char sce_eom : 1;
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/*02*/ u_char sce_ili : 1;
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/*02*/ u_char sce_resvd : 1;
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/*02*/ u_char sce_skey : 4;
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/*03*/ u_char sce_infob1;
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/*04*/ u_char sce_infob2;
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/*05*/ u_char sce_infob3;
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/*06*/ u_char sce_infob4;
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/*07*/ u_char sce_addlen;
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union {
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struct un_ehd {
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/*08*/ u_short ehd_resvd1;
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/*0a*/ u_short ehd_resvd2;
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/*0c*/ u_char ehd_ecode;
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/*0d*/ u_char ehd_resvd3;
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/*0e*/ u_char ehd_fru;
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/*0f*/ u_char ehd_fpv : 1;
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/*0f*/ u_char ehd_cd : 1;
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/*0f*/ u_char ehd_resvd4 : 2;
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/*0f*/ u_char ehd_bpv : 1;
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/*0f*/ u_char ehd_bitpnt : 3;
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/*10*/ u_short ehd_fldpnt;
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/*12*/
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} un_ehd;
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struct un_etu {
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/*08*/ u_char etu_ecode;
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/*09*/ u_char etu_nerrhi;
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/*0a*/ u_char etu_nerrlo;
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/*0b*/
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} un_etu;
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struct un_emt {
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/*08*/ u_short emt_estat;
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/*0a*/ u_char emt_resvd1;
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/*0b*/ u_char emt_totlrtry;
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/*0c*/ u_short emt_resvd2;
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/*0e*/ u_short emt_resvd3;
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/*10*/ u_char emt_resvd4;
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/*11*/ u_char emt_ecode;
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/*12*/
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} un_emt;
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struct un_ewo {
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/*08*/ u_char ewo_resvd1;
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/*09*/ u_char ewo_resvd2;
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/*0a*/ u_char ewo_resvd3;
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/*0b*/ u_char ewo_sadvalid : 1;
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/*0b*/ u_char ewo_secode : 7;
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/*0c*/ u_char ewo_saddr1;
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/*0d*/ u_char ewo_saddr2;
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/*0e*/ u_char ewo_saddr3;
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/*0f*/ u_char ewo_saddr4;
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/*10*/ u_char ewo_resvd4;
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/*11*/ u_char ewo_dadvalid : 1;
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/*11*/ u_char ewo_decode : 7;
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/*12*/ u_char ewo_daddr1;
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/*13*/ u_char ewo_daddr2;
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/*14*/ u_char ewo_daddr3;
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/*15*/ u_char ewo_daddr4;
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/*16*/
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} un_ewo;
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struct un_eod {
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/*08*/ u_char eod_resvd1;
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/*09*/ u_char eod_resvd2;
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/*0a*/ u_char eod_resvd3;
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/*0b*/ u_char eod_resvd4;
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/*0c*/ u_char eod_ecode;
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/*0d*/ u_char eod_resvd5;
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/*0e*/ u_char eod_resvd6;
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/*0f*/ u_char eod_resvd7;
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/*10*/ u_char eod_resvd8;
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/*11*/ u_char eod_resvd9;
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/*12*/
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} un_eod;
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/*08*/ u_char un_data[24];
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/*20*/
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} sce_add;
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/*20*/
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};
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#define sce_hdecode sce_add.un_ehd.ehd_ecode
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#define sce_tuecode sce_add.un_etu.etu_ecode
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#define sce_tunerrhi sce_add.un_etu.etu_nerrhi
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#define sce_tunerrlo sce_add.un_etu.etu_nerrlo
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#define sce_mtestat sce_add.un_emt.emt_estat
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#define sce_mtecode sce_add.un_emt.emt_ecode
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#define sce_odecode sce_add.un_eod.eod_ecode
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#define sce_ascq sce_add.un_ehd.ehd_resvd3
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#define sce_sksv sce_add.un_ehd.ehd_fpv
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#define sce_actretry sce_add.un_ehd.ehd_fldpnt
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/*
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* scsi inquiry response data
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*/
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struct sc_inq {
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/*00*/ u_char sci_devtype;
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/*01*/ u_char sci_qual;
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/*02*/ u_char sci_version;
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/*03*/ u_char sci_resvd1;
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/*04*/ u_char sci_ninfo;
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/*05*/ u_char sci_drinfo;
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/*06*/ u_char sci_firmrev;
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/*07*/ u_char sci_ready;
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/*08*/ u_char sci_vendid[8];
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/*10*/ u_char sci_prodid[16];
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/*20*/ u_char sci_revision[4];
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/*24*/
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};
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/*
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* scsi read capacity data
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*/
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struct sc_rcap {
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/*00*/ u_int scr_nblock;
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/*04*/ u_int scr_blocklen;
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/*08*/
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};
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/*
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* scsi mode sense/select data
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*/
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struct sc_mdata {
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/*00*/ u_char scm_len;
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/*01*/ u_char scm_type;
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/*02*/ u_char scm_flags1;
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/*03*/ u_char scm_dlen;
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/*04*/ u_int scm_dens : 8;
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/*05*/ u_int scm_nblock : 24;
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/*08*/ u_int scm_resvd1 : 8;
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/*09*/ u_int scm_bsize : 24;
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/*0c*/ u_char scm_flags2;
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/*0d*/ u_char scm_resvd2;
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/*0e*/ u_char scm_resvd3;
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/*0f*/ u_char scm_maxrtry;
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/*10*/
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};
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#define scm_tdens scm_flags2
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/*
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* bits of scm_flags1
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*/
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#define SCM1_WRP 0x80
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#define SCM1_BUFM 0x10
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#define SCM1_SPD90 0x02
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/*
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* scm_type
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*/
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#define SCMT_DEFAULT 0x0
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#define SCMT_150_600 0x80
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#define SCMT_300_450 0x81
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/*
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* scm_dens
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*/
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#define SCMD_QIC_24_9 0x0 /* This may be 0x5 */
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#define SCMD_QIC_11_4 0x4
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#define SCMD_QIC_11_9 0x84
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#define SCMD_QIC_120_15 0xf
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#define SCMD_QIC_150_18 0x10
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#define SCMD_DEFAULT 0x00
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#define SCMD_800_BPI 0x01
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#define SCMD_1600_BPI 0x02
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#define SCMD_6250_BPI 0x03
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#define SCMD_3200_BPI 0x06
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#define SCMD_NEWTAPE 0x80
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#define SCMD_NOTAPE 0xff
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|
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|
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/*
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* bits of scm_flags2
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|
*/
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#define SCM2_DEA 0x04
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#define SCM2_AUI 0x02
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#define SCM2_SEC 0x01
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|
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/*
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* scsi reassign block perameter list
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|
*/
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struct sc_rab {
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/*00*/ u_short sca_resved;
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/*02*/ u_short sca_dllen;
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/*04*/ u_int sca_dlad[4];
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/*14*/
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};
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#ifdef CPU_DOUBLE
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# ifdef mips
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# define ipc_phys(x) (caddr_t)K0_TT0(x)
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# else
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# define ipc_phys(x) (caddr_t)((int)(x) & ~0x80000000)
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# endif
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|
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# ifdef news3800
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|
# define splsc spl4
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|
# define splscon spl3
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# endif
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|
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#endif /* CPU_DOUBLE */
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|
|
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#ifdef CPU_SINGLE
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# define ipc_phys(x) (caddr_t)(x)
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|
# ifdef news3400
|
|
# define splsc cpu_spl0 /* Lite2 used spl3 */
|
|
# define splscon spl2 XXX not used
|
|
extern int cpu_spl0 __P((void));
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# else
|
|
# define splsc spl4
|
|
# define splscon spl3
|
|
# endif
|
|
#endif /* CPU_SINGLE */
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|
|
|
#define SCSI_INTEN 1
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|
#define SCSI_INTDIS 0
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|
|
|
struct scintsw {
|
|
/*00*/ int (*sci_inthandler)(); /* pointer to interrupt handler */
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|
/*04*/ int sci_ctlr; /* controller number */
|
|
/*08*/
|
|
};
|
|
|
|
struct sc_data {
|
|
/*00*/ struct scsi *scd_scaddr; /* pointer to struct scsi */
|
|
/*04*/ vm_offset_t scd_vaddr; /* pointer to buffer address */
|
|
/*08*/ int scd_count; /* buffer size */
|
|
/*0c*/
|
|
};
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|
|
|
#endif /* !__SCSIREG__ */
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