1005 lines
22 KiB
C
1005 lines
22 KiB
C
/* $NetBSD: if_gm.c,v 1.27 2006/09/07 02:40:31 dogcow Exp $ */
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/*-
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* Copyright (c) 2000 Tsubai Masanari. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. The name of the author may not be used to endorse or promote products
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* derived from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: if_gm.c,v 1.27 2006/09/07 02:40:31 dogcow Exp $");
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#include "opt_inet.h"
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#include "rnd.h"
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#include "bpfilter.h"
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#include <sys/param.h>
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#include <sys/device.h>
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#include <sys/ioctl.h>
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#include <sys/kernel.h>
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#include <sys/mbuf.h>
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#include <sys/socket.h>
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#include <sys/systm.h>
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#include <sys/callout.h>
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#if NRND > 0
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#include <sys/rnd.h>
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#endif
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#include <uvm/uvm_extern.h>
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#include <net/if.h>
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#include <net/if_ether.h>
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#include <net/if_media.h>
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#if NBPFILTER > 0
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#include <net/bpf.h>
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#endif
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#ifdef INET
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#include <netinet/in.h>
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#include <netinet/if_inarp.h>
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#endif
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#include <dev/mii/mii.h>
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#include <dev/mii/miivar.h>
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#include <dev/pci/pcivar.h>
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#include <dev/pci/pcireg.h>
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#include <dev/pci/pcidevs.h>
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#include <dev/ofw/openfirm.h>
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#include <macppc/dev/if_gmreg.h>
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#include <machine/pio.h>
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#define NTXBUF 4
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#define NRXBUF 32
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struct gmac_softc {
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struct device sc_dev;
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struct ethercom sc_ethercom;
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vaddr_t sc_reg;
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struct gmac_dma *sc_txlist;
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struct gmac_dma *sc_rxlist;
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int sc_txnext;
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int sc_rxlast;
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caddr_t sc_txbuf[NTXBUF];
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caddr_t sc_rxbuf[NRXBUF];
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struct mii_data sc_mii;
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struct callout sc_tick_ch;
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char sc_laddr[6];
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#if NRND > 0
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rndsource_element_t sc_rnd_source; /* random source */
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#endif
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};
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#define sc_if sc_ethercom.ec_if
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int gmac_match __P((struct device *, struct cfdata *, void *));
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void gmac_attach __P((struct device *, struct device *, void *));
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static inline u_int gmac_read_reg __P((struct gmac_softc *, int));
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static inline void gmac_write_reg __P((struct gmac_softc *, int, u_int));
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static inline void gmac_start_txdma __P((struct gmac_softc *));
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static inline void gmac_start_rxdma __P((struct gmac_softc *));
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static inline void gmac_stop_txdma __P((struct gmac_softc *));
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static inline void gmac_stop_rxdma __P((struct gmac_softc *));
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int gmac_intr __P((void *));
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void gmac_tint __P((struct gmac_softc *));
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void gmac_rint __P((struct gmac_softc *));
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struct mbuf * gmac_get __P((struct gmac_softc *, caddr_t, int));
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void gmac_start __P((struct ifnet *));
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int gmac_put __P((struct gmac_softc *, caddr_t, struct mbuf *));
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void gmac_stop __P((struct gmac_softc *));
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void gmac_reset __P((struct gmac_softc *));
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void gmac_init __P((struct gmac_softc *));
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void gmac_init_mac __P((struct gmac_softc *));
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void gmac_setladrf __P((struct gmac_softc *));
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int gmac_ioctl __P((struct ifnet *, u_long, caddr_t));
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void gmac_watchdog __P((struct ifnet *));
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int gmac_mediachange __P((struct ifnet *));
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void gmac_mediastatus __P((struct ifnet *, struct ifmediareq *));
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int gmac_mii_readreg __P((struct device *, int, int));
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void gmac_mii_writereg __P((struct device *, int, int, int));
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void gmac_mii_statchg __P((struct device *));
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void gmac_mii_tick __P((void *));
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CFATTACH_DECL(gm, sizeof(struct gmac_softc),
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gmac_match, gmac_attach, NULL, NULL);
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int
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gmac_match(parent, match, aux)
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struct device *parent;
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struct cfdata *match;
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void *aux;
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{
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struct pci_attach_args *pa = aux;
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if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_APPLE &&
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(PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_APPLE_GMAC ||
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PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_APPLE_GMAC2 ||
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PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_APPLE_GMAC3))
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return 1;
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return 0;
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}
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void
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gmac_attach(parent, self, aux)
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struct device *parent, *self;
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void *aux;
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{
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struct gmac_softc *sc = (void *)self;
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struct pci_attach_args *pa = aux;
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struct ifnet *ifp = &sc->sc_if;
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struct mii_data *mii = &sc->sc_mii;
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pci_intr_handle_t ih;
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const char *intrstr = NULL;
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int node, i;
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char *p;
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struct gmac_dma *dp;
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u_int32_t reg[10];
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u_char laddr[6];
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node = pcidev_to_ofdev(pa->pa_pc, pa->pa_tag);
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if (node == 0) {
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printf(": cannot find gmac node\n");
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return;
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}
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OF_getprop(node, "local-mac-address", laddr, sizeof laddr);
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OF_getprop(node, "assigned-addresses", reg, sizeof reg);
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memcpy(sc->sc_laddr, laddr, sizeof laddr);
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sc->sc_reg = reg[2];
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if (pci_intr_map(pa, &ih)) {
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printf(": unable to map interrupt\n");
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return;
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}
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intrstr = pci_intr_string(pa->pa_pc, ih);
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if (pci_intr_establish(pa->pa_pc, ih, IPL_NET, gmac_intr, sc) == NULL) {
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printf(": unable to establish interrupt");
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if (intrstr)
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printf(" at %s", intrstr);
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printf("\n");
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return;
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}
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/* Setup packet buffers and DMA descriptors. */
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p = malloc((NRXBUF + NTXBUF) * 2048 + 3 * 0x800, M_DEVBUF, M_NOWAIT);
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if (p == NULL) {
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printf(": cannot malloc buffers\n");
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return;
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}
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p = (void *)roundup((vaddr_t)p, 0x800);
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memset(p, 0, 2048 * (NRXBUF + NTXBUF) + 2 * 0x800);
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sc->sc_rxlist = (void *)p;
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p += 0x800;
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sc->sc_txlist = (void *)p;
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p += 0x800;
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dp = sc->sc_rxlist;
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for (i = 0; i < NRXBUF; i++) {
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sc->sc_rxbuf[i] = p;
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dp->address = htole32(vtophys((vaddr_t)p));
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dp->cmd = htole32(GMAC_OWN);
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dp++;
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p += 2048;
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}
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dp = sc->sc_txlist;
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for (i = 0; i < NTXBUF; i++) {
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sc->sc_txbuf[i] = p;
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dp->address = htole32(vtophys((vaddr_t)p));
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dp++;
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p += 2048;
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}
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printf(": Ethernet address %s\n", ether_sprintf(laddr));
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printf("%s: interrupting at %s\n", sc->sc_dev.dv_xname, intrstr);
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callout_init(&sc->sc_tick_ch);
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gmac_reset(sc);
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gmac_init_mac(sc);
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memcpy(ifp->if_xname, sc->sc_dev.dv_xname, IFNAMSIZ);
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ifp->if_softc = sc;
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ifp->if_ioctl = gmac_ioctl;
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ifp->if_start = gmac_start;
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ifp->if_watchdog = gmac_watchdog;
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ifp->if_flags =
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IFF_BROADCAST | IFF_SIMPLEX | IFF_NOTRAILERS | IFF_MULTICAST;
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IFQ_SET_READY(&ifp->if_snd);
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mii->mii_ifp = ifp;
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mii->mii_readreg = gmac_mii_readreg;
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mii->mii_writereg = gmac_mii_writereg;
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mii->mii_statchg = gmac_mii_statchg;
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ifmedia_init(&mii->mii_media, 0, gmac_mediachange, gmac_mediastatus);
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mii_attach(self, mii, 0xffffffff, MII_PHY_ANY, MII_OFFSET_ANY, 0);
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/* Choose a default media. */
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if (LIST_FIRST(&mii->mii_phys) == NULL) {
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ifmedia_add(&mii->mii_media, IFM_ETHER|IFM_NONE, 0, NULL);
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ifmedia_set(&mii->mii_media, IFM_ETHER|IFM_NONE);
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} else
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ifmedia_set(&mii->mii_media, IFM_ETHER|IFM_AUTO);
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if_attach(ifp);
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ether_ifattach(ifp, laddr);
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#if NRND > 0
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rnd_attach_source(&sc->sc_rnd_source, sc->sc_dev.dv_xname,
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RND_TYPE_NET, 0);
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#endif
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}
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u_int
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gmac_read_reg(sc, reg)
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struct gmac_softc *sc;
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int reg;
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{
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return in32rb(sc->sc_reg + reg);
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}
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void
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gmac_write_reg(sc, reg, val)
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struct gmac_softc *sc;
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int reg;
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u_int val;
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{
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out32rb(sc->sc_reg + reg, val);
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}
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void
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gmac_start_txdma(sc)
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struct gmac_softc *sc;
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{
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u_int x;
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x = gmac_read_reg(sc, GMAC_TXDMACONFIG);
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x |= 1;
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gmac_write_reg(sc, GMAC_TXDMACONFIG, x);
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x = gmac_read_reg(sc, GMAC_TXMACCONFIG);
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x |= 1;
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gmac_write_reg(sc, GMAC_TXMACCONFIG, x);
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}
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void
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gmac_start_rxdma(sc)
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struct gmac_softc *sc;
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{
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u_int x;
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x = gmac_read_reg(sc, GMAC_RXDMACONFIG);
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x |= 1;
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gmac_write_reg(sc, GMAC_RXDMACONFIG, x);
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x = gmac_read_reg(sc, GMAC_RXMACCONFIG);
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x |= 1;
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gmac_write_reg(sc, GMAC_RXMACCONFIG, x);
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}
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void
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gmac_stop_txdma(sc)
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struct gmac_softc *sc;
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{
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u_int x;
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x = gmac_read_reg(sc, GMAC_TXDMACONFIG);
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x &= ~1;
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gmac_write_reg(sc, GMAC_TXDMACONFIG, x);
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x = gmac_read_reg(sc, GMAC_TXMACCONFIG);
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x &= ~1;
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gmac_write_reg(sc, GMAC_TXMACCONFIG, x);
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}
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void
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gmac_stop_rxdma(sc)
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struct gmac_softc *sc;
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{
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u_int x;
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x = gmac_read_reg(sc, GMAC_RXDMACONFIG);
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x &= ~1;
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gmac_write_reg(sc, GMAC_RXDMACONFIG, x);
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x = gmac_read_reg(sc, GMAC_RXMACCONFIG);
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x &= ~1;
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gmac_write_reg(sc, GMAC_RXMACCONFIG, x);
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}
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int
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gmac_intr(v)
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void *v;
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{
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struct gmac_softc *sc = v;
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u_int status;
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status = gmac_read_reg(sc, GMAC_STATUS) & 0xff;
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if (status == 0)
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return 0;
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if (status & GMAC_INT_RXDONE)
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gmac_rint(sc);
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if (status & GMAC_INT_TXEMPTY)
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gmac_tint(sc);
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#if NRND > 0
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rnd_add_uint32(&sc->sc_rnd_source, status);
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#endif
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return 1;
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}
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void
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gmac_tint(sc)
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struct gmac_softc *sc;
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{
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struct ifnet *ifp = &sc->sc_if;
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ifp->if_flags &= ~IFF_OACTIVE;
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ifp->if_timer = 0;
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gmac_start(ifp);
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}
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void
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gmac_rint(sc)
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struct gmac_softc *sc;
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{
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struct ifnet *ifp = &sc->sc_if;
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volatile struct gmac_dma *dp;
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struct mbuf *m;
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int i, j, len;
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u_int cmd;
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for (i = sc->sc_rxlast;; i++) {
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if (i == NRXBUF)
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i = 0;
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dp = &sc->sc_rxlist[i];
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cmd = le32toh(dp->cmd);
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if (cmd & GMAC_OWN)
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break;
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len = (cmd >> 16) & GMAC_LEN_MASK;
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len -= 4; /* CRC */
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if (le32toh(dp->cmd_hi) & 0x40000000) {
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ifp->if_ierrors++;
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goto next;
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}
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m = gmac_get(sc, sc->sc_rxbuf[i], len);
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if (m == NULL) {
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ifp->if_ierrors++;
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goto next;
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}
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#if NBPFILTER > 0
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/*
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* Check if there's a BPF listener on this interface.
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* If so, hand off the raw packet to BPF.
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*/
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if (ifp->if_bpf)
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bpf_mtap(ifp->if_bpf, m);
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#endif
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(*ifp->if_input)(ifp, m);
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ifp->if_ipackets++;
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next:
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dp->cmd_hi = 0;
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__asm volatile ("sync");
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dp->cmd = htole32(GMAC_OWN);
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}
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sc->sc_rxlast = i;
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/* XXX Make sure free buffers have GMAC_OWN. */
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i++;
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for (j = 1; j < NRXBUF; j++) {
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if (i == NRXBUF)
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i = 0;
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dp = &sc->sc_rxlist[i++];
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dp->cmd = htole32(GMAC_OWN);
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}
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}
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struct mbuf *
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gmac_get(sc, pkt, totlen)
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struct gmac_softc *sc;
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caddr_t pkt;
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int totlen;
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{
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struct mbuf *m;
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struct mbuf *top, **mp;
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int len;
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MGETHDR(m, M_DONTWAIT, MT_DATA);
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if (m == 0)
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return 0;
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m->m_pkthdr.rcvif = &sc->sc_if;
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m->m_pkthdr.len = totlen;
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len = MHLEN;
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top = 0;
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mp = ⊤
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while (totlen > 0) {
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if (top) {
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MGET(m, M_DONTWAIT, MT_DATA);
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if (m == 0) {
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m_freem(top);
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return 0;
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}
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len = MLEN;
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}
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if (totlen >= MINCLSIZE) {
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MCLGET(m, M_DONTWAIT);
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if ((m->m_flags & M_EXT) == 0) {
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m_free(m);
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m_freem(top);
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return 0;
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}
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len = MCLBYTES;
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}
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m->m_len = len = min(totlen, len);
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memcpy(mtod(m, caddr_t), pkt, len);
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pkt += len;
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totlen -= len;
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*mp = m;
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mp = &m->m_next;
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}
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return top;
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}
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void
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gmac_start(ifp)
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struct ifnet *ifp;
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{
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struct gmac_softc *sc = ifp->if_softc;
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struct mbuf *m;
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caddr_t buff;
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int i, tlen;
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volatile struct gmac_dma *dp;
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if ((ifp->if_flags & (IFF_RUNNING | IFF_OACTIVE)) != IFF_RUNNING)
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return;
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for (;;) {
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if (ifp->if_flags & IFF_OACTIVE)
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break;
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IFQ_DEQUEUE(&ifp->if_snd, m);
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if (m == 0)
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break;
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/* 5 seconds to watch for failing to transmit */
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ifp->if_timer = 5;
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ifp->if_opackets++; /* # of pkts */
|
|
|
|
i = sc->sc_txnext;
|
|
buff = sc->sc_txbuf[i];
|
|
tlen = gmac_put(sc, buff, m);
|
|
|
|
dp = &sc->sc_txlist[i];
|
|
dp->cmd_hi = 0;
|
|
dp->address_hi = 0;
|
|
dp->cmd = htole32(tlen | GMAC_OWN | GMAC_SOP);
|
|
|
|
i++;
|
|
if (i == NTXBUF)
|
|
i = 0;
|
|
__asm volatile ("sync");
|
|
|
|
gmac_write_reg(sc, GMAC_TXDMAKICK, i);
|
|
sc->sc_txnext = i;
|
|
|
|
#if NBPFILTER > 0
|
|
/*
|
|
* If BPF is listening on this interface, let it see the
|
|
* packet before we commit it to the wire.
|
|
*/
|
|
if (ifp->if_bpf)
|
|
bpf_mtap(ifp->if_bpf, m);
|
|
#endif
|
|
m_freem(m);
|
|
|
|
i++;
|
|
if (i == NTXBUF)
|
|
i = 0;
|
|
if (i == gmac_read_reg(sc, GMAC_TXDMACOMPLETE)) {
|
|
ifp->if_flags |= IFF_OACTIVE;
|
|
break;
|
|
}
|
|
}
|
|
}
|
|
|
|
int
|
|
gmac_put(sc, buff, m)
|
|
struct gmac_softc *sc;
|
|
caddr_t buff;
|
|
struct mbuf *m;
|
|
{
|
|
int len, tlen = 0;
|
|
|
|
for (; m; m = m->m_next) {
|
|
len = m->m_len;
|
|
if (len == 0)
|
|
continue;
|
|
memcpy(buff, mtod(m, caddr_t), len);
|
|
buff += len;
|
|
tlen += len;
|
|
}
|
|
if (tlen > 2048)
|
|
panic("%s: gmac_put packet overflow", sc->sc_dev.dv_xname);
|
|
|
|
return tlen;
|
|
}
|
|
|
|
void
|
|
gmac_reset(sc)
|
|
struct gmac_softc *sc;
|
|
{
|
|
int i, s;
|
|
|
|
s = splnet();
|
|
|
|
gmac_stop_txdma(sc);
|
|
gmac_stop_rxdma(sc);
|
|
|
|
gmac_write_reg(sc, GMAC_SOFTWARERESET, 3);
|
|
for (i = 10; i > 0; i--) {
|
|
delay(300000); /* XXX long delay */
|
|
if ((gmac_read_reg(sc, GMAC_SOFTWARERESET) & 3) == 0)
|
|
break;
|
|
}
|
|
if (i == 0)
|
|
printf("%s: reset timeout\n", sc->sc_dev.dv_xname);
|
|
|
|
sc->sc_txnext = 0;
|
|
sc->sc_rxlast = 0;
|
|
for (i = 0; i < NRXBUF; i++)
|
|
sc->sc_rxlist[i].cmd = htole32(GMAC_OWN);
|
|
__asm volatile ("sync");
|
|
|
|
gmac_write_reg(sc, GMAC_TXDMADESCBASEHI, 0);
|
|
gmac_write_reg(sc, GMAC_TXDMADESCBASELO,
|
|
vtophys((vaddr_t)sc->sc_txlist));
|
|
gmac_write_reg(sc, GMAC_RXDMADESCBASEHI, 0);
|
|
gmac_write_reg(sc, GMAC_RXDMADESCBASELO,
|
|
vtophys((vaddr_t)sc->sc_rxlist));
|
|
gmac_write_reg(sc, GMAC_RXDMAKICK, NRXBUF);
|
|
|
|
splx(s);
|
|
}
|
|
|
|
void
|
|
gmac_stop(sc)
|
|
struct gmac_softc *sc;
|
|
{
|
|
struct ifnet *ifp = &sc->sc_if;
|
|
int s;
|
|
|
|
s = splnet();
|
|
|
|
callout_stop(&sc->sc_tick_ch);
|
|
mii_down(&sc->sc_mii);
|
|
|
|
gmac_stop_txdma(sc);
|
|
gmac_stop_rxdma(sc);
|
|
|
|
gmac_write_reg(sc, GMAC_INTMASK, 0xffffffff);
|
|
|
|
ifp->if_flags &= ~(IFF_UP | IFF_RUNNING);
|
|
ifp->if_timer = 0;
|
|
|
|
splx(s);
|
|
}
|
|
|
|
void
|
|
gmac_init_mac(sc)
|
|
struct gmac_softc *sc;
|
|
{
|
|
int i, tb;
|
|
char *laddr = sc->sc_laddr;
|
|
|
|
if ((mfpvr() >> 16) == MPC601)
|
|
tb = mfrtcl();
|
|
else
|
|
tb = mftbl();
|
|
gmac_write_reg(sc, GMAC_RANDOMSEED, tb);
|
|
|
|
/* init-mii */
|
|
gmac_write_reg(sc, GMAC_DATAPATHMODE, 4);
|
|
gmac_mii_writereg(&sc->sc_dev, 0, 0, 0x1000);
|
|
|
|
gmac_write_reg(sc, GMAC_TXDMACONFIG, 0xffc00);
|
|
gmac_write_reg(sc, GMAC_RXDMACONFIG, 0);
|
|
gmac_write_reg(sc, GMAC_MACPAUSE, 0x1bf0);
|
|
gmac_write_reg(sc, GMAC_INTERPACKETGAP0, 0);
|
|
gmac_write_reg(sc, GMAC_INTERPACKETGAP1, 8);
|
|
gmac_write_reg(sc, GMAC_INTERPACKETGAP2, 4);
|
|
gmac_write_reg(sc, GMAC_MINFRAMESIZE, ETHER_MIN_LEN);
|
|
gmac_write_reg(sc, GMAC_MAXFRAMESIZE, ETHER_MAX_LEN);
|
|
gmac_write_reg(sc, GMAC_PASIZE, 7);
|
|
gmac_write_reg(sc, GMAC_JAMSIZE, 4);
|
|
gmac_write_reg(sc, GMAC_ATTEMPTLIMIT,0x10);
|
|
gmac_write_reg(sc, GMAC_MACCNTLTYPE, 0x8808);
|
|
|
|
gmac_write_reg(sc, GMAC_MACADDRESS0, (laddr[4] << 8) | laddr[5]);
|
|
gmac_write_reg(sc, GMAC_MACADDRESS1, (laddr[2] << 8) | laddr[3]);
|
|
gmac_write_reg(sc, GMAC_MACADDRESS2, (laddr[0] << 8) | laddr[1]);
|
|
gmac_write_reg(sc, GMAC_MACADDRESS3, 0);
|
|
gmac_write_reg(sc, GMAC_MACADDRESS4, 0);
|
|
gmac_write_reg(sc, GMAC_MACADDRESS5, 0);
|
|
gmac_write_reg(sc, GMAC_MACADDRESS6, 1);
|
|
gmac_write_reg(sc, GMAC_MACADDRESS7, 0xc200);
|
|
gmac_write_reg(sc, GMAC_MACADDRESS8, 0x0180);
|
|
gmac_write_reg(sc, GMAC_MACADDRFILT0, 0);
|
|
gmac_write_reg(sc, GMAC_MACADDRFILT1, 0);
|
|
gmac_write_reg(sc, GMAC_MACADDRFILT2, 0);
|
|
gmac_write_reg(sc, GMAC_MACADDRFILT2_1MASK, 0);
|
|
gmac_write_reg(sc, GMAC_MACADDRFILT0MASK, 0);
|
|
|
|
for (i = 0; i < 0x6c; i += 4)
|
|
gmac_write_reg(sc, GMAC_HASHTABLE0 + i, 0);
|
|
|
|
gmac_write_reg(sc, GMAC_SLOTTIME, 0x40);
|
|
|
|
if (IFM_OPTIONS(sc->sc_mii.mii_media_active) & IFM_FDX) {
|
|
gmac_write_reg(sc, GMAC_TXMACCONFIG, 6);
|
|
gmac_write_reg(sc, GMAC_XIFCONFIG, 1);
|
|
} else {
|
|
gmac_write_reg(sc, GMAC_TXMACCONFIG, 0);
|
|
gmac_write_reg(sc, GMAC_XIFCONFIG, 5);
|
|
}
|
|
|
|
if (0) /* g-bit? */
|
|
gmac_write_reg(sc, GMAC_MACCTRLCONFIG, 3);
|
|
else
|
|
gmac_write_reg(sc, GMAC_MACCTRLCONFIG, 0);
|
|
}
|
|
|
|
void
|
|
gmac_setladrf(sc)
|
|
struct gmac_softc *sc;
|
|
{
|
|
struct ifnet *ifp = &sc->sc_if;
|
|
struct ether_multi *enm;
|
|
struct ether_multistep step;
|
|
struct ethercom *ec = &sc->sc_ethercom;
|
|
u_int32_t crc;
|
|
u_int32_t hash[16];
|
|
u_int v;
|
|
int i;
|
|
|
|
/* Clear hash table */
|
|
for (i = 0; i < 16; i++)
|
|
hash[i] = 0;
|
|
|
|
/* Get current RX configuration */
|
|
v = gmac_read_reg(sc, GMAC_RXMACCONFIG);
|
|
|
|
if ((ifp->if_flags & IFF_PROMISC) != 0) {
|
|
/* Turn on promiscuous mode; turn off the hash filter */
|
|
v |= GMAC_RXMAC_PR;
|
|
v &= ~GMAC_RXMAC_HEN;
|
|
ifp->if_flags |= IFF_ALLMULTI;
|
|
goto chipit;
|
|
}
|
|
|
|
/* Turn off promiscuous mode; turn on the hash filter */
|
|
v &= ~GMAC_RXMAC_PR;
|
|
v |= GMAC_RXMAC_HEN;
|
|
|
|
/*
|
|
* Set up multicast address filter by passing all multicast addresses
|
|
* through a crc generator, and then using the high order 8 bits as an
|
|
* index into the 256 bit logical address filter. The high order bit
|
|
* selects the word, while the rest of the bits select the bit within
|
|
* the word.
|
|
*/
|
|
|
|
ETHER_FIRST_MULTI(step, ec, enm);
|
|
while (enm != NULL) {
|
|
if (memcmp(enm->enm_addrlo, enm->enm_addrhi, 6)) {
|
|
/*
|
|
* We must listen to a range of multicast addresses.
|
|
* For now, just accept all multicasts, rather than
|
|
* trying to set only those filter bits needed to match
|
|
* the range. (At this time, the only use of address
|
|
* ranges is for IP multicast routing, for which the
|
|
* range is big enough to require all bits set.)
|
|
*/
|
|
for (i = 0; i < 16; i++)
|
|
hash[i] = 0xffff;
|
|
ifp->if_flags |= IFF_ALLMULTI;
|
|
goto chipit;
|
|
}
|
|
|
|
crc = ether_crc32_le(enm->enm_addrlo, ETHER_ADDR_LEN);
|
|
|
|
/* Just want the 8 most significant bits. */
|
|
crc >>= 24;
|
|
|
|
/* Set the corresponding bit in the filter. */
|
|
hash[crc >> 4] |= 1 << (crc & 0xf);
|
|
|
|
ETHER_NEXT_MULTI(step, enm);
|
|
}
|
|
|
|
ifp->if_flags &= ~IFF_ALLMULTI;
|
|
|
|
chipit:
|
|
/* Now load the hash table into the chip */
|
|
for (i = 0; i < 16; i++)
|
|
gmac_write_reg(sc, GMAC_HASHTABLE0 + i * 4, hash[i]);
|
|
|
|
gmac_write_reg(sc, GMAC_RXMACCONFIG, v);
|
|
}
|
|
|
|
void
|
|
gmac_init(sc)
|
|
struct gmac_softc *sc;
|
|
{
|
|
struct ifnet *ifp = &sc->sc_if;
|
|
|
|
gmac_stop_txdma(sc);
|
|
gmac_stop_rxdma(sc);
|
|
|
|
gmac_init_mac(sc);
|
|
gmac_setladrf(sc);
|
|
|
|
gmac_start_txdma(sc);
|
|
gmac_start_rxdma(sc);
|
|
|
|
gmac_write_reg(sc, GMAC_INTMASK, ~(GMAC_INT_TXEMPTY | GMAC_INT_RXDONE));
|
|
|
|
ifp->if_flags |= IFF_RUNNING;
|
|
ifp->if_flags &= ~IFF_OACTIVE;
|
|
ifp->if_timer = 0;
|
|
|
|
callout_reset(&sc->sc_tick_ch, 1, gmac_mii_tick, sc);
|
|
|
|
gmac_start(ifp);
|
|
}
|
|
|
|
int
|
|
gmac_ioctl(ifp, cmd, data)
|
|
struct ifnet *ifp;
|
|
u_long cmd;
|
|
caddr_t data;
|
|
{
|
|
struct gmac_softc *sc = ifp->if_softc;
|
|
struct ifaddr *ifa = (struct ifaddr *)data;
|
|
struct ifreq *ifr = (struct ifreq *)data;
|
|
int s, error = 0;
|
|
|
|
s = splnet();
|
|
|
|
switch (cmd) {
|
|
|
|
case SIOCSIFADDR:
|
|
ifp->if_flags |= IFF_UP;
|
|
|
|
switch (ifa->ifa_addr->sa_family) {
|
|
#ifdef INET
|
|
case AF_INET:
|
|
gmac_init(sc);
|
|
arp_ifinit(ifp, ifa);
|
|
break;
|
|
#endif
|
|
default:
|
|
gmac_init(sc);
|
|
break;
|
|
}
|
|
break;
|
|
|
|
case SIOCSIFFLAGS:
|
|
if ((ifp->if_flags & IFF_UP) == 0 &&
|
|
(ifp->if_flags & IFF_RUNNING) != 0) {
|
|
/*
|
|
* If interface is marked down and it is running, then
|
|
* stop it.
|
|
*/
|
|
gmac_stop(sc);
|
|
ifp->if_flags &= ~IFF_RUNNING;
|
|
} else if ((ifp->if_flags & IFF_UP) != 0 &&
|
|
(ifp->if_flags & IFF_RUNNING) == 0) {
|
|
/*
|
|
* If interface is marked up and it is stopped, then
|
|
* start it.
|
|
*/
|
|
gmac_init(sc);
|
|
} else {
|
|
/*
|
|
* Reset the interface to pick up changes in any other
|
|
* flags that affect hardware registers.
|
|
*/
|
|
gmac_reset(sc);
|
|
gmac_init(sc);
|
|
}
|
|
#ifdef GMAC_DEBUG
|
|
if (ifp->if_flags & IFF_DEBUG)
|
|
sc->sc_flags |= GMAC_DEBUGFLAG;
|
|
#endif
|
|
break;
|
|
|
|
case SIOCADDMULTI:
|
|
case SIOCDELMULTI:
|
|
error = (cmd == SIOCADDMULTI) ?
|
|
ether_addmulti(ifr, &sc->sc_ethercom) :
|
|
ether_delmulti(ifr, &sc->sc_ethercom);
|
|
|
|
if (error == ENETRESET) {
|
|
/*
|
|
* Multicast list has changed; set the hardware filter
|
|
* accordingly.
|
|
*/
|
|
if (ifp->if_flags & IFF_RUNNING) {
|
|
gmac_init(sc);
|
|
/* gmac_setladrf(sc); */
|
|
}
|
|
error = 0;
|
|
}
|
|
break;
|
|
|
|
case SIOCGIFMEDIA:
|
|
case SIOCSIFMEDIA:
|
|
error = ifmedia_ioctl(ifp, ifr, &sc->sc_mii.mii_media, cmd);
|
|
break;
|
|
|
|
default:
|
|
error = EINVAL;
|
|
}
|
|
|
|
splx(s);
|
|
return error;
|
|
}
|
|
|
|
void
|
|
gmac_watchdog(ifp)
|
|
struct ifnet *ifp;
|
|
{
|
|
struct gmac_softc *sc = ifp->if_softc;
|
|
|
|
printf("%s: device timeout\n", ifp->if_xname);
|
|
ifp->if_oerrors++;
|
|
|
|
gmac_reset(sc);
|
|
gmac_init(sc);
|
|
}
|
|
|
|
int
|
|
gmac_mediachange(ifp)
|
|
struct ifnet *ifp;
|
|
{
|
|
struct gmac_softc *sc = ifp->if_softc;
|
|
|
|
return mii_mediachg(&sc->sc_mii);
|
|
}
|
|
|
|
void
|
|
gmac_mediastatus(ifp, ifmr)
|
|
struct ifnet *ifp;
|
|
struct ifmediareq *ifmr;
|
|
{
|
|
struct gmac_softc *sc = ifp->if_softc;
|
|
|
|
mii_pollstat(&sc->sc_mii);
|
|
|
|
ifmr->ifm_status = sc->sc_mii.mii_media_status;
|
|
ifmr->ifm_active = sc->sc_mii.mii_media_active;
|
|
}
|
|
|
|
int
|
|
gmac_mii_readreg(dev, phy, reg)
|
|
struct device *dev;
|
|
int phy, reg;
|
|
{
|
|
struct gmac_softc *sc = (void *)dev;
|
|
int i;
|
|
|
|
gmac_write_reg(sc, GMAC_MIFFRAMEOUTPUT,
|
|
0x60020000 | (phy << 23) | (reg << 18));
|
|
|
|
for (i = 1000; i >= 0; i -= 10) {
|
|
if (gmac_read_reg(sc, GMAC_MIFFRAMEOUTPUT) & 0x10000)
|
|
break;
|
|
delay(10);
|
|
}
|
|
if (i < 0) {
|
|
printf("%s: gmac_mii_readreg: timeout\n", sc->sc_dev.dv_xname);
|
|
return 0;
|
|
}
|
|
|
|
return gmac_read_reg(sc, GMAC_MIFFRAMEOUTPUT) & 0xffff;
|
|
}
|
|
|
|
void
|
|
gmac_mii_writereg(dev, phy, reg, val)
|
|
struct device *dev;
|
|
int phy, reg, val;
|
|
{
|
|
struct gmac_softc *sc = (void *)dev;
|
|
int i;
|
|
|
|
gmac_write_reg(sc, GMAC_MIFFRAMEOUTPUT,
|
|
0x50020000 | (phy << 23) | (reg << 18) | (val & 0xffff));
|
|
|
|
for (i = 1000; i >= 0; i -= 10) {
|
|
if (gmac_read_reg(sc, GMAC_MIFFRAMEOUTPUT) & 0x10000)
|
|
break;
|
|
delay(10);
|
|
}
|
|
if (i < 0)
|
|
printf("%s: gmac_mii_writereg: timeout\n", sc->sc_dev.dv_xname);
|
|
}
|
|
|
|
void
|
|
gmac_mii_statchg(dev)
|
|
struct device *dev;
|
|
{
|
|
struct gmac_softc *sc = (void *)dev;
|
|
|
|
gmac_stop_txdma(sc);
|
|
gmac_stop_rxdma(sc);
|
|
|
|
if (IFM_OPTIONS(sc->sc_mii.mii_media_active) & IFM_FDX) {
|
|
gmac_write_reg(sc, GMAC_TXMACCONFIG, 6);
|
|
gmac_write_reg(sc, GMAC_XIFCONFIG, 1);
|
|
} else {
|
|
gmac_write_reg(sc, GMAC_TXMACCONFIG, 0);
|
|
gmac_write_reg(sc, GMAC_XIFCONFIG, 5);
|
|
}
|
|
|
|
if (0) /* g-bit? */
|
|
gmac_write_reg(sc, GMAC_MACCTRLCONFIG, 3);
|
|
else
|
|
gmac_write_reg(sc, GMAC_MACCTRLCONFIG, 0);
|
|
|
|
gmac_start_txdma(sc);
|
|
gmac_start_rxdma(sc);
|
|
}
|
|
|
|
void
|
|
gmac_mii_tick(v)
|
|
void *v;
|
|
{
|
|
struct gmac_softc *sc = v;
|
|
int s;
|
|
|
|
s = splnet();
|
|
mii_tick(&sc->sc_mii);
|
|
splx(s);
|
|
|
|
callout_reset(&sc->sc_tick_ch, hz, gmac_mii_tick, sc);
|
|
}
|