996 lines
23 KiB
C
996 lines
23 KiB
C
/* $NetBSD: grf_ul.c,v 1.18 1996/06/03 18:55:16 is Exp $ */
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#define UL_DEBUG
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/*
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* Copyright (c) 1995 Ignatios Souvatzis
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by Lutz Vieweg.
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* 4. The name of the author may not be used to endorse or promote products
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* derived from this software without specific prior written permission
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#include "grful.h"
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#if NGRFUL > 0
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/* Graphics routines for the University of Lowell A2410 board,
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using the TMS34010 processor. */
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/errno.h>
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#include <sys/ioctl.h>
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#include <sys/device.h>
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#include <sys/malloc.h>
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#include <sys/syslog.h>
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#include <machine/cpu.h>
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#include <amiga/amiga/device.h>
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#include <amiga/amiga/isr.h>
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#include <amiga/dev/zbusvar.h>
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#include <amiga/dev/grfioctl.h>
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#include <amiga/dev/grfvar.h>
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#include <amiga/dev/grf_ulreg.h>
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extern u_int16_t tmscode[];
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int ul_ioctl __P((struct grf_softc *, u_long, void *, dev_t));
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int ul_getcmap __P((struct grf_softc *, struct grf_colormap *, dev_t));
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int ul_putcmap __P((struct grf_softc *, struct grf_colormap *, dev_t));
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int ul_bitblt __P((struct grf_softc *, struct grf_bitblt *, dev_t));
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int ul_blank __P((struct grf_softc *, int *, dev_t));
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static int ulisr __P((void *));
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int ulowell_alive __P((struct grfvideo_mode *));
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static void ul_load_code __P((struct grf_softc *));
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static int ul_load_mon __P((struct grf_softc *, struct grfvideo_mode *));
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static int ul_getvmode __P((struct grf_softc *, struct grfvideo_mode *));
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static int ul_setvmode __P((struct grf_softc *, unsigned));
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static __inline void ul_setfb __P((struct grf_softc *, u_long));
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/*
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* marked true early so that ulowell_cnprobe() can tell if we are alive.
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*/
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int ulowell_inited;
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/* standard-palette definition */
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u_int8_t ul_std_palette[] = {
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0,128, 0,128, 0,128, 0,128, 0,255, 0,255, 0,255, 0,255,
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0, 0,128,128, 0, 0,128,128, 0, 0,255,255, 0, 0,255,255,
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0, 0, 0, 0, 128,128,128,128, 0, 0, 0, 0, 255,255,255,255};
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u_int8_t ul_ovl_palette[] = {
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128, 0, 0, 0,
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128, 0, 0, 0,
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128, 0, 0, 0};
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struct grfvideo_mode ul_monitor_defs[] = {
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/*
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* Horizontal values are given in TMS units, that is, for the
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* A2410 board, units of 16 pixels. The ioctl multiplies (when
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* exporting) or divides (when importing) them by 16 to conform to.
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*
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* XXX This used to be in units of 8 pixel times. We
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* must also change amiga/stand/grfconfig/grfconfig.c,
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* grf_{rt,rh,cl,cv}.c and egsgrfconfig (the latter to generate the
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* horizontal timings in units of pixels instead of 8 pixels.
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* You will also have to write warnings in BIG BOLD RED BLINKING
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* LETTERS all over the docs, and still people will fry their monitors.
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*
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* btw, the _totals are always sync_start+1, to compute the frequencies
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* correctly. (see TMS34010 manual)
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*/
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/* 1024x768, 60Hz */
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{1, "1024x768", 66667000, 1024, 768, 8,
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82, 18, 86, 12, 87, 794, 26, 797, 2, 798},
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/* 864x648, 70Hz */
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{2, "864x648", 50000000, 864, 648, 8,
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61, 7, 65, 3, 66, 667, 19, 677, 4, 678},
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/* 800x600, 60Hz */
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{3, "800x600", 36000000, 800, 600, 8,
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57, 7, 61, 3, 62, 619, 19, 629, 4, 630},
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/* 640x400, 60 Hz, interlaced */
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{4, "640x400I", 14318000, 640, 400, 8,
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48, 8, 56, 3, 57, 239, 39, 262, 2, 240},
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/* 1024x768, 65Hz interlaced, s.th. is strange */
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{5, "1024x768?I", 44980000, 1024, 768, 8,
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76, 12, 79, 3, 80, 512, 24, 533, 2, 534},
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/* 1024x1024, 60Hz */
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{6, "1024x1024", 80000000, 1024,1024, 8,
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77, 13, 78, 5, 78,1051, 27,1054, 2,1055},
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/* 736x480, 60 Hz */
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{7, "736x480", 28636300, 736, 480, 8,
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54, 8, 57, 3, 58, 503, 23, 514, 3, 515},
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};
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int ulowell_mon_max = sizeof (ul_monitor_defs)/sizeof (ul_monitor_defs[0]);
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/* option settable */
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#ifndef ULOWELL_OSC1
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#define ULOWELL_OSC1 36000000
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#endif
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#ifndef ULOWELL_OSC2
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#define ULOWELL_OSC2 66667000
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#endif
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#ifndef ULOWELL_DEFAULT_MON
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#define ULOWELL_DEFAULT_MON 1
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#endif
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/* patchable */
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int ulowell_default_mon = ULOWELL_DEFAULT_MON;
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int ulowell_default_gfx = ULOWELL_DEFAULT_MON;
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/*
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* yes, this should be per board. We don't pay service to multiple boards,
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* anyway.
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*/
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u_long ulowell_clock[2] = { ULOWELL_OSC2, ULOWELL_OSC1 };
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static struct grfvideo_mode *current_mon;
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/*
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* We dont use ints at the moment, but will need this later to avoid
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* busy_waiting in gsp_write, and we use it for spurious int warnings.
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*/
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static int
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ulisr(arg)
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void *arg;
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{
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struct grf_softc *gp = arg;
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struct gspregs *ba;
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u_int16_t thebits;
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if (gp == NULL)
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return 0;
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ba = (struct gspregs *)gp->g_regkva;
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if (ba == NULL)
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return 0;
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thebits = ba->ctrl;
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if (thebits & INTOUT) {
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log(LOG_INFO, "grf4: got interrupt, ctrl=0x%4x\n", thebits);
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/* clear int */
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ba->ctrl = thebits & ~INTOUT;
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return 1;
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}
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return 0;
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}
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/*
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* used to query the ulowell board to see if its alive.
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* for the moment, a NOP.
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*/
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int
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ulowell_alive(mdp)
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struct grfvideo_mode *mdp;
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{
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return 1;
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}
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/*
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* Load the (mostly) ite support code and the default colormaps.
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*/
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static void
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ul_load_code(gp)
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struct grf_softc *gp;
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{
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struct grf_ul_softc *gup;
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struct gspregs *ba;
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struct grfinfo *gi;
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int i,j;
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#if 0
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struct grf_colormap gcm;
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#endif
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gup = (struct grf_ul_softc *)gp;
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ba = (struct gspregs *)gp->g_regkva;
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gi = &gp->g_display;
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gi->gd_regaddr = ztwopa((caddr_t)ba);
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gi->gd_regsize = sizeof(struct gspregs);
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gi->gd_fbaddr = NULL;
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gi->gd_fbsize = 0;
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gi->gd_fbwidth = 1024;
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gi->gd_fbheight = 1024;
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gi->gd_colors = 256;
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ba->ctrl = (ba->ctrl & ~INCR) | (LBL | INCW);
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ba->hstadrh = 0xC000;
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ba->hstadrl = 0x0080;
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ba->data = 0x0; /* disable screen refresh and video output */
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ba->data = 0xFFFC; /* screen refresh base address */
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ba->data = 0xFFFF; /* no display int possible */
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ba->data = 0x000C; /* CAS before RAS refresh each 64 local clks */
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ba->ctrl = (ba->ctrl & ~INCW) | LBL;
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ba->hstadrh = 0xfe80;
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ba->hstadrl = 0;
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ba->data = 4;
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ba->hstadrl = 0x20;
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ba->data = 0xFF; /* all color planes visible */
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ba->hstadrl = 0;
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ba->data = 5;
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ba->hstadrl = 0x20;
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ba->data = 0; /* no color planes blinking */
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ba->hstadrl = 0;
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ba->data = 6;
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ba->hstadrl = 0x20;
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ba->data = gup->gus_ovslct = 0x43;
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/* overlay visible, no overlay blinking, overlay color 0 transparent */
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ba->hstadrl = 0;
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ba->data = 7;
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ba->hstadrl = 0x20;
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ba->data = 0; /* voodoo */
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/* clear overlay planes */
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ba->ctrl |= INCW;
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ba->hstadrh = 0xff80;
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ba->hstadrl = 0x0000;
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for (i=0xff80000; i< 0xffa0000; ++i) {
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ba->data = 0;
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}
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/* download tms code */
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ba->ctrl = LBL | INCW | NMI | NMIM | HLT | CF;
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printf("\ndownloading TMS code");
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i=0;
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while ((j = tmscode[i++])) {
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printf(".");
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ba->hstadrh = tmscode[i++];
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ba->hstadrl = tmscode[i++];
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while (j-- > 0) {
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ba->data = tmscode[i++];
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}
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}
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/* font info was uploaded in ite_ul.c(ite_ulinit). */
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#if 1
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/* XXX load image palette with some initial values, slightly hacky */
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ba->hstadrh = 0xfe80;
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ba->hstadrl = 0x0000;
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ba->ctrl |= INCW;
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ba->data = 0;
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ba->ctrl &= ~INCW;
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for (i=0; i<16; ++i) {
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ba->data = gup->gus_imcmap[i+ 0] = ul_std_palette[i+ 0];
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ba->data = gup->gus_imcmap[i+256] = ul_std_palette[i+16];
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ba->data = gup->gus_imcmap[i+512] = ul_std_palette[i+32];
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}
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/*
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* XXX load shadow overlay palette with what the TMS code will load
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* into the real one some time after the TMS code is started below.
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* This might be considered a rude hack.
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*/
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bcopy(ul_ovl_palette, gup->gus_ovcmap, 3*4);
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/*
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* Unflush cache, unhalt cpu -> nmi starts to run. This MUST NOT BE
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* DONE before the image color map initialization above, to guarantee
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* the index register in the BT458 is not used by more than one CPU
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* at once.
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*
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* XXX For the same reason, we'll have to rething ul_putcmap(). For
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* details, look at comment there.
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*/
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ba->ctrl &= ~(HLT|CF);
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#else
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/*
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* XXX I wonder why this partially ever worked.
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*
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* This can't possibly work this way, as we are copyin()ing data in
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* ul_putcmap.
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*
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* I guess this partially worked because SFC happened to point to
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* to supervisor data space on 68030 machines coming from the old
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* boot loader.
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*
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* While this looks more correct than the hack in the other part of the
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* loop, we would have to do our own version of the loop through
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* colormap entries, set up command buffer, and call gsp_write(), or
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* factor out some code.
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*/
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/*
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* XXX This version will work for the overlay, if our queue codes
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* initial conditions are set at load time (not start time).
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* It further assumes that ul_putcmap only uses the
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* GRFIMDEV/GRFOVDEV bits of the dev parameter.
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*/
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/* unflush cache, unhalt cpu first -> nmi starts to run */
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ba->ctrl &= ~(HLT|CF);
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gcm.index = 0;
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gcm.count = 16;
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gcm.red = ul_std_palette + 0;
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gcm.green = ul_std_palette + 16;
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gcm.blue = ul_std_palette + 32;
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ul_putcmap(gp, &gcm, GRFIMDEV);
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gcm.index = 0;
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gcm.count = 4;
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gcm.red = ul_ovl_palette + 0;
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gcm.green = ul_ovl_palette + 4;
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gcm.blue = ul_ovl_palette + 8;
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ul_putcmap(gp, &gcm, GRFOVDEV);
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#endif
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}
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static int
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ul_load_mon(gp, md)
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struct grf_softc *gp;
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struct grfvideo_mode *md;
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{
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struct grf_ul_softc *gup;
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struct grfinfo *gi;
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struct gspregs *ba;
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u_int16_t buf[8];
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gup = (struct grf_ul_softc *)gp;
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gi = &gp->g_display;
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ba = (struct gspregs *)gp->g_regkva;
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gi->gd_dyn.gdi_fbx = 0;
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gi->gd_dyn.gdi_fby = 0;
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gi->gd_dyn.gdi_dwidth = md->disp_width;
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gi->gd_dyn.gdi_dheight = md->disp_height;
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gi->gd_dyn.gdi_dx = 0;
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gi->gd_dyn.gdi_dy = 0;
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ba->ctrl = (ba->ctrl & ~INCR) | (LBL | INCW); /* XXX */
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ba->hstadrh = 0xC000;
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ba->hstadrl = 0x0000;
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ba->data = md->hsync_stop;
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ba->data = md->hblank_stop;
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ba->data = md->hblank_start;
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ba->data = md->hsync_start;
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ba->data = md->vsync_stop;
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ba->data = md->vblank_stop;
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ba->data = md->vblank_start;
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ba->data = md->vsync_start;
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ba->ctrl &= ~INCW;
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ba->hstadrh = 0xFE90;
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ba->hstadrl = 0x0000;
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if (abs(md->pixel_clock - ulowell_clock[0]) >
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abs(md->pixel_clock - ulowell_clock[1])) {
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ba->data = (ba->data & 0xFC) | 2 | 1;
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md->pixel_clock = ulowell_clock[1];
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} else {
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ba->data = (ba->data & 0xFC) | 2 | 0;
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md->pixel_clock = ulowell_clock[0];
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}
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ba->ctrl |= LBL | INCW;
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ba->hstadrh = 0xC000;
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ba->hstadrl = 0x0080;
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ba->data = (md->vblank_start - md->vblank_stop == md->disp_height ?
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0xf020 : 0xb020);
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/* I guess this should be in the yet unimplemented mode select ioctl */
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/* Hm.. maybe not. We always put the console on overlay plane no 0. */
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/* Anyway, this _IS_ called in the mode select ioctl. */
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/* ite support code parameters: */
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buf[0] = GCMD_MCHG;
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buf[1] = md->disp_width; /* display width */
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buf[2] = md->disp_height; /* display height */
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buf[3] = 0; /* LSW of frame buffer origin */
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buf[4] = 0xFF80; /* MSW of frame buffer origin */
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buf[5] = gi->gd_fbwidth * 1; /* frame buffer pitch */
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buf[6] = 1; /* frame buffer depth */
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gsp_write(ba, buf, 7);
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return(1);
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}
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int ul_mode __P((struct grf_softc *, u_long, void *, u_long, int));
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void grfulattach __P((struct device *, struct device *, void *));
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int grfulprint __P((void *, char *));
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int grfulmatch __P((struct device *, void *, void *));
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struct cfattach grful_ca = {
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sizeof(struct grf_ul_softc), grfulmatch, grfulattach
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};
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struct cfdriver grful_cd = {
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NULL, "grful", DV_DULL, NULL, 0
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};
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/*
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* only used in console init
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*/
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static struct cfdata *cfdata;
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/*
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* we make sure to only init things once. this is somewhat
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* tricky regarding the console.
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*/
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int
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grfulmatch(pdp, match, auxp)
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struct device *pdp;
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void *match, *auxp;
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{
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#ifdef ULOWELLCONSOLE
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struct cfdata *cfp = match;
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static int ulconunit = -1;
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#endif
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struct zbus_args *zap;
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zap = auxp;
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/*
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* allow only one ulowell console
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*/
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if (amiga_realconfig == 0)
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#ifdef ULOWELLCONSOLE
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if (ulconunit != -1)
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#endif
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return(0);
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if (zap->manid != 1030 || zap->prodid != 0)
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return(0);
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#ifdef ULOWELLCONSOLE
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if (amiga_realconfig == 0 || ulconunit != cfp->cf_unit) {
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#endif
|
|
if ((unsigned)ulowell_default_mon > ulowell_mon_max)
|
|
ulowell_default_mon = 1;
|
|
|
|
current_mon = ul_monitor_defs + ulowell_default_mon - 1;
|
|
if (ulowell_alive(current_mon) == 0)
|
|
return(0);
|
|
#ifdef ULOWELLCONSOLE
|
|
if (amiga_realconfig == 0) {
|
|
ulconunit = cfp->cf_unit;
|
|
cfdata = cfp;
|
|
}
|
|
}
|
|
#endif
|
|
return(1);
|
|
}
|
|
|
|
/*
|
|
* attach to the grfbus (zbus)
|
|
*/
|
|
void
|
|
grfulattach(pdp, dp, auxp)
|
|
struct device *pdp, *dp;
|
|
void *auxp;
|
|
{
|
|
static struct grf_ul_softc congrf;
|
|
struct zbus_args *zap;
|
|
struct grf_softc *gp;
|
|
struct grf_ul_softc *gup;
|
|
|
|
zap = auxp;
|
|
|
|
if (dp == NULL)
|
|
gup = &congrf;
|
|
else
|
|
gup = (struct grf_ul_softc *)dp;
|
|
|
|
gp = &gup->gus_sc;
|
|
|
|
if (dp != NULL && congrf.gus_sc.g_regkva != 0) {
|
|
/*
|
|
* inited earlier, just copy (not device struct)
|
|
*/
|
|
bcopy(&congrf.gus_sc.g_display, &gp->g_display,
|
|
(char *)&gup->gus_isr - (char *)&gp->g_display);
|
|
|
|
/* ...and transfer the isr */
|
|
gup->gus_isr.isr_ipl = 2;
|
|
gup->gus_isr.isr_intr = ulisr;
|
|
gup->gus_isr.isr_arg = (void *)gp;
|
|
/*
|
|
* To make sure ints are always catched, first add new isr
|
|
* then remove old:
|
|
*/
|
|
add_isr(&gup->gus_isr);
|
|
remove_isr(&congrf.gus_isr);
|
|
} else {
|
|
gp->g_regkva = (caddr_t)zap->va;
|
|
gp->g_fbkva = NULL;
|
|
gp->g_unit = GRF_ULOWELL_UNIT;
|
|
gp->g_flags = GF_ALIVE;
|
|
gp->g_mode = ul_mode;
|
|
gp->g_conpri = grful_cnprobe();
|
|
gp->g_data = NULL;
|
|
|
|
gup->gus_isr.isr_ipl = 2;
|
|
gup->gus_isr.isr_intr = ulisr;
|
|
gup->gus_isr.isr_arg = (void *)gp;
|
|
add_isr(&gup->gus_isr);
|
|
|
|
(void)ul_load_code(gp);
|
|
(void)ul_load_mon(gp, current_mon);
|
|
grful_iteinit(gp);
|
|
}
|
|
if (dp != NULL)
|
|
printf("\n");
|
|
/*
|
|
* attach grf
|
|
*/
|
|
amiga_config_found(cfdata, &gp->g_device, gp, grfulprint);
|
|
}
|
|
|
|
int
|
|
grfulprint(auxp, pnp)
|
|
void *auxp;
|
|
char *pnp;
|
|
{
|
|
if (pnp)
|
|
printf("grf%d at %s", ((struct grf_softc *)auxp)->g_unit,
|
|
pnp);
|
|
return(UNCONF);
|
|
}
|
|
|
|
static int
|
|
ul_getvmode (gp, vm)
|
|
struct grf_softc *gp;
|
|
struct grfvideo_mode *vm;
|
|
{
|
|
struct grfvideo_mode *md;
|
|
|
|
if (vm->mode_num && vm->mode_num > ulowell_mon_max)
|
|
return EINVAL;
|
|
|
|
if (! vm->mode_num)
|
|
vm->mode_num = current_mon - ul_monitor_defs + 1;
|
|
|
|
md = ul_monitor_defs + vm->mode_num - 1;
|
|
strncpy (vm->mode_descr, md->mode_descr,
|
|
sizeof (vm->mode_descr));
|
|
|
|
/* XXX should tell TMS to measure it */
|
|
vm->pixel_clock = md->pixel_clock;
|
|
vm->disp_width = md->disp_width;
|
|
vm->disp_height = md->disp_height;
|
|
vm->depth = md->depth;
|
|
|
|
vm->hblank_start = (md->hblank_start - md->hblank_stop) * 16;
|
|
vm->hblank_stop = (md->htotal - 1) * 16;
|
|
vm->hsync_start = (md->hsync_start - md->hblank_stop) * 16;
|
|
vm->hsync_stop = (md->hsync_stop + md->htotal - md->hblank_stop) * 16;
|
|
vm->htotal = md->htotal * 16;
|
|
|
|
vm->vblank_start = md->vblank_start - md->vblank_stop;
|
|
vm->vblank_stop = md->vtotal - 1;
|
|
vm->vsync_start = md->vsync_start - md->vblank_stop;
|
|
vm->vsync_stop = md->vsync_stop + md->vtotal - md->vblank_stop;
|
|
vm->vtotal = md->vtotal;
|
|
|
|
return 0;
|
|
}
|
|
|
|
|
|
static int
|
|
ul_setvmode (gp, mode)
|
|
struct grf_softc *gp;
|
|
unsigned mode;
|
|
{
|
|
struct grf_ul_softc *gup;
|
|
struct gspregs *ba;
|
|
int error;
|
|
|
|
if (!mode || mode > ulowell_mon_max)
|
|
return EINVAL;
|
|
|
|
ba = (struct gspregs *)gp->g_regkva;
|
|
gup = (struct grf_ul_softc *)gp;
|
|
current_mon = ul_monitor_defs + mode - 1;
|
|
|
|
error = ul_load_mon (gp, current_mon) ? 0 : EINVAL;
|
|
|
|
return error;
|
|
}
|
|
|
|
/*
|
|
* Set the frame buffer or overlay planes on or off.
|
|
* Always succeeds.
|
|
*/
|
|
|
|
static __inline void
|
|
ul_setfb(gp, cmd)
|
|
struct grf_softc *gp;
|
|
u_long cmd;
|
|
{
|
|
struct grf_ul_softc *gup;
|
|
struct gspregs *ba;
|
|
|
|
gup = (struct grf_ul_softc *)gp;
|
|
|
|
ba = (struct gspregs *)gp->g_regkva;
|
|
ba->ctrl = LBL;
|
|
ba->hstadrh = 0xfe80;
|
|
ba->hstadrl = 0x0000;
|
|
ba->data = 6;
|
|
ba->hstadrl = 0x0020;
|
|
|
|
switch (cmd) {
|
|
case GM_GRFON:
|
|
gup->gus_ovslct |= 0x40;
|
|
break;
|
|
case GM_GRFOFF:
|
|
gup->gus_ovslct &= ~0x40;
|
|
break;
|
|
case GM_GRFOVON:
|
|
gup->gus_ovslct |= 3;
|
|
break;
|
|
case GM_GRFOVOFF:
|
|
gup->gus_ovslct &= ~3;
|
|
break;
|
|
}
|
|
ba->data = gup->gus_ovslct;
|
|
}
|
|
|
|
/*
|
|
* Change the mode of the display.
|
|
* Return a UNIX error number or 0 for success.
|
|
*/
|
|
int
|
|
ul_mode(gp, cmd, arg, a2, a3)
|
|
struct grf_softc *gp;
|
|
u_long cmd;
|
|
void *arg;
|
|
u_long a2;
|
|
int a3;
|
|
{
|
|
int i;
|
|
struct grfdyninfo *gd;
|
|
|
|
switch (cmd) {
|
|
case GM_GRFON:
|
|
case GM_GRFOFF:
|
|
case GM_GRFOVON:
|
|
case GM_GRFOVOFF:
|
|
ul_setfb (gp, cmd);
|
|
return 0;
|
|
|
|
case GM_GRFCONFIG:
|
|
gd = (struct grfdyninfo *)arg;
|
|
for (i=0; i<ulowell_mon_max; ++i) {
|
|
if (ul_monitor_defs[i].disp_width == gd->gdi_dwidth &&
|
|
ul_monitor_defs[i].disp_height == gd->gdi_dheight)
|
|
return ul_setvmode(gp, i+1);
|
|
}
|
|
return EINVAL;
|
|
|
|
case GM_GRFGETVMODE:
|
|
return ul_getvmode (gp, (struct grfvideo_mode *) arg);
|
|
|
|
case GM_GRFSETVMODE:
|
|
return ul_setvmode (gp, *(unsigned *) arg);
|
|
|
|
case GM_GRFGETNUMVM:
|
|
*(int *)arg = ulowell_mon_max;
|
|
return 0;
|
|
|
|
case GM_GRFIOCTL:
|
|
return ul_ioctl (gp, a2, arg, (dev_t)a3);
|
|
|
|
default:
|
|
break;
|
|
}
|
|
|
|
return EINVAL;
|
|
}
|
|
|
|
int
|
|
ul_ioctl (gp, cmd, data, dev)
|
|
register struct grf_softc *gp;
|
|
u_long cmd;
|
|
void *data;
|
|
dev_t dev;
|
|
{
|
|
switch (cmd) {
|
|
#if 0
|
|
/*
|
|
* XXX we have no hardware sprites, but might implement them
|
|
* later in TMS code.
|
|
*/
|
|
|
|
case GRFIOCGSPRITEPOS:
|
|
return ul_getspritepos (gp, (struct grf_position *) data);
|
|
|
|
case GRFIOCSSPRITEPOS:
|
|
return ul_setspritepos (gp, (struct grf_position *) data);
|
|
|
|
case GRFIOCSSPRITEINF:
|
|
return ul_setspriteinfo (gp, (struct grf_spriteinfo *) data);
|
|
|
|
case GRFIOCGSPRITEINF:
|
|
return ul_getspriteinfo (gp, (struct grf_spriteinfo *) data);
|
|
|
|
case GRFIOCGSPRITEMAX:
|
|
return ul_getspritemax (gp, (struct grf_position *) data);
|
|
|
|
#endif
|
|
|
|
case GRFIOCGETCMAP:
|
|
return ul_getcmap (gp, (struct grf_colormap *) data, dev);
|
|
|
|
case GRFIOCPUTCMAP:
|
|
return ul_putcmap (gp, (struct grf_colormap *) data, dev);
|
|
|
|
case GRFIOCBITBLT:
|
|
return ul_bitblt (gp, (struct grf_bitblt *) data, dev);
|
|
|
|
case GRFIOCBLANK:
|
|
return ul_blank (gp, (int *) data, dev);
|
|
}
|
|
|
|
return EINVAL;
|
|
}
|
|
|
|
int
|
|
ul_getcmap (gp, cmap, dev)
|
|
struct grf_softc *gp;
|
|
struct grf_colormap *cmap;
|
|
dev_t dev;
|
|
{
|
|
struct grf_ul_softc *gup;
|
|
u_int8_t *mymap;
|
|
int mxidx, error;
|
|
|
|
gup = (struct grf_ul_softc *)gp;
|
|
|
|
if (minor(dev) & GRFIMDEV) {
|
|
mxidx = 256;
|
|
mymap = gup->gus_imcmap;
|
|
} else {
|
|
mxidx = 4;
|
|
mymap = gup->gus_ovcmap;
|
|
}
|
|
|
|
if (cmap->count == 0 || cmap->index >= mxidx)
|
|
return 0;
|
|
|
|
if (cmap->index + cmap->count > mxidx)
|
|
cmap->count = mxidx - cmap->index;
|
|
|
|
/* just copyout from the shadow color map */
|
|
|
|
if ((error = copyout(mymap + cmap->index, cmap->red, cmap->count))
|
|
|
|
|| (error = copyout(mymap + mxidx + cmap->index, cmap->green,
|
|
cmap->count))
|
|
|
|
|| (error = copyout(mymap + mxidx * 2 + cmap->index, cmap->blue,
|
|
cmap->count)))
|
|
|
|
return(error);
|
|
|
|
return(0);
|
|
}
|
|
|
|
int
|
|
ul_putcmap (gp, cmap, dev)
|
|
struct grf_softc *gp;
|
|
struct grf_colormap *cmap;
|
|
dev_t dev;
|
|
{
|
|
struct grf_ul_softc *gup;
|
|
struct gspregs *ba;
|
|
u_int16_t cmd[8];
|
|
int x, mxidx, error;
|
|
u_int8_t *mymap;
|
|
|
|
gup = (struct grf_ul_softc *)gp;
|
|
|
|
if (minor(dev) & GRFIMDEV) {
|
|
mxidx = 256;
|
|
mymap = gup->gus_imcmap;
|
|
} else {
|
|
mxidx = 4;
|
|
mymap = gup->gus_ovcmap;
|
|
}
|
|
|
|
if (cmap->count == 0 || cmap->index >= mxidx)
|
|
return 0;
|
|
|
|
if (cmap->index + cmap->count > mxidx)
|
|
cmap->count = mxidx - cmap->index;
|
|
|
|
/* first copyin to our shadow color map */
|
|
|
|
if ((error = copyin(cmap->red, mymap + cmap->index, cmap->count))
|
|
|
|
|| (error = copyin(cmap->green, mymap + cmap->index + mxidx,
|
|
cmap->count))
|
|
|
|
|| (error = copyin(cmap->blue, mymap + cmap->index + mxidx*2,
|
|
cmap->count)))
|
|
|
|
return error;
|
|
|
|
|
|
/* then write from there to the hardware */
|
|
ba = (struct gspregs *)gp->g_regkva;
|
|
/*
|
|
* XXX This is a bad thing to do.
|
|
* We should always use the gsp call, or have a means to arbitrate
|
|
* the usage of the BT458 index register. Else there might be a
|
|
* race condition (when writing both colormaps at nearly the same
|
|
* time), where one CPU changes the index register when the other
|
|
* one has not finished using it.
|
|
*/
|
|
if (mxidx > 4) {
|
|
/* image color map: we can write, with a hack, directly */
|
|
ba->ctrl = LBL;
|
|
ba->hstadrh = 0xfe80;
|
|
ba->hstadrl = 0x0000;
|
|
ba->ctrl |= INCW;
|
|
ba->data = cmap->index;
|
|
ba->ctrl &= ~INCW;
|
|
|
|
for (x=cmap->index; x < cmap->index + cmap->count; ++x) {
|
|
ba->data = (u_int16_t) mymap[x];
|
|
ba->data = (u_int16_t) mymap[x + mxidx];
|
|
ba->data = (u_int16_t) mymap[x + mxidx * 2];
|
|
}
|
|
} else {
|
|
|
|
/* overlay planes color map: have to call tms to do it */
|
|
cmd[0] = GCMD_CMAP;
|
|
cmd[1] = 1;
|
|
for (x=cmap->index; x < cmap->index + cmap->count; ++x) {
|
|
cmd[2] = x;
|
|
cmd[3] = mymap[x];
|
|
cmd[4] = mymap[x + mxidx];
|
|
cmd[5] = mymap[x + mxidx * 2];
|
|
gsp_write(ba, cmd, 6);
|
|
}
|
|
}
|
|
return 0;
|
|
}
|
|
|
|
int
|
|
ul_blank(gp, onoff, dev)
|
|
struct grf_softc *gp;
|
|
int *onoff;
|
|
dev_t dev;
|
|
{
|
|
struct gspregs *gsp;
|
|
|
|
gsp = (struct gspregs *)gp->g_regkva;
|
|
gsp->ctrl = (gsp->ctrl & ~(INCR | INCW)) | LBL;
|
|
gsp->hstadrh = 0xC000;
|
|
gsp->hstadrl = 0x0080;
|
|
if (*onoff > 0)
|
|
gsp->data |= 0x9000;
|
|
else
|
|
gsp->data &= ~0x9000;
|
|
|
|
return 0;
|
|
}
|
|
/*
|
|
* !!! THIS AREA UNDER CONSTRUCTION !!!
|
|
*/
|
|
int ul_BltOpMap[16] = {
|
|
3, 1, 2, 0, 11, 9, 10, 8,
|
|
7, 5, 6, 4, 15, 13, 14, 12
|
|
};
|
|
|
|
int
|
|
ul_bitblt (gp, bb, dev)
|
|
struct grf_softc *gp;
|
|
struct grf_bitblt *bb;
|
|
dev_t dev;
|
|
{
|
|
/* XXX not yet implemented, but pretty trivial */
|
|
return EINVAL;
|
|
}
|
|
|
|
void
|
|
gsp_write(gsp, ptr, size)
|
|
struct gspregs *gsp;
|
|
u_short *ptr;
|
|
size_t size;
|
|
{
|
|
u_short put, new_put, next, oc;
|
|
u_long put_hi, oa;
|
|
size_t n;
|
|
|
|
if (size == 0 || size > 8)
|
|
return;
|
|
|
|
n = size;
|
|
|
|
oc = gsp->ctrl;
|
|
oa = GSPGETHADRS(gsp);
|
|
|
|
gsp->ctrl = (oc & ~INCR) | LBL | INCW;
|
|
GSPSETHADRS(gsp, GSP_MODE_ADRS);
|
|
gsp->data &= ~GMODE_FLUSH;
|
|
|
|
GSPSETHADRS(gsp, PUT_HI_PTR_ADRS);
|
|
put_hi = gsp->data << 16;
|
|
|
|
GSPSETHADRS(gsp, PUT_PTR_ADRS);
|
|
put = gsp->data;
|
|
new_put = put + (8<<4);
|
|
|
|
GSPSETHADRS(gsp, GET_PTR_ADRS);
|
|
next = gsp->data;
|
|
|
|
while (next == new_put) {
|
|
/*
|
|
* we should use an intr. here. unfortunately, we already
|
|
* are called from an interupt and can't use tsleep.
|
|
* so we do busy waiting, at least for the moment.
|
|
*/
|
|
|
|
GSPSETHADRS(gsp,GET_PTR_ADRS);
|
|
next = gsp->data;
|
|
}
|
|
|
|
GSPSETHADRS(gsp,put|put_hi);
|
|
gsp->data = *ptr++ | 8<<4;
|
|
while ( --n > 0) {
|
|
gsp->data = *ptr++;
|
|
}
|
|
|
|
GSPSETHADRS(gsp,PUT_PTR_ADRS);
|
|
gsp->data = new_put;
|
|
GSPSETHADRS(gsp,oa);
|
|
gsp->ctrl = oc;
|
|
|
|
return;
|
|
}
|
|
|
|
#endif /* NGRF */
|