220 lines
6.1 KiB
C
220 lines
6.1 KiB
C
/* $NetBSD: tegra_sdhc.c,v 1.12 2015/12/13 17:39:19 jmcneill Exp $ */
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/*-
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* Copyright (c) 2015 Jared D. McNeill <jmcneill@invisible.ca>
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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#include "locators.h"
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: tegra_sdhc.c,v 1.12 2015/12/13 17:39:19 jmcneill Exp $");
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#include <sys/param.h>
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#include <sys/bus.h>
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#include <sys/device.h>
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#include <sys/intr.h>
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#include <sys/systm.h>
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#include <sys/kernel.h>
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#include <dev/sdmmc/sdhcreg.h>
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#include <dev/sdmmc/sdhcvar.h>
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#include <dev/sdmmc/sdmmcvar.h>
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#include <arm/nvidia/tegra_reg.h>
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#include <arm/nvidia/tegra_var.h>
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#include <dev/fdt/fdtvar.h>
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/* XXX */
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static int
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tegra_sdhc_addr2port(bus_addr_t addr)
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{
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switch (addr) {
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case TEGRA_APB_BASE + TEGRA_SDMMC1_OFFSET:
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return 0;
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case TEGRA_APB_BASE + TEGRA_SDMMC2_OFFSET:
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return 1;
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case TEGRA_APB_BASE + TEGRA_SDMMC3_OFFSET:
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return 2;
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case TEGRA_APB_BASE + TEGRA_SDMMC4_OFFSET:
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return 3;
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default:
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return -1;
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}
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}
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static int tegra_sdhc_match(device_t, cfdata_t, void *);
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static void tegra_sdhc_attach(device_t, device_t, void *);
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static int tegra_sdhc_card_detect(struct sdhc_softc *);
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static int tegra_sdhc_write_protect(struct sdhc_softc *);
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struct tegra_sdhc_softc {
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struct sdhc_softc sc;
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u_int sc_port;
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bus_space_tag_t sc_bst;
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bus_space_handle_t sc_bsh;
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bus_size_t sc_bsz;
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struct sdhc_host *sc_host;
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void *sc_ih;
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struct fdtbus_gpio_pin *sc_pin_cd;
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struct fdtbus_gpio_pin *sc_pin_power;
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struct fdtbus_gpio_pin *sc_pin_wp;
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};
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CFATTACH_DECL_NEW(tegra_sdhc, sizeof(struct tegra_sdhc_softc),
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tegra_sdhc_match, tegra_sdhc_attach, NULL, NULL);
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static int
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tegra_sdhc_match(device_t parent, cfdata_t cf, void *aux)
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{
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const char * const compatible[] = { "nvidia,tegra124-sdhci", NULL };
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struct fdt_attach_args * const faa = aux;
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return of_match_compatible(faa->faa_phandle, compatible);
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}
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static void
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tegra_sdhc_attach(device_t parent, device_t self, void *aux)
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{
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struct tegra_sdhc_softc * const sc = device_private(self);
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struct fdt_attach_args * const faa = aux;
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char intrstr[128];
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bus_addr_t addr;
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bus_size_t size;
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u_int bus_width;
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int error;
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if (fdtbus_get_reg(faa->faa_phandle, 0, &addr, &size) != 0) {
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aprint_error(": couldn't get registers\n");
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return;
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}
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if (OF_getprop(faa->faa_phandle, "bus-width", &bus_width,
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sizeof(bus_width)) == sizeof(bus_width)) {
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bus_width = be32toh(bus_width);
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} else {
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bus_width = 4;
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}
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sc->sc.sc_dev = self;
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sc->sc.sc_dmat = faa->faa_dmat;
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sc->sc.sc_flags = SDHC_FLAG_32BIT_ACCESS |
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SDHC_FLAG_NO_PWR0 |
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SDHC_FLAG_NO_CLKBASE |
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SDHC_FLAG_NO_TIMEOUT |
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SDHC_FLAG_SINGLE_POWER_WRITE |
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SDHC_FLAG_USE_DMA |
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SDHC_FLAG_USE_ADMA2;
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if (bus_width == 8) {
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sc->sc.sc_flags |= SDHC_FLAG_8BIT_MODE;
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}
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sc->sc.sc_host = &sc->sc_host;
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sc->sc_bst = faa->faa_bst;
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error = bus_space_map(sc->sc_bst, addr, size, 0, &sc->sc_bsh);
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if (error) {
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aprint_error(": couldn't map %#llx: %d", (uint64_t)addr, error);
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return;
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}
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sc->sc_bsz = size;
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sc->sc_port = tegra_sdhc_addr2port(addr);
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sc->sc_pin_power = fdtbus_gpio_acquire(faa->faa_phandle,
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"power-gpios", GPIO_PIN_OUTPUT);
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if (sc->sc_pin_power)
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fdtbus_gpio_write(sc->sc_pin_power, 1);
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sc->sc_pin_cd = fdtbus_gpio_acquire(faa->faa_phandle,
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"cd-gpios", GPIO_PIN_INPUT);
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sc->sc_pin_wp = fdtbus_gpio_acquire(faa->faa_phandle,
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"wp-gpios", GPIO_PIN_INPUT);
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if (sc->sc_pin_cd) {
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sc->sc.sc_vendor_card_detect = tegra_sdhc_card_detect;
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sc->sc.sc_flags |= SDHC_FLAG_POLL_CARD_DET;
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}
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if (sc->sc_pin_wp) {
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sc->sc.sc_vendor_write_protect = tegra_sdhc_write_protect;
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}
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tegra_car_periph_sdmmc_set_rate(sc->sc_port, 204000000);
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sc->sc.sc_clkbase = tegra_car_periph_sdmmc_rate(sc->sc_port) / 1000;
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aprint_naive("\n");
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aprint_normal(": SDMMC%d\n", sc->sc_port + 1);
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if (sc->sc.sc_clkbase == 0) {
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aprint_error_dev(self, "couldn't determine frequency\n");
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return;
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}
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if (!fdtbus_intr_str(faa->faa_phandle, 0, intrstr, sizeof(intrstr))) {
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aprint_error_dev(self, "failed to decode interrupt\n");
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return;
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}
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sc->sc_ih = fdtbus_intr_establish(faa->faa_phandle, 0, IPL_SDMMC, 0,
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sdhc_intr, &sc->sc);
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if (sc->sc_ih == NULL) {
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aprint_error_dev(self, "couldn't establish interrupt on %s\n",
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intrstr);
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return;
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}
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aprint_normal_dev(self, "interrupting on %s\n", intrstr);
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error = sdhc_host_found(&sc->sc, sc->sc_bst, sc->sc_bsh, sc->sc_bsz);
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if (error) {
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aprint_error_dev(self, "couldn't initialize host, error = %d\n",
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error);
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fdtbus_intr_disestablish(faa->faa_phandle, sc->sc_ih);
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sc->sc_ih = NULL;
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return;
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}
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}
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static int
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tegra_sdhc_card_detect(struct sdhc_softc *ssc)
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{
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struct tegra_sdhc_softc *sc = device_private(ssc->sc_dev);
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KASSERT(sc->sc_pin_cd != NULL);
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return !fdtbus_gpio_read(sc->sc_pin_cd);
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}
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static int
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tegra_sdhc_write_protect(struct sdhc_softc *ssc)
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{
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struct tegra_sdhc_softc *sc = device_private(ssc->sc_dev);
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KASSERT(sc->sc_pin_wp != NULL);
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return fdtbus_gpio_read(sc->sc_pin_wp);
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}
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