408 lines
9.8 KiB
C
408 lines
9.8 KiB
C
/* $NetBSD: ar5312.c,v 1.4 2007/02/28 04:21:53 thorpej Exp $ */
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/*
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* Copyright (c) 2006 Urbana-Champaign Independent Media Center.
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* Copyright (c) 2006 Garrett D'Amore.
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* All rights reserved.
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*
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* Portions of this code were written by Garrett D'Amore for the
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* Champaign-Urbana Community Wireless Network Project.
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*
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* Redistribution and use in source and binary forms, with or
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* without modification, are permitted provided that the following
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* conditions are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above
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* copyright notice, this list of conditions and the following
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* disclaimer in the documentation and/or other materials provided
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* with the distribution.
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* 3. All advertising materials mentioning features or use of this
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* software must display the following acknowledgements:
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* This product includes software developed by the Urbana-Champaign
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* Independent Media Center.
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* This product includes software developed by Garrett D'Amore.
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* 4. Urbana-Champaign Independent Media Center's name and Garrett
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* D'Amore's name may not be used to endorse or promote products
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* derived from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE URBANA-CHAMPAIGN INDEPENDENT
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* MEDIA CENTER AND GARRETT D'AMORE ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
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* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE URBANA-CHAMPAIGN INDEPENDENT
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* MEDIA CENTER OR GARRETT D'AMORE BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
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* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
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* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
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* ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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/*
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* This file includes a bunch of implementation specific bits for
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* AR5312, which differents these from other members of the AR5315
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* family.
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*/
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#include "opt_ddb.h"
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#include "opt_kgdb.h"
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#include "opt_memsize.h"
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/kernel.h>
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#include <sys/buf.h>
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#include <mips/cache.h>
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#include <mips/locore.h>
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#include <mips/cpuregs.h>
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#include <sys/socket.h> /* these three just to get ETHER_ADDR_LEN(!) */
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#include <net/if.h>
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#include <net/if_ether.h>
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#include <mips/atheros/include/ar5312reg.h>
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#include <mips/atheros/include/ar531xvar.h>
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#include <mips/atheros/include/arbusvar.h>
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#include "com.h"
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uint32_t
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ar531x_memsize(void)
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{
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uint32_t memsize;
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uint32_t memcfg, bank0, bank1;
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/*
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* Determine the memory size as established by system
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* firmware.
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*
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* NB: we allow compile time override
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*/
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#if defined(MEMSIZE)
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memsize = MEMSIZE;
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#else
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memcfg = GETSDRAMREG(AR5312_SDRAMCTL_MEM_CFG1);
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bank0 = (memcfg & AR5312_MEM_CFG1_BANK0_MASK) >>
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AR5312_MEM_CFG1_BANK0_SHIFT;
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bank1 = (memcfg & AR5312_MEM_CFG1_BANK1_MASK) >>
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AR5312_MEM_CFG1_BANK1_SHIFT;
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memsize = (bank0 ? (1 << (bank0 + 1)) : 0) +
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(bank1 ? (1 << (bank1 + 1)) : 0);
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memsize <<= 20;
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#endif
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return (memsize);
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}
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void
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ar531x_wdog(uint32_t period)
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{
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if (period == 0) {
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PUTSYSREG(AR5312_SYSREG_WDOG_CTL, AR5312_WDOG_CTL_IGNORE);
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PUTSYSREG(AR5312_SYSREG_WDOG_TIMER, 0);
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} else {
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PUTSYSREG(AR5312_SYSREG_WDOG_TIMER, period);
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PUTSYSREG(AR5312_SYSREG_WDOG_CTL, AR5312_WDOG_CTL_RESET);
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}
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}
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const char *
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ar531x_cpuname(void)
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{
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uint32_t revision;
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revision = GETSYSREG(AR5312_SYSREG_REVISION);
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switch (AR5312_REVISION_MAJOR(revision)) {
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case AR5312_REVISION_MAJ_AR5311:
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return ("Atheros AR5311");
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case AR5312_REVISION_MAJ_AR5312:
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return ("Atheros AR5312");
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case AR5312_REVISION_MAJ_AR2313:
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return ("Atheros AR2313");
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case AR5312_REVISION_MAJ_AR5315:
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return ("Atheros AR5315");
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default:
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return ("Atheros AR531X");
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}
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}
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void
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ar531x_businit(void)
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{
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/*
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* Clear previous AHB errors
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*/
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GETSYSREG(AR5312_SYSREG_AHBPERR);
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GETSYSREG(AR5312_SYSREG_AHBDMAE);
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}
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uint32_t
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ar531x_cpu_freq(void)
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{
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static uint32_t cpufreq;
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uint32_t wisoc = GETSYSREG(AR5312_SYSREG_REVISION);
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uint32_t predivmask;
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uint32_t predivshift;
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uint32_t multmask;
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uint32_t multshift;
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uint32_t doublermask;
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uint32_t divisor;
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uint32_t multiplier;
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uint32_t clockctl;
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const int predivide_table[4] = { 1, 2, 4, 5 };
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/* XXX: in theory we might be able to get clock from bootrom */
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/*
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* This logic looks at the clock control register and
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* determines the actual CPU frequency. These parts lack any
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* kind of real-time clock on them, but the cpu clocks should
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* be very accurate -- WiFi requires usec resolution timers.
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*/
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if (cpufreq) {
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return cpufreq;
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}
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if (AR5312_REVISION_MAJOR(wisoc) == AR5312_REVISION_MAJ_AR2313) {
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predivmask = AR2313_CLOCKCTL_PREDIVIDE_MASK;
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predivshift = AR2313_CLOCKCTL_PREDIVIDE_SHIFT;
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multmask = AR2313_CLOCKCTL_MULTIPLIER_MASK;
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multshift = AR2313_CLOCKCTL_MULTIPLIER_SHIFT;
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doublermask = AR2313_CLOCKCTL_DOUBLER_MASK;
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} else {
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predivmask = AR5312_CLOCKCTL_PREDIVIDE_MASK;
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predivshift = AR5312_CLOCKCTL_PREDIVIDE_SHIFT;
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multmask = AR5312_CLOCKCTL_MULTIPLIER_MASK;
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multshift = AR5312_CLOCKCTL_MULTIPLIER_SHIFT;
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doublermask = AR5312_CLOCKCTL_DOUBLER_MASK;
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}
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/*
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* Note that the source clock involved here is a 40MHz.
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*/
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clockctl = GETSYSREG(AR5312_SYSREG_CLOCKCTL);
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divisor = predivide_table[(clockctl & predivmask) >> predivshift];
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multiplier = (clockctl & multmask) >> multshift;
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if (clockctl & doublermask)
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multiplier <<= 1;
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cpufreq = (40000000 / divisor) * multiplier;
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return (cpufreq);
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}
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uint32_t
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ar531x_bus_freq(void)
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{
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return (ar531x_cpu_freq() / 4);
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}
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static void
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addprop_data(struct device *dev, const char *name, const uint8_t *data,
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int len)
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{
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prop_data_t pd;
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pd = prop_data_create_data(data, len);
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KASSERT(pd != NULL);
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if (prop_dictionary_set(device_properties(dev), name, pd) == false) {
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printf("WARNING: unable to set %s property for %s\n",
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name, device_xname(dev));
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}
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prop_object_release(pd);
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}
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static void
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addprop_integer(struct device *dev, const char *name, uint32_t val)
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{
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prop_number_t pn;
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pn = prop_number_create_integer(val);
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KASSERT(pn != NULL);
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if (prop_dictionary_set(device_properties(dev), name, pn) == false) {
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printf("WARNING: unable to set %s property for %s",
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name, device_xname(dev));
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}
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prop_object_release(pn);
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}
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void
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ar531x_device_register(struct device *dev, void *aux)
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{
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struct arbus_attach_args *aa = aux;
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const struct ar531x_boarddata *info;
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info = ar531x_board_info();
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if (info == NULL) {
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/* nothing known about this board! */
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return;
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}
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/*
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* We don't ever know the boot device. But that's because the
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* firmware only loads from the network.
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*/
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/* Fetch the MAC addresses. */
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if (device_is_a(dev, "ae")) {
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const uint8_t *enet;
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if (aa->aa_addr == AR5312_ENET0_BASE)
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enet = info->enet0Mac;
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else if (aa->aa_addr == AR5312_ENET1_BASE)
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enet = info->enet1Mac;
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else
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return;
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addprop_data(dev, "mac-addr", enet, ETHER_ADDR_LEN);
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}
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if (device_is_a(dev, "ath")) {
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const uint8_t *enet;
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if (aa->aa_addr == AR5312_WLAN0_BASE)
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enet = info->wlan0Mac;
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else if (aa->aa_addr == AR5312_WLAN1_BASE)
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enet = info->wlan1Mac;
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else
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return;
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addprop_data(dev, "mac-addr", enet, ETHER_ADDR_LEN);
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addprop_integer(dev, "wmac-rev",
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AR5312_REVISION_WMAC(GETSYSREG(AR5312_SYSREG_REVISION)));
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}
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if (device_is_a(dev, "com")) {
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addprop_integer(dev, "frequency", ar531x_cpu_freq() / 4);
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}
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if (device_is_a(dev, "argpio")) {
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if (info->config & BD_RSTFACTORY) {
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addprop_integer(dev, "reset-pin",
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info->resetConfigGpio);
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}
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if (info->config & BD_SYSLED) {
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addprop_integer(dev, "sysled-pin",
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info->sysLedGpio);
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}
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}
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}
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int
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ar531x_enable_device(const struct ar531x_device *dev)
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{
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const struct ar531x_boarddata *info;
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info = ar531x_board_info();
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if (dev->mask && ((dev->mask & info->config) == 0)) {
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return -1;
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}
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if (dev->reset) {
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/* put device into reset */
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PUTSYSREG(AR5312_SYSREG_RESETCTL,
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GETSYSREG(AR5312_SYSREG_RESETCTL) | dev->reset);
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delay(15000); /* XXX: tsleep? */
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/* take it out of reset */
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PUTSYSREG(AR5312_SYSREG_RESETCTL,
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GETSYSREG(AR5312_SYSREG_RESETCTL) & ~dev->reset);
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delay(25);
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}
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if (dev->enable) {
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PUTSYSREG(AR5312_SYSREG_ENABLE,
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GETSYSREG(AR5312_SYSREG_ENABLE) | dev->enable);
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}
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return 0;
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}
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const struct ar531x_device *
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ar531x_get_devices(void)
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{
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static const struct ar531x_device devices[] = {
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{
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"ae",
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AR5312_ENET0_BASE, 0x100000,
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AR5312_IRQ_ENET0, -1,
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AR5312_BOARD_CONFIG_ENET0,
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AR5312_RESET_ENET0 | AR5312_RESET_PHY0,
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AR5312_ENABLE_ENET0
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},
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{
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"ae",
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AR5312_ENET1_BASE, 0x100000,
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AR5312_IRQ_ENET1, -1,
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AR5312_BOARD_CONFIG_ENET1,
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AR5312_RESET_ENET1 | AR5312_RESET_PHY1,
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AR5312_ENABLE_ENET1
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},
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{
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"com",
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AR5312_UART0_BASE, 0x1000,
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AR5312_IRQ_MISC, AR5312_MISC_IRQ_UART0,
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AR5312_BOARD_CONFIG_UART0,
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0,
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0,
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},
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{
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"com",
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AR5312_UART1_BASE, 0x1000,
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-1, -1,
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AR5312_BOARD_CONFIG_UART1,
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0,
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0,
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},
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{
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"ath",
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AR5312_WLAN0_BASE, 0x100000,
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AR5312_IRQ_WLAN0, -1,
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AR5312_BOARD_CONFIG_WLAN0,
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AR5312_RESET_WLAN0 |
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AR5312_RESET_WARM_WLAN0_MAC |
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AR5312_RESET_WARM_WLAN0_BB,
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AR5312_ENABLE_WLAN0
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},
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{
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"ath",
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AR5312_WLAN1_BASE, 0x100000,
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AR5312_IRQ_WLAN1, -1,
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AR5312_BOARD_CONFIG_WLAN1,
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AR5312_RESET_WLAN1 |
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AR5312_RESET_WARM_WLAN1_MAC |
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AR5312_RESET_WARM_WLAN1_BB,
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AR5312_ENABLE_WLAN1
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},
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{
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"athflash",
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AR5312_FLASH_BASE, 0,
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-1, -1,
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0,
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0,
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0,
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},
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{
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"argpio", 0x1000,
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AR5312_GPIO_BASE,
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AR5312_IRQ_MISC, AR5312_MISC_IRQ_GPIO,
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0,
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0,
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0
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},
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{ NULL }
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};
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return devices;
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}
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