NetBSD/sys/arch/m68k/fpsp/DYADIC.R3V6
1994-10-26 07:48:18 +00:00

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* $NetBSD: DYADIC.R3V6,v 1.2 1994/10/26 07:48:31 cgd Exp $
* MOTOROLA MICROPROCESSOR & MEMORY TECHNOLOGY GROUP
* M68000 Hi-Performance Microprocessor Division
* M68040 Software Package
*
* M68040 Software Package Copyright (c) 1993, 1994 Motorola Inc.
* All rights reserved.
*
* THE SOFTWARE is provided on an "AS IS" basis and without warranty.
* To the maximum extent permitted by applicable law,
* MOTOROLA DISCLAIMS ALL WARRANTIES WHETHER EXPRESS OR IMPLIED,
* INCLUDING IMPLIED WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A
* PARTICULAR PURPOSE and any warranty against infringement with
* regard to the SOFTWARE (INCLUDING ANY MODIFIED VERSIONS THEREOF)
* and any accompanying written materials.
*
* To the maximum extent permitted by applicable law,
* IN NO EVENT SHALL MOTOROLA BE LIABLE FOR ANY DAMAGES WHATSOEVER
* (INCLUDING WITHOUT LIMITATION, DAMAGES FOR LOSS OF BUSINESS
* PROFITS, BUSINESS INTERRUPTION, LOSS OF BUSINESS INFORMATION, OR
* OTHER PECUNIARY LOSS) ARISING OF THE USE OR INABILITY TO USE THE
* SOFTWARE. Motorola assumes no responsibility for the maintenance
* and support of the SOFTWARE.
*
* You are hereby granted a copyright license to use, modify, and
* distribute the SOFTWARE so long as this entire notice is retained
* without alteration in any modified and/or redistributed versions,
* and that such modified versions are clearly identified as such.
* No licenses are granted by implication, estoppel or otherwise
* under any patents or trademarks of Motorola, Inc.
*
* DYADIC.R3V6 1.2 4/30/91
*
* DYADIC.R3V6 --- DYADIC template for MCD R3V6 native C compiler
*
* The MCD compiler is old. It returns float and double values
* as a double stored in d0/d1. There is no support for single or extended
* precision operations. It's not clear whether the float registers
* should be preserved, so for speed they're not.
*
xref _OPa_
xref tag
xdef _OPd_
_OPd_:
link a6,#-LOCAL_SIZE
fmovem.l fpsr/fpcr,USER_FPSR(a6) ; user's rounding mode/precision
fmove.l #0,fpcr ; force rounding mode/prec to extended,rn
*
* copy and convert arguments to ETEMP, FPTEMP.
*
fmove.d 8(a6),fp0
fmove.x fp0,FPTEMP(a6)
lea FPTEMP(a6),a0
bsr tag
move.b d0,DTAG(a6)
fmove.d 16(a6),fp0
fmove.x fp0,ETEMP(a6)
lea ETEMP(a6),a0
bsr tag
move.b d0,STAG(a6)
bsr _OPa_
fmove.d fp0,USER_D0(a6) ; result goes into d0/d1 pair
movem.l USER_D0(a6),d0-d1
unlk a6
rts