160 lines
4.3 KiB
C
160 lines
4.3 KiB
C
/* $NetBSD: cacheops_60.h,v 1.13 2008/04/28 20:23:26 martin Exp $ */
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/*-
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* Copyright (c) 1997 The NetBSD Foundation, Inc.
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* All rights reserved.
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*
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* This code is derived from software contributed to The NetBSD Foundation
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* by Leo Weppelman
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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/*
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* Invalidate entire TLB.
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*/
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static __inline void __attribute__((__unused__))
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TBIA_60(void)
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{
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__asm volatile (" .word 0xf518" ); /* pflusha */
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}
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/*
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* Invalidate any TLB entry for given VA (TB Invalidate Single)
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*/
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static __inline void __attribute__((__unused__))
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TBIS_60(vaddr_t va)
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{
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register uint8_t *r_va __asm("%a0") = (void *)va;
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int tmp;
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__asm volatile (" movc %1, %%dfc;" /* select supervisor */
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" .word 0xf508;" /* pflush %a0@ */
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" moveq %3, %1;" /* select user */
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" movc %1, %%dfc;"
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" .word 0xf508;" /* pflush %a0@ */
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" movc %%cacr,%1;"
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" orl %4,%1;"
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" movc %1,%%cacr" : "=d" (tmp) :
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"0" (FC_SUPERD), "a" (r_va), "i" (FC_USERD),
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"i" (IC60_CABC));
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}
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/*
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* Invalidate supervisor side of TLB
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*/
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static __inline void __attribute__((__unused__))
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TBIAS_60(void)
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{
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int tmp;
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/*
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* Cannot specify supervisor/user on pflusha, so we flush all
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*/
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__asm volatile (" .word 0xf518;"
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" movc %%cacr,%0;"
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" orl %1,%0;"
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" movc %0,%%cacr" /* clear all branch cache
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entries */
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: "=d" (tmp) : "i" (IC60_CABC) );
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}
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/*
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* Invalidate user side of TLB
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*/
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static __inline void __attribute__((__unused__))
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TBIAU_60(void)
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{
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int tmp;
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/*
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* Cannot specify supervisor/user on pflusha, so we flush all
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*/
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__asm volatile (" .word 0xf518;"
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" movc %%cacr,%0;"
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" orl %1,%0;"
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" movc %0,%%cacr" /* clear all branch cache
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entries */
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: "=d" (tmp) : "i" (IC60_CUBC) );
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}
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/*
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* Invalidate instruction cache
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*/
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static __inline void __attribute__((__unused__))
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ICIA_60(void)
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{
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/* inva ic (also clears branch cache) */
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__asm volatile (" .word 0xf498;");
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}
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static __inline void __attribute__((__unused__))
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ICPA_60(void)
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{
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/* inva ic (also clears branch cache) */
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__asm volatile (" .word 0xf498;");
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}
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/*
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* Invalidate data cache.
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*/
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static __inline void __attribute__((__unused__))
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DCIA_60(void)
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{
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__asm volatile (" .word 0xf478;"); /* cpusha dc */
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}
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static __inline void __attribute__((__unused__))
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DCIS_60(void)
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{
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__asm volatile (" .word 0xf478;"); /* cpusha dc */
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}
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static __inline void __attribute__((__unused__))
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DCIU_60(void)
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{
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__asm volatile (" .word 0xf478;"); /* cpusha dc */
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}
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static __inline void __attribute__((__unused__))
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DCIAS_60(paddr_t pa)
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{
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register uint8_t *r_pa __asm("%a0") = (void *)pa;
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__asm volatile (" .word 0xf468;" : : "a" (r_pa)); /* cpushl dc,%a0@ */
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}
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static __inline void __attribute__((__unused__))
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PCIA_60(void)
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{
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__asm volatile (" .word 0xf478;"); /* cpusha dc */
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}
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#define DCFA_60() DCFA_40()
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#define DCPA_60() DCPA_40()
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#define ICPL_60(pa) ICPL_40(pa)
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#define ICPP_60(pa) ICPP_40(pa)
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#define DCPL_60(pa) DCPL_40(pa)
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#define DCPP_60(pa) DCPP_40(pa)
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#define DCFL_60(pa) DCFL_40(pa)
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#define DCFP_60(pa) DCFP_40(pa)
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