272 lines
7.4 KiB
C
272 lines
7.4 KiB
C
/* $NetBSD: irqhandler.h,v 1.9 1997/01/26 01:30:51 mark Exp $ */
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/*
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* Copyright (c) 1994-1996 Mark Brinicombe.
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* Copyright (c) 1994 Brini.
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* All rights reserved.
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*
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* This code is derived from software written for Brini by Mark Brinicombe
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by Brini.
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* 4. The name of the company nor the name of the author may be used to
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* endorse or promote products derived from this software without specific
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* prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY BRINI ``AS IS'' AND ANY EXPRESS OR IMPLIED
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* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL BRINI OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
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* INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* RiscBSD kernel project
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*
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* irqhandler.h
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*
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* IRQ related stuff
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*
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* Created : 30/09/94
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*/
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#include <sys/types.h>
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/* Define the IRQ bits */
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#ifdef CPU_ARM7500
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#ifdef RC7500
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/*#define IRQ_PRINTER 0x00*/
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#define IRQ_RESERVED0 0x01
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#define IRQ_BUTTON 0x02
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#define IRQ_FLYBACK 0x03
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#define IRQ_POR 0x04
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#define IRQ_TIMER0 0x05
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#define IRQ_TIMER1 0x06
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#define IRQ_FIQDOWN 0x07
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#define IRQ_DREQ3 0x08
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/*#define IRQ_HD1 0x09*/
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/*#define IRQ_HD IRQ_HD1*/
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#define IRQ_DREQ2 0x0A
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#define IRQ_ETHERNET 0x0B
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/*#define IRQ_FLOPPY 0x0C*/
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/*#define IRQ_SERIAL 0x0D*/
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#define IRQ_KBDTX 0x0E
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#define IRQ_KBDRX 0x0F
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#define IRQ_IRQ3 0x10
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#define IRQ_IRQ4 0x11
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#define IRQ_IRQ5 0x12
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#define IRQ_IRQ6 0x13
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#define IRQ_IRQ7 0x14
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#define IRQ_IRQ9 0x15
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#define IRQ_IRQ10 0x16
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#define IRQ_HD2 0x17
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#define IRQ_MSDRX 0x18
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#define IRQ_MSDTX 0x19
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#define IRQ_ATOD 0x1A
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#define IRQ_CLOCK 0x1B
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#define IRQ_PANIC 0x1C
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#define IRQ_RESERVED2 0x1D
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#define IRQ_RESERVED3 0x1E
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#define IRQ_RESERVED1 IRQ_RESERVED2
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/*
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* Note that Sound DMA IRQ is on the 31st vector.
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* It's not part of the IRQD.
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*/
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#define IRQ_SDMA 0x1F
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#else
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/*#define IRQ_PRINTER 0x00*/
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#define IRQ_RESERVED0 0x01
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#define IRQ_BUTTON 0x02
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#define IRQ_FLYBACK 0x03
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#define IRQ_POR 0x04
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#define IRQ_TIMER0 0x05
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#define IRQ_TIMER1 0x06
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#define IRQ_RESERVED1 0x07
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#define IRQ_DREQ3 0x08
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/*#define IRQ_HD1 0x09*/
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/*#define IRQ_HD IRQ_HD1*/
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#define IRQ_DREQ2 0x0A
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#define IRQ_EXTENDED 0x0B
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/*#define IRQ_FLOPPY 0x0C*/
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/*#define IRQ_SERIAL 0x0D*/
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#define IRQ_PODULE 0x0D
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#define IRQ_KBDTX 0x0E
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#define IRQ_KBDRX 0x0F
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#define IRQ_IRQ3 0x10
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#define IRQ_IRQ4 0x11
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#define IRQ_IRQ5 0x12
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#define IRQ_IRQ6 0x13
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#define IRQ_IRQ7 0x14
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#define IRQ_IRQ9 0x15
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#define IRQ_IRQ10 0x16
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#define IRQ_IRQ11 0x17
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#define IRQ_MSDRX 0x18
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#define IRQ_MSDTX 0x19
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#define IRQ_ATOD 0x1A
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#define IRQ_CLOCK 0x1B
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#define IRQ_PANIC 0x1C
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#define IRQ_RESERVED2 0x1D
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#define IRQ_RESERVED3 0x1E
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/*
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* Note that Sound DMA IRQ is on the 31st vector.
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* It's not part of the IRQD.
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*/
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#define IRQ_SDMA 0x1F
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#define IRQ_EXPCARD0 0x20
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#define IRQ_EXPCARD1 0x21
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#define IRQ_EXPCARD2 0x22
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#define IRQ_EXPCARD3 0x23
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#define IRQ_EXPCARD4 0x24
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#define IRQ_EXPCARD5 0x25
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#define IRQ_EXPCARD6 0x26
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#define IRQ_EXPCARD7 0x27
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#endif /* RC7500 */
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#else /* CPU_ARM7500 */
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/*#define IRQ_PRINTER 0x00*/
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#define IRQ_RESERVED0 0x01
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/*#define IRQ_FLOPPYIDX 0x02*/
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#define IRQ_FLYBACK 0x03
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#define IRQ_POR 0x04
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#define IRQ_TIMER0 0x05
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#define IRQ_TIMER1 0x06
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#define IRQ_RESERVED1 0x07
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#define IRQ_RESERVED2 0x08
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/*#define IRQ_HD 0x09*/
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/*#define IRQ_SERIAL 0x0A*/
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#define IRQ_EXTENDED 0x0B
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/*#define IRQ_FLOPPY 0x0C*/
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#define IRQ_PODULE 0x0D
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#define IRQ_KBDTX 0x0E
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#define IRQ_KBDRX 0x0F
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#define IRQ_DMACH0 0x10
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#define IRQ_DMACH1 0x11
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#define IRQ_DMACH2 0x12
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#define IRQ_DMACH3 0x13
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#define IRQ_DMASCH0 0x14
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#define IRQ_DMASCH1 0x15
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#define IRQ_RESERVED3 0x16
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#define IRQ_RESERVED4 0x17
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#define IRQ_EXPCARD0 0x18
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#define IRQ_EXPCARD1 0x19
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#define IRQ_EXPCARD2 0x1A
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#define IRQ_EXPCARD3 0x1B
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#define IRQ_EXPCARD4 0x1C
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#define IRQ_EXPCARD5 0x1D
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#define IRQ_EXPCARD6 0x1E
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#define IRQ_EXPCARD7 0x1F
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#endif /* CPU_ARM7500 */
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#define IRQ_VSYNC IRQ_FLYBACK /* Aliased */
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#define IRQ_NETSLOT IRQ_EXTENDED
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#define IRQ_SOFTNET IRQ_RESERVED0 /* Emulated */
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#define IRQMASK_SOFTNET (1 << IRQ_SOFTNET)
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#define IRQ_SOFTCLOCK IRQ_RESERVED1 /* Emulated */
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#define IRQMASK_SOFTCLOCK (1 << IRQ_SOFTCLOCK)
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#define IRQ_SOFTPLIP IRQ_RESERVED2 /* Emulated */
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#define IRQMASK_SOFTPLIP (1 << IRQ_SOFTPLIP)
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#define IRQ_INSTRUCT -1
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#define NIRQS 0x20
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/* Define the various Interrupt Priority Levels */
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/* Interrupt Priority Levels are not mutually exclusive. */
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#define IPL_BIO 0 /* block I/O */
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#define IPL_NET 1 /* network */
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#define IPL_TTY 2 /* terminal */
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#define IPL_CLOCK 3 /* clock */
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#define IPL_IMP 4 /* memory allocation */
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#define IPL_NONE 5
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#define IRQ_LEVELS 6
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#ifndef _LOCORE
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typedef struct irqhandler {
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int (*ih_func) __P((void *arg));/* handler function */
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void *ih_arg; /* Argument to handler */
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int ih_level; /* Interrupt level */
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int ih_num; /* Interrupt number (for accounting) */
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const char *ih_name; /* Name of interrupt (for vmstat -i) */
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u_int ih_flags; /* Interrupt flags */
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u_int ih_maskaddr; /* mask address for expansion cards */
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u_int ih_maskbits; /* interrupt bit for expansion cards */
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struct irqhandler *ih_next; /* next handler */
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} irqhandler_t;
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#ifdef _KERNEL
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extern u_int irqmasks[IRQ_LEVELS];
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extern irqhandler_t *irqhandlers[NIRQS];
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void irq_init __P((void));
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int irq_claim __P((int, irqhandler_t *));
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int irq_release __P((int, irqhandler_t *));
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void *intr_claim __P((int irq, int level, const char *name, int (*func) __P((void *)), void *arg));
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void intr_release __P((void *ih));
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void irq_setmasks __P((void));
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void disable_irq __P((int));
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void enable_irq __P((int));
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u_int enable_interrupts __P((u_int));
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u_int disable_interrupts __P((u_int));
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u_int restore_interrupts __P((u_int));
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#endif /* _KERNEL */
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#endif /* _LOCORE */
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#define IRQ_FLAG_ACTIVE 0x00000001 /* This is the active handler in list */
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#ifndef _LOCORE
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typedef struct fiqhandler {
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void (*fh_func) __P((void));/* handler function */
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u_int fh_size; /* Size of handler function */
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u_int fh_mask; /* FIQ mask */
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u_int fh_r8; /* FIQ mode r8 */
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u_int fh_r9; /* FIQ mode r9 */
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u_int fh_r10; /* FIQ mode r10 */
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u_int fh_r11; /* FIQ mode r11 */
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u_int fh_r12; /* FIQ mode r12 */
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u_int fh_r13; /* FIQ mode r13 */
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} fiqhandler_t;
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#ifdef _KERNEL
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int fiq_claim __P((fiqhandler_t *));
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int fiq_release __P((fiqhandler_t *));
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#endif /* _KERNEL */
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#endif /* _LOCORE */
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/* End of irqhandler.h */
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