d0ee80aad0
MHz value as suggested by Alan Barret (apb@). While I'm here make it report the correct type, it should be PC2 not PC for DDR2. spdmem0 at iic0 addr 0x50 spdmem0: DDR2 SDRAM memory, no parity or ECC, 1024MB, 800MHz, PC2-6400 spdmem0: 14 rows, 10 cols, 2 ranks, 4 banks/chip, 2.50ns cycle time spdmem0: voltage SSTL 1.8V, refresh time 7.8us (self-refreshing) spdmem1 at iic0 addr 0x51 spdmem1: DDR2 SDRAM memory, no parity or ECC, 1024MB, 667MHz, PC2-5300 spdmem1: 14 rows, 10 cols, 2 ranks, 4 banks/chip, 3.00ns cycle time spdmem1: voltage SSTL 1.8V, refresh time 7.8us (self-refreshing) |
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.. | ||
adm1030.c | ||
adm1030var.h | ||
adt7463.c | ||
adt7463reg.h | ||
adt7467.c | ||
adt7467var.h | ||
at24cxx.c | ||
at24cxxvar.h | ||
ddc.c | ||
ddcreg.h | ||
ddcvar.h | ||
ds1307.c | ||
ds1307reg.h | ||
files.i2c | ||
i2c_bitbang.c | ||
i2c_bitbang.h | ||
i2c_exec.c | ||
i2c_io.h | ||
i2c.c | ||
i2cvar.h | ||
lm75.c | ||
lm75reg.h | ||
m41st84.c | ||
m41st84reg.h | ||
m41t00.c | ||
m41t00reg.h | ||
max6900.c | ||
max6900reg.h | ||
pcf8583.c | ||
pcf8583reg.h | ||
pcf8583var.h | ||
pic16lc.c | ||
pic16lcreg.h | ||
r2025.c | ||
r2025reg.h | ||
rs5c372.c | ||
rs5c372reg.h | ||
sgsmix.c | ||
sgsmixvar.h | ||
spdmem.c | ||
spdmemreg.h | ||
spdmemvar.h | ||
x1226.c | ||
x1226reg.h | ||
xbseeprom.c |