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NetBSD/sys/arch/mipsco/obio
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wdk b38096892a Microtime calculation was seriously incorrect when HZ != 100 
Give rest of clock interrupt code a revamp.  Because we are using an external
cycle counter we can now handle loosing several hundred interrupts without
the time slipping.
 		2000-09-06 07:52:47 +00:00
..
asc.c * Use bus_space_write_multi_2 for priming the DMA FIFO as suggested by cgd 2000-09-04 22:28:53 +00:00
clockreg.h Initial commit of port to MIPS Computer Systems RC3xxx systems. 2000-08-12 22:57:55 +00:00
i82072.c * Tidy up interrupt handlers by implementing an intr_establish() 2000-08-15 04:56:45 +00:00
if_le.c * Tidy up interrupt handlers by implementing an intr_establish() 2000-08-15 04:56:45 +00:00
mkclock.c Initial commit of port to MIPS Computer Systems RC3xxx systems. 2000-08-12 22:57:55 +00:00
obio.c * Tidy up interrupt handlers by implementing an intr_establish() 2000-08-15 04:56:45 +00:00
rambo.c Microtime calculation was seriously incorrect when HZ != 100 2000-09-06 07:52:47 +00:00
rambo.h Microtime calculation was seriously incorrect when HZ != 100 2000-09-06 07:52:47 +00:00
zs.c Engage the clutch before changing gears. 2000-08-29 11:25:08 +00:00