9b4c0e34d2
x86-64. Since there's no hardware available yet, this port is only known to run on the Simics simulator for at the moment, and as such uses the PC devices that it simulates for now. It will be developed more (and cleaned up) as the hardware becomes available.
112 lines
3.2 KiB
C
112 lines
3.2 KiB
C
/* $NetBSD: reg.h,v 1.1 2001/06/19 00:20:12 fvdl Exp $ */
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/*-
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* Copyright (c) 1990 The Regents of the University of California.
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* All rights reserved.
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*
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* This code is derived from software contributed to Berkeley by
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* William Jolitz.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by the University of
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* California, Berkeley and its contributors.
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* 4. Neither the name of the University nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* @(#)reg.h 5.5 (Berkeley) 1/18/91
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*/
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#ifndef _X86_64_REG_H_
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#define _X86_64_REG_H_
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/*
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* XXX
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* The #defines aren't used in the kernel, but some user-level code still
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* expects them.
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*/
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/* When referenced during a trap/exception, registers are at these offsets */
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#define tR15 0
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#define tR14 1
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#define tR13 2
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#define tR12 3
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#define tR11 4
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#define tR10 5
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#define tR9 6
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#define tR8 7
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#define tRDI 8
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#define tRSI 9
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#define tRBP 10
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#define tRBX 11
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#define tRDX 12
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#define tRCX 13
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#define tRAX 14
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#define tRIP 17
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#define tCS 18
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#define tEFLAGS 19
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#define tRSP 20
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#define tSS 21
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/*
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* Registers accessible to ptrace(2) syscall for debugger
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* The machine-dependent code for PT_{SET,GET}REGS needs to
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* use whichver order, defined above, is correct, so that it
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* is all invisible to the user.
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*/
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struct reg {
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u_int64_t r_r15;
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u_int64_t r_r14;
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u_int64_t r_r13;
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u_int64_t r_r12;
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u_int64_t r_r11;
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u_int64_t r_r10;
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u_int64_t r_r9;
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u_int64_t r_r8;
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u_int64_t r_rdi;
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u_int64_t r_rsi;
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u_int64_t r_rbp;
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u_int64_t r_rbx;
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u_int64_t r_rdx;
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u_int64_t r_rcx;
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u_int64_t r_rax;
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u_int64_t r_rsp;
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u_int64_t r_rip;
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u_int64_t r_eflags;
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u_int64_t r_cs;
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u_int64_t r_ss;
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u_int64_t r_ds;
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u_int64_t r_es;
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u_int64_t r_fs;
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u_int64_t r_gs;
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};
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struct fpreg {
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struct fxsave64 fxstate;
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};
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#endif /* !_X86_64_REG_H_ */
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