851de295eb
pci_attach_args *" instead of from four separate parameters which in all cases were extracted from the same "struct pci_attach_args". This both simplifies the driver api, and allows for alternate PCI interrupt mapping schemes, such as one using the tables described in the Intel Multiprocessor Spec which describe interrupt wirings for devices behind pci-pci bridges based on the device's location rather the bridge's location. Tested on alpha and i386; welcome to 1.5Q
736 lines
17 KiB
C
736 lines
17 KiB
C
/* $NetBSD: btvmei.c,v 1.4 2000/12/28 22:59:11 sommerfeld Exp $ */
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/*
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* Copyright (c) 1999
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* Matthias Drochner. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. The name of the author may not be used to endorse or promote products
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* derived from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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*/
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/device.h>
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#include <sys/proc.h>
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#include <sys/malloc.h>
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#include <machine/bus.h>
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#include <sys/extent.h>
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#include <dev/pci/pcireg.h>
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#include <dev/pci/pcivar.h>
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#include <dev/pci/pcidevs.h>
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#include <dev/vme/vmereg.h>
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#include <dev/vme/vmevar.h>
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#include <dev/pci/btvmeireg.h>
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#include <dev/pci/btvmeivar.h>
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static int b3_617_match __P((struct device *, struct cfdata *, void *));
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static void b3_617_attach __P((struct device *, struct device *, void *));
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#ifdef notyet
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static int b3_617_detach __P((struct device *));
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#endif
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void b3_617_slaveconfig __P((struct device *, struct vme_attach_args *));
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static void b3_617_vmeintr __P((struct b3_617_softc *, unsigned char));
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/*
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* mapping ressources, needed for deallocation
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*/
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struct b3_617_vmeresc {
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bus_space_handle_t handle;
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bus_size_t len;
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int firstpage, maplen;
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};
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struct cfattach btvmei_ca = {
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sizeof(struct b3_617_softc), b3_617_match, b3_617_attach,
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#ifdef notyet
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b3_617_detach
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#endif
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};
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static int
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b3_617_match(parent, match, aux)
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struct device *parent;
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struct cfdata *match;
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void *aux;
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{
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struct pci_attach_args *pa = aux;
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if ((PCI_VENDOR(pa->pa_id) != PCI_VENDOR_BIT3)
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|| (PCI_PRODUCT(pa->pa_id) != PCI_PRODUCT_BIT3_PCIVME617))
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return (0);
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return (1);
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}
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static void
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b3_617_attach(parent, self, aux)
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struct device *parent, *self;
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void *aux;
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{
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struct b3_617_softc *sc = (struct b3_617_softc*)self;
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struct pci_attach_args *pa = aux;
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pci_chipset_tag_t pc = pa->pa_pc;
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int rev;
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pci_intr_handle_t ih;
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const char *intrstr;
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struct vmebus_attach_args vaa;
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sc->sc_pc = pc;
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sc->sc_dmat = pa->pa_dmat;
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rev = PCI_REVISION(pci_conf_read(pc, pa->pa_tag, PCI_CLASS_REG));
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printf(": BIT3 PCI-VME 617 rev %d\n", rev);
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/*
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* Map CSR and mapping table spaces.
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* Don't map VME window; parts are mapped as needed to
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* save kernel virtual memory space
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*/
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if (pci_mapreg_map(pa, 0x14,
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PCI_MAPREG_TYPE_MEM | PCI_MAPREG_MEM_TYPE_32BIT,
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0, &sc->csrt, &sc->csrh, NULL, NULL) &&
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pci_mapreg_map(pa, 0x10,
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PCI_MAPREG_TYPE_IO,
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0, &sc->csrt, &sc->csrh, NULL, NULL)) {
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printf("%s: can't map CSR space\n", self->dv_xname);
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return;
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}
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if (pci_mapreg_map(pa, 0x18,
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PCI_MAPREG_TYPE_MEM | PCI_MAPREG_MEM_TYPE_32BIT,
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0, &sc->mapt, &sc->maph, NULL, NULL)) {
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printf("%s: can't map map space\n", self->dv_xname);
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return;
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}
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if (pci_mapreg_info(pc, pa->pa_tag, 0x1c,
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PCI_MAPREG_TYPE_MEM | PCI_MAPREG_MEM_TYPE_32BIT,
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&sc->vmepbase, 0, 0)) {
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printf("%s: can't get VME range\n", self->dv_xname);
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return;
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}
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sc->sc_vmet = pa->pa_memt; /* XXX needed for VME mappings */
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/* Map and establish the interrupt. */
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if (pci_intr_map(pa, &ih)) {
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printf("%s: couldn't map interrupt\n", sc->sc_dev.dv_xname);
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return;
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}
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intrstr = pci_intr_string(pc, ih);
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/*
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* Use a low interrupt level (the lowest?).
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* We will raise before calling a subdevice's handler.
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*/
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sc->sc_ih = pci_intr_establish(pc, ih, IPL_BIO, b3_617_intr, sc);
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if (sc->sc_ih == NULL) {
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printf("%s: couldn't establish interrupt",
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sc->sc_dev.dv_xname);
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if (intrstr != NULL)
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printf(" at %s", intrstr);
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printf("\n");
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return;
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}
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printf("%s: interrupting at %s\n", sc->sc_dev.dv_xname, intrstr);
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if (b3_617_init(sc))
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return;
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/*
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* set up all the tags for use by VME devices
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*/
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sc->sc_vct.cookie = self;
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sc->sc_vct.vct_probe = b3_617_vme_probe;
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sc->sc_vct.vct_map = b3_617_map_vme;
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sc->sc_vct.vct_unmap = b3_617_unmap_vme;
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sc->sc_vct.vct_int_map = b3_617_map_vmeint;
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sc->sc_vct.vct_int_establish = b3_617_establish_vmeint;
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sc->sc_vct.vct_int_disestablish = b3_617_disestablish_vmeint;
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sc->sc_vct.vct_dmamap_create = b3_617_dmamap_create;
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sc->sc_vct.vct_dmamap_destroy = b3_617_dmamap_destroy;
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sc->sc_vct.vct_dmamem_alloc = b3_617_dmamem_alloc;
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sc->sc_vct.vct_dmamem_free = b3_617_dmamem_free;
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vaa.va_vct = &(sc->sc_vct);
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vaa.va_bdt = pa->pa_dmat;
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vaa.va_slaveconfig = b3_617_slaveconfig;
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sc->csrwindow.offset = -1;
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sc->dmawindow24.offset = -1;
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sc->dmawindow32.offset = -1;
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config_found(self, &vaa, 0);
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}
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#ifdef notyet
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static int
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b3_617_detach(dev)
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struct device *dev;
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{
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struct b3_617_softc *sc = (struct b3_617_softc *)dev;
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b3_617_halt(sc);
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if (sc->sc_ih)
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pci_intr_disestablish(sc->sc_pc, sc->sc_ih);
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bus_space_unmap(sc->sc_bc, sc->csrbase, 32);
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bus_space_unmap(sc->sc_bc, sc->mapbase, 64*1024);
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return(0);
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}
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#endif
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void
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b3_617_slaveconfig(dev, va)
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struct device *dev;
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struct vme_attach_args *va;
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{
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struct b3_617_softc *sc = (struct b3_617_softc *)dev;
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vme_chipset_tag_t vmect;
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int i, res;
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char *name = 0; /* XXX gcc! */
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vmect = &sc->sc_vct;
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if (!va)
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goto freeit;
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#ifdef DIAGNOSTIC
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if (vmect != va->va_vct)
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panic("pcivme_slaveconfig: chipset tag?\n");
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#endif
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for (i = 0; i < va->numcfranges; i++) {
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res = vme_space_alloc(vmect, va->r[i].offset,
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va->r[i].size, va->r[i].am);
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if (res)
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panic("%s: can't alloc slave window %x/%x/%x",
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dev->dv_xname, va->r[i].offset,
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va->r[i].size, va->r[i].am);
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switch (va->r[i].am & VME_AM_ADRSIZEMASK) {
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/* structure assignments! */
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case VME_AM_A16:
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sc->csrwindow = va->r[i];
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name = "VME CSR";
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break;
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case VME_AM_A24:
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sc->dmawindow24 = va->r[i];
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name = "A24 DMA";
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break;
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case VME_AM_A32:
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sc->dmawindow32 = va->r[i];
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name = "A32 DMA";
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break;
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}
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printf("%s: %s window: %x-%x\n", dev->dv_xname,
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name, va->r[i].offset,
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va->r[i].offset + va->r[i].size - 1);
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}
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return;
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freeit:
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if (sc->csrwindow.offset != -1)
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vme_space_free(vmect, sc->csrwindow.offset,
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sc->csrwindow.size, sc->csrwindow.am);
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if (sc->dmawindow32.offset != -1)
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vme_space_free(vmect, sc->dmawindow32.offset,
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sc->dmawindow32.size, sc->dmawindow32.am);
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if (sc->dmawindow24.offset != -1)
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vme_space_free(vmect, sc->dmawindow24.offset,
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sc->dmawindow24.size, sc->dmawindow24.am);
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}
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int
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b3_617_reset(sc)
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struct b3_617_softc *sc;
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{
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unsigned char status;
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/* reset sequence, ch 5.2 */
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status = read_csr_byte(sc, LOC_STATUS);
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if (status & LSR_NO_CONNECT) {
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printf("%s: not connected\n", sc->sc_dev.dv_xname);
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return (-1);
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}
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status = read_csr_byte(sc, REM_STATUS); /* discard */
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write_csr_byte(sc, LOC_CMD1, LC1_CLR_ERROR);
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status = read_csr_byte(sc, LOC_STATUS);
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if (status & LSR_CERROR_MASK) {
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char sbuf[sizeof(BIT3_LSR_BITS) + 64];
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bitmask_snprintf(status, BIT3_LSR_BITS, sbuf, sizeof(sbuf));
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printf("%s: interface error, lsr=%s\n", sc->sc_dev.dv_xname,
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sbuf);
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return (-1);
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}
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return (0);
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}
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int
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b3_617_init(sc)
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struct b3_617_softc *sc;
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{
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unsigned int i;
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if (b3_617_reset(sc))
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return (-1);
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/* all maps invalid */
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for (i = MR_PCI_VME; i < MR_PCI_VME + MR_PCI_VME_SIZE; i += 4)
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write_mapmem(sc, i, MR_RAM_INVALID);
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for (i = MR_VME_PCI; i < MR_VME_PCI + MR_VME_PCI_SIZE; i += 4)
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write_mapmem(sc, i, MR_RAM_INVALID);
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for (i = MR_DMA_PCI; i < MR_DMA_PCI + MR_DMA_PCI_SIZE; i += 4)
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write_mapmem(sc, i, MR_RAM_INVALID);
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/*
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* set up scatter page allocation control
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*/
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sc->vmeext = extent_create("pcivme", MR_PCI_VME,
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MR_PCI_VME + MR_PCI_VME_SIZE - 1, M_DEVBUF,
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sc->vmemap, sizeof(sc->vmemap),
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EX_NOCOALESCE);
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#if 0
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sc->pciext = extent_create("vmepci", MR_VME_PCI,
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MR_VME_PCI + MR_VME_PCI_SIZE - 1, M_DEVBUF,
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sc->pcimap, sizeof(sc->pcimap),
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EX_NOCOALESCE);
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sc->dmaext = extent_create("dmapci", MR_DMA_PCI,
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MR_DMA_PCI + MR_DMA_PCI_SIZE - 1, M_DEVBUF,
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sc->dmamap, sizeof(sc->dmamap),
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EX_NOCOALESCE);
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#endif
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|
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/*
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* init int handler queue,
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* enable interrupts if PCI interrupt available
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*/
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TAILQ_INIT(&(sc->intrhdls));
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sc->strayintrs = 0;
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if (sc->sc_ih)
|
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write_csr_byte(sc, LOC_INT_CTRL, LIC_INT_ENABLE);
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/* no error ints */
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write_csr_byte(sc, REM_CMD2, 0); /* enables VME IRQ */
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|
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return (0);
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}
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|
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#ifdef notyet /* for detach */
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void
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b3_617_halt(sc)
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struct b3_617_softc *sc;
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{
|
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/*
|
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* because detach code checks for existence of children,
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* all ressources (mappings, VME IRQs, DMA requests)
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* should be deallocated at this point
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*/
|
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|
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/* disable IRQ */
|
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write_csr_byte(sc, LOC_INT_CTRL, 0);
|
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}
|
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#endif
|
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|
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static void
|
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b3_617_vmeintr(sc, lstat)
|
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struct b3_617_softc *sc;
|
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unsigned char lstat;
|
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{
|
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int level;
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|
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for (level = 7; level >= 1; level--) {
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unsigned char vector;
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struct b3_617_vmeintrhand *ih;
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int found;
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|
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if (!(lstat & (1 << level)))
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continue;
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|
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write_csr_byte(sc, REM_CMD1, level);
|
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vector = read_csr_byte(sc, REM_IACK);
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|
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found = 0;
|
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|
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for (ih = sc->intrhdls.tqh_first; ih;
|
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ih = ih->ih_next.tqe_next) {
|
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if ((ih->ih_level == level) &&
|
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((ih->ih_vector == -1) ||
|
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(ih->ih_vector == vector))) {
|
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int s, res;
|
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/*
|
|
* We should raise the interrupt level
|
|
* to ih->ih_prior here. How to do this
|
|
* machine-independantly?
|
|
* To be safe, raise to the maximum.
|
|
*/
|
|
s = splhigh();
|
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found |= (res = (*(ih->ih_fun))(ih->ih_arg));
|
|
splx(s);
|
|
if (res)
|
|
ih->ih_count++;
|
|
if (res == 1)
|
|
break;
|
|
}
|
|
}
|
|
if (!found)
|
|
sc->strayintrs++;
|
|
}
|
|
}
|
|
|
|
#define sc ((struct b3_617_softc*)vsc)
|
|
|
|
int
|
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b3_617_map_vme(vsc, vmeaddr, len, am, datasizes, swap, tag, handle, resc)
|
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void *vsc;
|
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vme_addr_t vmeaddr;
|
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vme_size_t len;
|
|
vme_am_t am;
|
|
vme_datasize_t datasizes;
|
|
vme_swap_t swap;
|
|
bus_space_tag_t *tag;
|
|
bus_space_handle_t *handle;
|
|
vme_mapresc_t *resc;
|
|
{
|
|
vme_addr_t vmebase, vmeend, va;
|
|
unsigned long maplen, first, i;
|
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u_int32_t mapreg;
|
|
bus_addr_t pcibase;
|
|
int res;
|
|
struct b3_617_vmeresc *r;
|
|
|
|
/* first mapped address */
|
|
vmebase = vmeaddr & ~(VME_PAGESIZE - 1);
|
|
/* base of last mapped page */
|
|
vmeend = (vmeaddr + len - 1) & ~(VME_PAGESIZE - 1);
|
|
/* bytes in scatter table required */
|
|
maplen = ((vmeend - vmebase) / VME_PAGESIZE + 1) * 4;
|
|
|
|
if (extent_alloc(sc->vmeext, maplen, 4, 0, EX_FAST, &first))
|
|
return (ENOMEM);
|
|
|
|
/*
|
|
* set up adapter mapping registers
|
|
*/
|
|
mapreg = (am << MR_AMOD_SHIFT) | MR_FC_RRAM | swap;
|
|
|
|
for (i = first, va = vmebase;
|
|
i < first + maplen;
|
|
i += 4, va += VME_PAGESIZE) {
|
|
write_mapmem(sc, i, mapreg | va);
|
|
#ifdef BIT3DEBUG
|
|
printf("mapreg@%lx=%x\n", i, read_mapmem(sc, i));
|
|
#endif
|
|
}
|
|
|
|
#ifdef DIAGNOSTIC
|
|
if (va != vmeend + VME_PAGESIZE)
|
|
panic("b3_617_map_pci_vme: botch");
|
|
#endif
|
|
/*
|
|
* map needed range in PCI space
|
|
*/
|
|
pcibase = sc->vmepbase + (first - MR_PCI_VME) / 4 * VME_PAGESIZE
|
|
+ (vmeaddr & (VME_PAGESIZE - 1));
|
|
|
|
if ((res = bus_space_map(sc->sc_vmet, pcibase, len, 0, handle))) {
|
|
for (i = first; i < first + maplen; i += 4)
|
|
write_mapmem(sc, i, MR_RAM_INVALID);
|
|
extent_free(sc->vmeext, first, maplen, 0);
|
|
return (res);
|
|
}
|
|
|
|
*tag = sc->sc_vmet;
|
|
|
|
/*
|
|
* save all data needed for later unmapping
|
|
*/
|
|
r = malloc(sizeof(*r), M_DEVBUF, M_NOWAIT); /* XXX check! */
|
|
r->handle = *handle;
|
|
r->len = len;
|
|
r->firstpage = first;
|
|
r->maplen = maplen;
|
|
*resc = r;
|
|
return (0);
|
|
}
|
|
|
|
void
|
|
b3_617_unmap_vme(vsc, resc)
|
|
void *vsc;
|
|
vme_mapresc_t resc;
|
|
{
|
|
unsigned long i;
|
|
struct b3_617_vmeresc *r = resc;
|
|
|
|
/* unmap PCI window */
|
|
bus_space_unmap(sc->sc_vmet, r->handle, r->len);
|
|
|
|
for (i = r->firstpage; i < r->firstpage + r->maplen; i += 4)
|
|
write_mapmem(sc, i, MR_RAM_INVALID);
|
|
|
|
extent_free(sc->vmeext, r->firstpage, r->maplen, 0);
|
|
|
|
free(r, M_DEVBUF);
|
|
}
|
|
|
|
int
|
|
b3_617_vme_probe(vsc, addr, len, am, datasize, callback, cbarg)
|
|
void *vsc;
|
|
vme_addr_t addr;
|
|
vme_size_t len;
|
|
vme_am_t am;
|
|
vme_datasize_t datasize;
|
|
int (*callback) __P((void *, bus_space_tag_t, bus_space_handle_t));
|
|
void *cbarg;
|
|
{
|
|
bus_space_tag_t tag;
|
|
bus_space_handle_t handle;
|
|
vme_mapresc_t resc;
|
|
int res, i;
|
|
volatile u_int32_t dummy;
|
|
int status;
|
|
|
|
res = b3_617_map_vme(vsc, addr, len, am, 0, 0,
|
|
&tag, &handle, &resc);
|
|
if (res)
|
|
return (res);
|
|
|
|
if (read_csr_byte(sc, LOC_STATUS) & LSR_ERROR_MASK) {
|
|
printf("b3_617_vme_badaddr: error bit not clean - resetting\n");
|
|
write_csr_byte(sc, LOC_CMD1, LC1_CLR_ERROR);
|
|
}
|
|
|
|
if (callback)
|
|
res = (*callback)(cbarg, tag, handle);
|
|
else {
|
|
for (i = 0; i < len;) {
|
|
switch (datasize) {
|
|
case VME_D8:
|
|
dummy = bus_space_read_1(tag, handle, i);
|
|
i++;
|
|
break;
|
|
case VME_D16:
|
|
dummy = bus_space_read_2(tag, handle, i);
|
|
i += 2;
|
|
break;
|
|
case VME_D32:
|
|
dummy = bus_space_read_4(tag, handle, i);
|
|
i += 4;
|
|
break;
|
|
default:
|
|
panic("b3_617_vme_probe: invalid datasize %x",
|
|
datasize);
|
|
}
|
|
}
|
|
}
|
|
|
|
if ((status = read_csr_byte(sc, LOC_STATUS)) & LSR_ERROR_MASK) {
|
|
#ifdef BIT3DEBUG
|
|
printf("b3_617_vme_badaddr: caught error %x\n", status);
|
|
#endif
|
|
write_csr_byte(sc, LOC_CMD1, LC1_CLR_ERROR);
|
|
res = EIO;
|
|
}
|
|
|
|
b3_617_unmap_vme(vsc, resc);
|
|
return (res);
|
|
}
|
|
|
|
int
|
|
b3_617_map_vmeint(vsc, level, vector, handlep)
|
|
void *vsc;
|
|
int level, vector;
|
|
vme_intr_handle_t *handlep;
|
|
{
|
|
if (!sc->sc_ih) {
|
|
printf("%s: b3_617_map_vmeint: no IRQ\n",
|
|
sc->sc_dev.dv_xname);
|
|
return (ENXIO);
|
|
}
|
|
/*
|
|
* We should check whether the interface can pass this interrupt
|
|
* level at all, but we don't know much about the jumper setting.
|
|
*/
|
|
*handlep = (void *)(long)((level << 8) | vector); /* XXX */
|
|
return (0);
|
|
}
|
|
|
|
void *
|
|
b3_617_establish_vmeint(vsc, handle, prior, func, arg)
|
|
void *vsc;
|
|
vme_intr_handle_t handle;
|
|
int prior;
|
|
int (*func) __P((void *));
|
|
void *arg;
|
|
{
|
|
struct b3_617_vmeintrhand *ih;
|
|
long lv;
|
|
int s;
|
|
extern int cold;
|
|
|
|
/* no point in sleeping unless someone can free memory. */
|
|
ih = malloc(sizeof *ih, M_DEVBUF, cold ? M_NOWAIT : M_WAITOK);
|
|
if (ih == NULL)
|
|
panic("b3_617_map_vmeint: can't malloc handler info");
|
|
|
|
lv = (long)handle; /* XXX */
|
|
|
|
ih->ih_fun = func;
|
|
ih->ih_arg = arg;
|
|
ih->ih_level = lv >> 8;
|
|
ih->ih_vector = lv & 0xff;
|
|
ih->ih_prior = prior;
|
|
ih->ih_count = 0;
|
|
|
|
s = splhigh();
|
|
TAILQ_INSERT_TAIL(&(sc->intrhdls), ih, ih_next);
|
|
splx(s);
|
|
|
|
return (ih);
|
|
}
|
|
|
|
void
|
|
b3_617_disestablish_vmeint(vsc, cookie)
|
|
void *vsc;
|
|
void *cookie;
|
|
{
|
|
struct b3_617_vmeintrhand *ih = cookie;
|
|
int s;
|
|
|
|
if (!ih) {
|
|
printf("b3_617_unmap_vmeint: NULL arg\n");
|
|
return;
|
|
}
|
|
|
|
s = splhigh();
|
|
TAILQ_REMOVE(&(sc->intrhdls), ih, ih_next);
|
|
splx(s);
|
|
|
|
free(ih, M_DEVBUF);
|
|
}
|
|
|
|
int
|
|
b3_617_intr(vsc)
|
|
void *vsc;
|
|
{
|
|
int handled = 0;
|
|
|
|
/* follows ch. 5.5.5 (reordered for speed) */
|
|
while (read_csr_byte(sc, LOC_INT_CTRL) & LIC_INT_PENDING) {
|
|
unsigned char lstat;
|
|
|
|
handled = 1;
|
|
|
|
/* no error interrupts! */
|
|
|
|
lstat = read_csr_byte(sc, LDMA_CMD);
|
|
if ((lstat & LDC_DMA_DONE) && (lstat & LDC_DMA_INT_ENABLE)) {
|
|
/* DMA done indicator flag */
|
|
write_csr_byte(sc, LDMA_CMD, lstat & (~LDC_DMA_DONE));
|
|
#if 0
|
|
b3_617_cntlrdma_done(sc);
|
|
#endif
|
|
continue;
|
|
}
|
|
|
|
lstat = read_csr_byte(sc, LOC_INT_STATUS);
|
|
if (lstat & LIS_CINT_MASK) {
|
|
/* VME backplane interrupt, ch. 5.5.3 */
|
|
b3_617_vmeintr(sc, lstat);
|
|
}
|
|
|
|
/* for now, ignore "mailbox interrupts" */
|
|
|
|
lstat = read_csr_byte(sc, LOC_STATUS);
|
|
if (lstat & LSR_PR_STATUS) {
|
|
/* PR interrupt recieved from REMOTE */
|
|
write_csr_byte(sc, LOC_CMD1, LC1_CLR_PR_INT);
|
|
continue;
|
|
}
|
|
|
|
lstat = read_csr_byte(sc, REM_STATUS);
|
|
if (lstat & RSR_PT_STATUS) {
|
|
/* PT interrupt is set */
|
|
write_csr_byte(sc, REM_CMD1, RC1_CLR_PT_INT);
|
|
continue;
|
|
}
|
|
}
|
|
return (handled);
|
|
}
|
|
|
|
int
|
|
b3_617_dmamap_create(vsc, len, am, datasize, swap,
|
|
nsegs, segsz, bound,
|
|
flags, mapp)
|
|
void *vsc;
|
|
vme_size_t len;
|
|
vme_am_t am;
|
|
vme_datasize_t datasize;
|
|
vme_swap_t swap;
|
|
int nsegs;
|
|
vme_size_t segsz;
|
|
vme_addr_t bound;
|
|
int flags;
|
|
bus_dmamap_t *mapp;
|
|
{
|
|
return (EINVAL);
|
|
}
|
|
|
|
void
|
|
b3_617_dmamap_destroy(vsc, map)
|
|
void *vsc;
|
|
bus_dmamap_t map;
|
|
{
|
|
}
|
|
|
|
int
|
|
b3_617_dmamem_alloc(vsc, len, am, datasizes, swap,
|
|
segs, nsegs, rsegs, flags)
|
|
void *vsc;
|
|
vme_size_t len;
|
|
vme_am_t am;
|
|
vme_datasize_t datasizes;
|
|
vme_swap_t swap;
|
|
bus_dma_segment_t *segs;
|
|
int nsegs;
|
|
int *rsegs;
|
|
int flags;
|
|
{
|
|
return (EINVAL);
|
|
}
|
|
|
|
void
|
|
b3_617_dmamem_free(vsc, segs, nsegs)
|
|
void *vsc;
|
|
bus_dma_segment_t *segs;
|
|
int nsegs;
|
|
{
|
|
}
|
|
|
|
#undef sc
|