146 lines
4.5 KiB
C
146 lines
4.5 KiB
C
/* $NetBSD: iq80310_intr.h,v 1.3 2004/01/13 23:18:54 he Exp $ */
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/*
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* Copyright (c) 2001, 2002 Wasabi Systems, Inc.
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* All rights reserved.
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*
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* Written by Jason R. Thorpe for Wasabi Systems, Inc.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed for the NetBSD Project by
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* Wasabi Systems, Inc.
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* 4. The name of Wasabi Systems, Inc. may not be used to endorse
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* or promote products derived from this software without specific prior
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* written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef _IQ80310_INTR_H_
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#define _IQ80310_INTR_H_
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#include "opt_iop310.h"
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#include <arm/armreg.h>
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#include <arm/cpufunc.h>
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#include <arm/xscale/i80200reg.h>
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#include <arm/xscale/i80200var.h>
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#if defined(IOP310_TEAMASA_NPWR)
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/*
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* We have 5 interrupt source bits -- all in XINT3. All interrupts
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* can be masked in the CPLD.
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*/
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#define IRQ_BITS 0x1f
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#define IRQ_BITS_ALWAYS_ON 0x00
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#else /* Default to stock IQ80310 */
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/*
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* We have 8 interrupt source bits -- 5 in the XINT3 register, and 3
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* in the XINT0 register (the upper 3). Note that the XINT0 IRQs
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* (SPCI INTA, INTB, and INTC) are always enabled, since they can not
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* be masked out in the CPLD (it provides only status, not masking,
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* for those interrupts).
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*/
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#define IRQ_BITS 0xff
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#define IRQ_BITS_ALWAYS_ON 0xe0
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#define IRQ_READ_XINT0 1 /* XXX only if board rev >= F */
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#endif /* list of IQ80310-based designs */
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void iq80310_do_soft(void);
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static __inline int __attribute__((__unused__))
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iq80310_splraise(int ipl)
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{
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extern __volatile int current_spl_level;
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extern int iq80310_imask[];
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int old;
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old = current_spl_level;
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current_spl_level |= iq80310_imask[ipl];
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/* Don't let the compiler re-order this code with subsequent code */
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__insn_barrier();
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return (old);
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}
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static __inline void __attribute__((__unused__))
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iq80310_splx(int new)
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{
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extern __volatile int iq80310_ipending;
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extern __volatile int current_spl_level;
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int old;
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/* Don't let the compiler re-order this code with preceding code */
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__insn_barrier();
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old = current_spl_level;
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current_spl_level = new;
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/* If there are software interrupts to process, do it. */
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if ((iq80310_ipending & ~IRQ_BITS) & ~new)
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iq80310_do_soft();
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/*
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* If there are pending hardware interrupts (i.e. the
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* external interrupt is disabled in the ICU), and all
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* hardware interrupts are being unblocked, then re-enable
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* the external hardware interrupt.
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*
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* XXX We have to wait for ALL hardware interrupts to
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* XXX be unblocked, because we currently lose if we
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* XXX get nested interrupts, and I don't know why yet.
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*/
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if ((new & IRQ_BITS) == 0 && (iq80310_ipending & IRQ_BITS))
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i80200_intr_enable(INTCTL_IM | INTCTL_PM);
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}
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static __inline int __attribute__((__unused__))
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iq80310_spllower(int ipl)
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{
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extern __volatile int current_spl_level;
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extern int iq80310_imask[];
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int old = current_spl_level;
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iq80310_splx(iq80310_imask[ipl]);
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return (old);
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}
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#if !defined(EVBARM_SPL_NOINLINE)
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#define _splraise(ipl) iq80310_splraise(ipl)
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#define _spllower(ipl) iq80310_spllower(ipl)
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#define splx(spl) iq80310_splx(spl)
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void _setsoftintr(int);
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#else
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int _splraise(int);
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int _spllower(int);
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void splx(int);
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void _setsoftintr(int);
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#endif /* ! EVBARM_SPL_NOINLINE */
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#endif /* _IQ80310_INTR_H_ */
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