333 lines
7.6 KiB
C
333 lines
7.6 KiB
C
/* $NetBSD: rs5c313.c,v 1.9 2010/04/06 15:29:19 nonaka Exp $ */
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/*-
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* Copyright (c) 2006 The NetBSD Foundation, Inc.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: rs5c313.c,v 1.9 2010/04/06 15:29:19 nonaka Exp $");
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/device.h>
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#include <sys/kernel.h>
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#include <dev/clock_subr.h>
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#include <dev/ic/rs5c313reg.h>
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#include <dev/ic/rs5c313var.h>
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/* todr(9) methods */
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static int rs5c313_todr_gettime_ymdhms(todr_chip_handle_t, struct clock_ymdhms *);
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static int rs5c313_todr_settime_ymdhms(todr_chip_handle_t, struct clock_ymdhms *);
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/* sugar for chip access */
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#define rtc_begin(sc) ((*sc->sc_ops->rs5c313_op_begin)(sc))
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#define rtc_ce(sc, onoff) ((*sc->sc_ops->rs5c313_op_ce)(sc, onoff))
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#define rtc_clk(sc, onoff) ((*sc->sc_ops->rs5c313_op_clk)(sc, onoff))
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#define rtc_dir(sc, output) ((*sc->sc_ops->rs5c313_op_dir)(sc, output))
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#define rtc_di(sc) ((*sc->sc_ops->rs5c313_op_read)(sc))
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#define rtc_do(sc, bit) ((*sc->sc_ops->rs5c313_op_write)(sc, bit))
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static int rs5c313_init(struct rs5c313_softc *);
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static int rs5c313_read_reg(struct rs5c313_softc *, int);
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static void rs5c313_write_reg(struct rs5c313_softc *, int, int);
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void
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rs5c313_attach(struct rs5c313_softc *sc)
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{
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device_t self = sc->sc_dev;
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const char *model;
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switch (sc->sc_model) {
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case MODEL_5C313:
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model = "5C313";
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sc->sc_ctrl[0] = CTRL_24H;
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sc->sc_ctrl[1] = CTRL2_NTEST;
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break;
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case MODEL_5C316:
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model = "5C316";
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sc->sc_ctrl[0] = 0;
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sc->sc_ctrl[1] = CTRL2_24H|CTRL2_NTEST;
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break;
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default:
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aprint_error("unknown model (%d)\n", sc->sc_model);
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return;
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}
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aprint_naive("\n");
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aprint_normal(": RICOH %s real time clock\n", model);
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sc->sc_todr.cookie = sc;
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sc->sc_todr.todr_gettime_ymdhms = rs5c313_todr_gettime_ymdhms;
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sc->sc_todr.todr_settime_ymdhms = rs5c313_todr_settime_ymdhms;
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if (rs5c313_init(sc) != 0) {
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aprint_error_dev(self, "init failed\n");
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return;
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}
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todr_attach(&sc->sc_todr);
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}
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static int
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rs5c313_init(struct rs5c313_softc *sc)
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{
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device_t self = sc->sc_dev;
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int status = 0;
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int retry;
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rtc_ce(sc, 0);
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rtc_begin(sc);
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rtc_ce(sc, 1);
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if ((rs5c313_read_reg(sc, RS5C313_CTRL) & CTRL_XSTP) == 0) {
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sc->sc_valid = 1;
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goto done;
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}
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sc->sc_valid = 0;
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aprint_error_dev(self, "time not valid\n");
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rs5c313_write_reg(sc, RS5C313_TINT, 0);
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rs5c313_write_reg(sc, RS5C313_CTRL, (sc->sc_ctrl[0] | CTRL_ADJ));
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for (retry = 1000; retry > 0; --retry) {
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if (rs5c313_read_reg(sc, RS5C313_CTRL) & CTRL_BSY)
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delay(1);
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else
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break;
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}
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if (retry == 0) {
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status = EIO;
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goto done;
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}
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rs5c313_write_reg(sc, RS5C313_CTRL, sc->sc_ctrl[0]);
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rs5c313_write_reg(sc, RS5C313_CTRL2, sc->sc_ctrl[1]);
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done:
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rtc_ce(sc, 0);
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return status;
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}
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static int
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rs5c313_todr_gettime_ymdhms(todr_chip_handle_t todr, struct clock_ymdhms *dt)
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{
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struct rs5c313_softc *sc = todr->cookie;
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int retry;
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int s;
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/*
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* If chip had invalid data on init, don't bother reading
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* bogus values, let todr(9) cope.
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*/
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if (sc->sc_valid == 0)
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return EIO;
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s = splhigh();
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rtc_begin(sc);
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for (retry = 10; retry > 0; --retry) {
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rtc_ce(sc, 1);
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rs5c313_write_reg(sc, RS5C313_CTRL, sc->sc_ctrl[0]);
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if ((rs5c313_read_reg(sc, RS5C313_CTRL) & CTRL_BSY) == 0)
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break;
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rtc_ce(sc, 0);
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delay(1);
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}
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if (retry == 0) {
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splx(s);
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return EIO;
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}
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#define RTCGET(x, y) \
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do { \
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int ones = rs5c313_read_reg(sc, RS5C313_ ## y ## 1); \
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int tens = rs5c313_read_reg(sc, RS5C313_ ## y ## 10); \
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dt->dt_ ## x = tens * 10 + ones; \
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} while (/* CONSTCOND */0)
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RTCGET(sec, SEC);
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RTCGET(min, MIN);
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RTCGET(hour, HOUR);
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RTCGET(day, DAY);
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RTCGET(mon, MON);
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RTCGET(year, YEAR);
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#undef RTCGET
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dt->dt_wday = rs5c313_read_reg(sc, RS5C313_WDAY);
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rtc_ce(sc, 0);
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splx(s);
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dt->dt_year = (dt->dt_year % 100) + 1900;
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if (dt->dt_year < POSIX_BASE_YEAR) {
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dt->dt_year += 100;
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}
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return 0;
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}
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static int
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rs5c313_todr_settime_ymdhms(todr_chip_handle_t todr, struct clock_ymdhms *dt)
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{
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struct rs5c313_softc *sc = todr->cookie;
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int retry;
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int t;
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int s;
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s = splhigh();
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rtc_begin(sc);
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for (retry = 10; retry > 0; --retry) {
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rtc_ce(sc, 1);
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rs5c313_write_reg(sc, RS5C313_CTRL, sc->sc_ctrl[0]);
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if ((rs5c313_read_reg(sc, RS5C313_CTRL) & CTRL_BSY) == 0)
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break;
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rtc_ce(sc, 0);
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delay(1);
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}
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if (retry == 0) {
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splx(s);
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return EIO;
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}
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#define RTCSET(x, y) \
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do { \
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t = TOBCD(dt->dt_ ## y) & 0xff; \
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rs5c313_write_reg(sc, RS5C313_ ## x ## 1, t & 0x0f); \
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rs5c313_write_reg(sc, RS5C313_ ## x ## 10, (t >> 4) & 0x0f); \
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} while (/* CONSTCOND */0)
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RTCSET(SEC, sec);
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RTCSET(MIN, min);
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RTCSET(HOUR, hour);
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RTCSET(DAY, day);
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RTCSET(MON, mon);
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#undef RTCSET
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t = dt->dt_year % 100;
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t = TOBCD(t);
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rs5c313_write_reg(sc, RS5C313_YEAR1, t & 0x0f);
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rs5c313_write_reg(sc, RS5C313_YEAR10, (t >> 4) & 0x0f);
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rs5c313_write_reg(sc, RS5C313_WDAY, dt->dt_wday);
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rtc_ce(sc, 0);
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splx(s);
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sc->sc_valid = 1;
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return 0;
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}
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static int
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rs5c313_read_reg(struct rs5c313_softc *sc, int addr)
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{
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int data;
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/* output */
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rtc_dir(sc, 1);
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/* control */
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rtc_do(sc, 1); /* ignored */
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rtc_do(sc, 1); /* R/#W = 1(READ) */
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rtc_do(sc, 1); /* AD = 1 */
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rtc_do(sc, 0); /* DT = 0 */
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/* address */
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rtc_do(sc, addr & 0x8); /* A3 */
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rtc_do(sc, addr & 0x4); /* A2 */
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rtc_do(sc, addr & 0x2); /* A1 */
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rtc_do(sc, addr & 0x1); /* A0 */
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/* input */
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rtc_dir(sc, 0);
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/* ignore */
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(void)rtc_di(sc);
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(void)rtc_di(sc);
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(void)rtc_di(sc);
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(void)rtc_di(sc);
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/* data */
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data = rtc_di(sc); /* D3 */
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data <<= 1;
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data |= rtc_di(sc); /* D2 */
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data <<= 1;
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data |= rtc_di(sc); /* D1 */
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data <<= 1;
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data |= rtc_di(sc); /* D0 */
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return data;
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}
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static void
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rs5c313_write_reg(struct rs5c313_softc *sc, int addr, int data)
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{
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/* output */
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rtc_dir(sc, 1);
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/* control */
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rtc_do(sc, 1); /* ignored */
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rtc_do(sc, 0); /* R/#W = 0 (WRITE) */
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rtc_do(sc, 1); /* AD = 1 */
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rtc_do(sc, 0); /* DT = 0 */
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/* address */
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rtc_do(sc, addr & 0x8); /* A3 */
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rtc_do(sc, addr & 0x4); /* A2 */
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rtc_do(sc, addr & 0x2); /* A1 */
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rtc_do(sc, addr & 0x1); /* A0 */
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/* control */
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rtc_do(sc, 1); /* ignored */
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rtc_do(sc, 0); /* R/#W = 0(WRITE) */
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rtc_do(sc, 0); /* AD = 0 */
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rtc_do(sc, 1); /* DT = 1 */
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/* data */
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rtc_do(sc, data & 0x8); /* D3 */
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rtc_do(sc, data & 0x4); /* D2 */
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rtc_do(sc, data & 0x2); /* D1 */
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rtc_do(sc, data & 0x1); /* D0 */
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}
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