281 lines
9.3 KiB
C
281 lines
9.3 KiB
C
/* $NetBSD: i82596var.h,v 1.15 2009/12/01 23:16:01 skrll Exp $ */
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/*
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* Copyright (c) 2003 Jochen Kunz.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. The name of Jochen Kunz may not be used to endorse or promote
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* products derived from this software without specific prior
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* written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY JOCHEN KUNZ
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL JOCHEN KUNZ
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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/* All definitions are for a Intel 82596 DX/SX / CA in linear 32 bit mode. */
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/* Supported chip variants */
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extern const char *i82596_typenames[];
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enum i82596_types { I82596_UNKNOWN, I82596_DX, I82596_CA };
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/* System Configuration Pointer */
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struct iee_scp {
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volatile uint16_t scp_pad1;
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volatile uint16_t scp_sysbus; /* Sysbus Byte */
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volatile uint32_t scp_pad2;
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volatile uint32_t scp_iscp_addr; /* Int. Sys. Conf. Pointer */
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} __packed;
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/* Intermediate System Configuration Pointer */
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struct iee_iscp {
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volatile uint16_t iscp_busy; /* Even Word, bits 0..15 */
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volatile uint16_t iscp_pad; /* Odd Word, bits 16..32 */
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volatile uint32_t iscp_scb_addr; /* address of SCB */
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} __packed;
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/* System Control Block */
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struct iee_scb {
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volatile uint16_t scb_status; /* Status Bits */
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volatile uint16_t scb_cmd; /* Command Bits */
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volatile uint32_t scb_cmd_blk_addr; /* Command Block Address */
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volatile uint32_t scb_rfa_addr; /* Receive Frame Area Address */
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volatile uint32_t scb_crc_err; /* CRC Errors */
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volatile uint32_t scb_align_err; /* Alignment Errors */
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volatile uint32_t scb_resource_err; /* Resource Errors [1] */
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volatile uint32_t scb_overrun_err; /* Overrun Errors [1] */
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volatile uint32_t scb_rcvcdt_err; /* RCVCDT Errors [1] */
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volatile uint32_t scb_short_fr_err; /* Short Frame Errors */
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volatile uint16_t scb_tt_off; /* Bus Throtle Off Timer */
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volatile uint16_t scb_tt_on; /* Bus Throtle On Timer */
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} __packed;
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/* [1] In MONITOR mode these counters change function. */
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/* Command Block */
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struct iee_cb {
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volatile uint16_t cb_status; /* Status Bits */
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volatile uint16_t cb_cmd; /* Command Bits */
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volatile uint32_t cb_link_addr; /* Link Address to next CMD */
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union {
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volatile uint8_t cb_ind_addr[8];/* Individual Address */
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volatile uint8_t cb_cf[16]; /* Configuration Bytes */
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struct {
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volatile uint16_t mc_size;/* Num bytes of Mcast Addr.*/
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volatile uint8_t mc_addrs[6]; /* List of Mcast Addr. */
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} cb_mcast;
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struct {
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volatile uint32_t tx_tbd_addr;/* TX Buf. Descr. Addr.*/
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volatile uint16_t tx_tcb_count; /* Len. of opt. data */
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volatile uint16_t tx_pad;
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volatile uint8_t tx_dest_addr[6]; /* Dest. Addr. */
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volatile uint16_t tx_length; /* Length of data */
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/* uint8_t data; Data to send, optional */
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} cb_transmit;
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volatile uint32_t cb_tdr; /* Time & Flags from TDR CMD */
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volatile uint32_t cb_dump_addr; /* Address of Dump buffer */
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};
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} __packed;
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/* Transmit Buffer Descriptor */
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struct iee_tbd {
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volatile uint16_t tbd_size; /* Size of buffer & Flags */
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volatile uint16_t tbd_pad;
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volatile uint32_t tbd_link_addr; /* Link Address to next RFD */
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volatile uint32_t tbd_tb_addr; /* Transmit Buffer Address */
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} __packed;
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/* Receive Frame Descriptor */
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struct iee_rfd {
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volatile uint16_t rfd_status; /* Status Bits */
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volatile uint16_t rfd_cmd; /* Command Bits */
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volatile uint32_t rfd_link_addr; /* Link Address to next RFD */
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volatile uint32_t rfd_rbd_addr; /* Address of first free RBD */
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volatile uint16_t rfd_count; /* Actual Count */
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volatile uint16_t rfd_size; /* Size */
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volatile uint8_t rfd_dest_addr[6]; /* Destination Address */
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volatile uint8_t rfd_src_addr[6]; /* Source Address */
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volatile uint16_t rfd_length; /* Length Field */
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volatile uint16_t rfd_pad; /* Optional Data */
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} __packed;
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/* Receive Buffer Descriptor */
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struct iee_rbd {
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volatile uint16_t rbd_count; /* Actual Cont of bytes */
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volatile uint16_t rbd_pad1;
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volatile uint32_t rbd_next_rbd; /* Address of Next RBD */
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volatile uint32_t rbd_rb_addr; /* Receive Buffer Address */
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volatile uint16_t rbd_size; /* Size of Receive Buffer */
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volatile uint16_t rbd_pad2;
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} __packed;
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#define IEE_NRFD 32 /* Number of RFDs == length of receive queue */
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#define IEE_NCB 32 /* Number of Command Blocks == transmit queue */
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#define IEE_NTBD 16 /* Number of TBDs per CB */
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struct iee_softc {
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device_t sc_dev; /* common device data */
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struct ifmedia sc_ifmedia; /* media interface */
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struct ethercom sc_ethercom; /* ethernet specific stuff */
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enum i82596_types sc_type;
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bus_dma_tag_t sc_dmat;
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bus_dmamap_t sc_shmem_map;
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bus_dma_segment_t sc_dma_segs;
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int sc_dma_rsegs;
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bus_dmamap_t sc_rx_map[IEE_NRFD];
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bus_dmamap_t sc_tx_map[IEE_NCB];
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struct mbuf *sc_rx_mbuf[IEE_NRFD];
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struct mbuf *sc_tx_mbuf[IEE_NCB];
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uint8_t *sc_shmem_addr;
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int sc_next_cb;
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int sc_next_tbd;
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int sc_rx_done;
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uint8_t sc_cf[14];
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int sc_flags;
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int sc_cl_align;
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int sc_scp_off;
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int sc_scp_sz;
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int sc_iscp_off;
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int sc_iscp_sz;
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int sc_scb_off;
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int sc_scb_sz;
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int sc_rfd_off;
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int sc_rfd_sz;
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int sc_rbd_off;
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int sc_rbd_sz;
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int sc_cb_off;
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int sc_cb_sz;
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int sc_tbd_off;
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int sc_tbd_sz;
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int sc_shmem_sz;
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uint32_t sc_sysbus;
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uint32_t sc_crc_err;
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uint32_t sc_align_err;
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uint32_t sc_resource_err;
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uint32_t sc_overrun_err;
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uint32_t sc_rcvcdt_err;
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uint32_t sc_short_fr_err;
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uint32_t sc_receive_err;
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uint32_t sc_tx_col;
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uint32_t sc_rx_err;
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uint32_t sc_cmd_err;
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uint32_t sc_tx_timeout;
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uint32_t sc_setup_timeout;
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int (*sc_iee_cmd)(struct iee_softc *, uint32_t);
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int (*sc_iee_reset)(struct iee_softc *);
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void (*sc_mediastatus)(struct ifnet *, struct ifmediareq *);
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int (*sc_mediachange)(struct ifnet *);
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};
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/* Flags */
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#define IEE_NEED_SWAP 0x01
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#define IEE_WANT_MCAST 0x02
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#define IEE_REV_A 0x04
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/*
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* Rev A1 chip doesn't have 32-bit BE mode and all 32 bit pointers are
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* treated as two 16-bit big endian entities.
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*/
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#define IEE_SWAPA32(x) ((sc->sc_flags & (IEE_NEED_SWAP|IEE_REV_A)) == \
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(IEE_NEED_SWAP|IEE_REV_A) ? \
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(((x) << 16) | ((x) >> 16)) : (x))
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/*
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* The SCB absolute address and statistical counters are
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* always treated as two 16-bit big endian entities
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* even in 32-bit BE mode supported by Rev B and C chips.
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*/
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#define IEE_SWAP32(x) ((sc->sc_flags & IEE_NEED_SWAP) != 0 ? \
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(((x) << 16) | ((x) >> 16)) : (x))
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#define IEE_PHYS_SHMEM(x) ((uint32_t) (sc->sc_shmem_map->dm_segs[0].ds_addr \
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+ (x)))
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#define SC_SCP(sc) ((struct iee_scp *)((sc)->sc_shmem_addr + \
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(sc)->sc_scp_off))
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#define SC_ISCP(sc) ((struct iee_iscp *)((sc)->sc_shmem_addr + \
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(sc)->sc_iscp_off))
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#define SC_SCB(sc) ((struct iee_scb *)((sc)->sc_shmem_addr + \
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(sc)->sc_scb_off))
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#define SC_RFD(sc, n) ((struct iee_rfd *)((sc)->sc_shmem_addr + \
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(sc)->sc_rfd_off + \
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(n) * (sc)->sc_rfd_sz))
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#define SC_RBD(sc, n) ((struct iee_rbd *)((sc)->sc_shmem_addr + \
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(sc)->sc_rbd_off + \
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(n) * (sc)->sc_rbd_sz))
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#define SC_CB(sc, n) ((struct iee_cb *)((sc)->sc_shmem_addr + \
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(sc)->sc_cb_off + \
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(n) * (sc)->sc_cb_sz))
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#define SC_TBD(sc, n) ((struct iee_tbd *)((sc)->sc_shmem_addr + \
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(sc)->sc_tbd_off + \
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(n) * (sc)->sc_tbd_sz))
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#define IEE_SCPSYNC(sc, ops) \
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bus_dmamap_sync((sc)->sc_dmat, (sc)->sc_shmem_map, \
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(sc)->sc_scb_off, (sc)->sc_scp_sz, (ops))
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#define IEE_ISCPSYNC(sc, ops) \
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bus_dmamap_sync((sc)->sc_dmat, (sc)->sc_shmem_map, \
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(sc)->sc_iscp_off, (sc)->sc_iscp_sz, (ops))
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#define IEE_SCBSYNC(sc, ops) \
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bus_dmamap_sync((sc)->sc_dmat, (sc)->sc_shmem_map, \
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(sc)->sc_scb_off, (sc)->sc_scb_sz, (ops))
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#define IEE_RFDSYNC(sc, n, ops) \
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bus_dmamap_sync((sc)->sc_dmat, (sc)->sc_shmem_map, \
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(sc)->sc_rfd_off + (n) * (sc)->sc_rfd_sz, \
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(sc)->sc_rfd_sz, (ops))
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#define IEE_RBDSYNC(sc, n, ops) \
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bus_dmamap_sync((sc)->sc_dmat, (sc)->sc_shmem_map, \
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(sc)->sc_rbd_off + (n) * (sc)->sc_rbd_sz, \
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(sc)->sc_rbd_sz, (ops))
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#define IEE_CBSYNC(sc, n, ops) \
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bus_dmamap_sync((sc)->sc_dmat, (sc)->sc_shmem_map, \
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(sc)->sc_cb_off + (n) * (sc)->sc_cb_sz, \
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(sc)->sc_cb_sz, (ops))
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#define IEE_TBDSYNC(sc, n, ops) \
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bus_dmamap_sync((sc)->sc_dmat, (sc)->sc_shmem_map, \
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(sc)->sc_tbd_off + (n) * (sc)->sc_tbd_sz, \
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(sc)->sc_tbd_sz, (ops))
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void iee_attach(struct iee_softc *, uint8_t *, int *, int, int);
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void iee_detach(struct iee_softc *, int);
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int iee_intr(void *);
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