cd38c4da5c
require that the DMA receive buffers be aligned. The driver was deliberately mis-aligning by 2 bytes, to force the layer-2/3 headers to 32-bit alignment. Workaround: if chip is a 5701, and is in PCI-X mode, leave the DMA buffers aligned. If the host CPU requires alignment, copy the buffer after reception to force aligment. Tested on an i386 in PCI-X bus, with __NO_STRICT_ALIGNMENT forced off. Patch and comments reworked to minimize drift from FreeBSD if_bge.c rev 1.14. |
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