e388b581bd
ibm405d5 core. OK by Simon Burge
192 lines
4.8 KiB
ArmAsm
192 lines
4.8 KiB
ArmAsm
/* $NetBSD: virtex_start.S,v 1.1 2006/12/02 22:18:47 freza Exp $ */
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/*
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* Copyright (c) 2006 Jachym Holecek
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* All rights reserved.
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*
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* Written for DFC Design, s.r.o.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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*
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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/*
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* This file is based on startup code of Walnut and Explora boards.
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*/
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#define _NOREGNAMES
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#include "opt_ddb.h"
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#include "opt_ipkdb.h"
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#include "opt_lockdebug.h"
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#include "opt_multiprocessor.h"
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#include "opt_ppcarch.h"
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#include "opt_ppcparam.h"
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#include "opt_virtex.h"
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#include "assym.h"
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#include "ksyms.h"
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#include <sys/syscall.h>
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#include <machine/param.h>
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#include <machine/psl.h>
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#include <machine/trap.h>
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#include <machine/asm.h>
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#include <powerpc/spr.h>
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#include <powerpc/ibm4xx/dcr405gp.h>
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#include <powerpc/ibm4xx/pmap.h>
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/* N megabytes. */
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#define MB(n) ((n)*1024*1024)
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/* Set bit (beginning with MSB) for each 128MB of RAM. */
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#define PHYSMEM_REGIONS_MASK ~((1 << (32 - MB(PHYSMEM)/MB(128))) - 1)
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/* Initialized by INIT_CPUINFO(), used by machdep.c */
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GLOBAL(proc0paddr)
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.long 0 /* proc0 p_addr */
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/* For kvm_mkdb, supposed to mark the start of kernel text. */
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.text
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.globl _C_LABEL(kernel_text)
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_C_LABEL(kernel_text):
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/* Startup entry. This must be the first thing in the text segment! */
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.text
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.globl __start
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__start:
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/* Disable MMU/exceptions */
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lis %r0, 0
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mtmsr %r0
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/* Disable timers */
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lis %r0, 0
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mttcr %r0
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sync
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isync
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/* Disable caches */
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mtdccr %r0
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mticcr %r0
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sync
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isync
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/* Invalidate I$, operands ignored on the 405 */
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li %r0,0 /* just in case... */
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iccci %r0,%r0
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/* Invalidate D$, hardcoded for 16KB size, 32B line */
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li %r7,256 /* # of congruence classes */
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mtctr %r7
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li %r6,0
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1:
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dccci %r0,%r6 /* invalidates both ways */
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addi %r6,%r6,32
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bdnz 1b
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/*
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* Errata 213: Incorrect data may be flushed from the data cache.
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* Cores: PPC405D5X1, PPC405D5X2
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* Workaround: #1, CCR0 modification sequence #2
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* Note: Meaning of bits we need to set is undocumented.
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*/
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sync
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mfccr0 %r0
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oris %r0,%r0,0x50000000@h
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mtccr0 %r0
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isync
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/*
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* Errata 58: Load string instructions may write incorrect
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* data into the last GPR targeted in operation.
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* Cores: PPC405GP
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* Workaround: set OCM0_DSCNTL[DSEN]=0 and OCM0_DSCNTL[DOF]=0
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*/
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mtdcr DCR_OCM0_DSCNTL,%r0 /* Disable Data access to OCM */
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#if 0
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/* Allow cacheing for whole RAM. */
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lis %r0,PHYSMEM_REGIONS_MASK@ha
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ori %r0,%r0,PHYSMEM_REGIONS_MASK@l
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#else
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#ifndef PPC_4XX_NOCACHE
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/* Allow cacheing for only the first 1GB of RAM */
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lis %r0,0xff00
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mtdccr %r0
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mticcr %r0
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#endif /* PPC_4XX_NOCACHE */
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#endif
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/* Invalidate all TLB entries */
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tlbia
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sync
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isync
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/* Set kernel MMU context, we'll enable MMU in initppc() */
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li %r0,KERNEL_PID
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mtpid %r0
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sync
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isync
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/* Setup endkernel argument for initppc() and INIT_CPUINFO */
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lis %r4,_C_LABEL(end)@h
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ori %r4,%r4,_C_LABEL(end)@l
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/* Clear .bss segment */
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lis %r7,_C_LABEL(edata)-4@h
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ori %r7,%r7,_C_LABEL(edata)-4@l
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li %r3,0
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2: stwu %r3,4(%r7)
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cmpw %r7,%r4
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bne+ 2b
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#if NKSYMS || defined(DDB) || defined(LKM)
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/* We don't have a symbol table, so set startsym = endsym = end */
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lis %r7,_C_LABEL(startsym)@ha
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ori %r7,%r7,_C_LABEL(startsym)@l
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stw %r4,0(%r7)
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lis %r7,_C_LABEL(endsym)@ha
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ori %r7,%r7,_C_LABEL(endsym)@l
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stw %r4,0(%r7)
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#endif
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/* INIT_CPUINFO will 'addi', so clean up. */
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lis %r1,0
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INIT_CPUINFO(4,1,9,0)
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/* startkernel argument for initppc */
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lis %r3,__start@h
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addi %r3,%r3,__start@l
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bl _C_LABEL(initppc)
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bl _C_LABEL(main)
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loop: /* UNREACHED */
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b loop
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#include <powerpc/ibm4xx/4xx_locore.S>
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