319 lines
8.6 KiB
C
319 lines
8.6 KiB
C
/* $NetBSD: plumpower.c,v 1.4 2000/03/25 15:08:26 uch Exp $ */
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/*
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* Copyright (c) 1999, 2000, by UCHIYAMA Yasushi
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. The name of the developer may NOT be used to endorse or promote products
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* derived from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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*/
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#undef PLUMPOWERDEBUG
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#include "opt_tx39_debug.h"
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/device.h>
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#include <sys/malloc.h>
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#include <machine/bus.h>
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#include <machine/intr.h>
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#include <hpcmips/tx/tx39var.h>
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#include <hpcmips/dev/plumvar.h>
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#include <hpcmips/dev/plumpowervar.h>
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#include <hpcmips/dev/plumpowerreg.h>
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#ifdef PLUMPOWERDEBUG
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int plumpower_debug = 1;
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#define DPRINTF(arg) if (plumpower_debug) printf arg;
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#define DPRINTFN(n, arg) if (plumpower_debug > (n)) printf arg;
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#else
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#define DPRINTF(arg)
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#define DPRINTFN(n, arg)
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#endif
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int plumpower_match __P((struct device*, struct cfdata*, void*));
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void plumpower_attach __P((struct device*, struct device*, void*));
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struct plumpower_softc {
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struct device sc_dev;
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plum_chipset_tag_t sc_pc;
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bus_space_tag_t sc_regt;
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bus_space_handle_t sc_regh;
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};
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struct cfattach plumpower_ca = {
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sizeof(struct plumpower_softc), plumpower_match, plumpower_attach
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};
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void plumpower_dump __P((struct plumpower_softc*));
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int
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plumpower_match(parent, cf, aux)
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struct device *parent;
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struct cfdata *cf;
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void *aux;
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{
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return 2; /* 1st attach group */
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}
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void
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plumpower_attach(parent, self, aux)
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struct device *parent;
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struct device *self;
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void *aux;
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{
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struct plum_attach_args *pa = aux;
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struct plumpower_softc *sc = (void*)self;
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printf("\n");
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sc->sc_pc = pa->pa_pc;
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sc->sc_regt = pa->pa_regt;
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if (bus_space_map(sc->sc_regt, PLUM_POWER_REGBASE,
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PLUM_POWER_REGSIZE, 0, &sc->sc_regh)) {
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printf(": register map failed\n");
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return;
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}
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plum_conf_register_power(sc->sc_pc, (void*)sc);
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#ifdef PLUMPOWERDEBUG
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plumpower_dump(sc);
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#endif
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/* disable all power/clock */
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plum_conf_write(sc->sc_regt, sc->sc_regh,
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PLUM_POWER_PWRCONT_REG, 0);
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plum_conf_write(sc->sc_regt, sc->sc_regh,
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PLUM_POWER_CLKCONT_REG, 0);
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delay(300 * 1000);
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/* enable MCS interface from TX3922 */
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plum_conf_write(sc->sc_regt, sc->sc_regh, PLUM_POWER_INPENA_REG,
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PLUM_POWER_INPENA);
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}
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void
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plum_power_ioreset(pc)
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plum_chipset_tag_t pc;
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{
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struct plumpower_softc *sc = pc->pc_powert;
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bus_space_tag_t regt = sc->sc_regt;
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bus_space_handle_t regh = sc->sc_regh;
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plum_conf_write(regt, regh, PLUM_POWER_RESETC_REG,
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PLUM_POWER_RESETC_IO5CL1 |
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PLUM_POWER_RESETC_IO5CL1);
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delay(100*1000);
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plum_conf_write(regt, regh, PLUM_POWER_RESETC_REG, 0);
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delay(100*1000);
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}
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void*
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plum_power_establish(pc, src)
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plum_chipset_tag_t pc;
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int src;
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{
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struct plumpower_softc *sc = pc->pc_powert;
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bus_space_tag_t regt = sc->sc_regt;
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bus_space_handle_t regh = sc->sc_regh;
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plumreg_t pwrreg, clkreg;
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pwrreg = plum_conf_read(regt, regh, PLUM_POWER_PWRCONT_REG);
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clkreg = plum_conf_read(regt, regh, PLUM_POWER_CLKCONT_REG);
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switch(src) {
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default:
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panic("plum_power_establish: unknown power source");
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case PLUM_PWR_LCD:
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pwrreg |= PLUM_POWER_PWRCONT_LCDPWR;
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plum_conf_write(regt, regh, PLUM_POWER_PWRCONT_REG, pwrreg);
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pwrreg |= PLUM_POWER_PWRCONT_LCDDSP;
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plum_conf_write(regt, regh, PLUM_POWER_PWRCONT_REG, pwrreg);
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pwrreg |= PLUM_POWER_PWRCONT_LCDOE;
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plum_conf_write(regt, regh, PLUM_POWER_PWRCONT_REG, pwrreg);
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break;
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case PLUM_PWR_BKL:
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pwrreg |= PLUM_POWER_PWRCONT_BKLIGHT;
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break;
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case PLUM_PWR_IO5:
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/* reset I/O bus (High/Low) */
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plum_power_ioreset(pc);
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/* supply power */
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pwrreg |= PLUM_POWER_PWRCONT_IO5PWR;
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plum_conf_write(regt, regh, PLUM_POWER_PWRCONT_REG, pwrreg);
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delay(300*1000);
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/* output enable & supply clock */
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pwrreg |= PLUM_POWER_PWRCONT_IO5OE;
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clkreg |= PLUM_POWER_CLKCONT_IO5CLK;
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break;
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case PLUM_PWR_EXTPW0:
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pwrreg |= PLUM_POWER_PWRCONT_EXTPW0;
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break;
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case PLUM_PWR_EXTPW1:
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pwrreg |= PLUM_POWER_PWRCONT_EXTPW1;
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break;
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case PLUM_PWR_EXTPW2:
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pwrreg |= PLUM_POWER_PWRCONT_EXTPW2;
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break;
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case PLUM_PWR_USB:
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/* output enable */
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pwrreg |= PLUM_POWER_PWRCONT_USBEN;
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/* supply clock to the USB host controller */
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clkreg |= PLUM_POWER_CLKCONT_USBCLK1;
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#if 1
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/*
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* clock supply is adaptively controlled by hardware
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* (recommended)
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*/
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clkreg &= ~PLUM_POWER_CLKCONT_USBCLK2;
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#else
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/* clock is always supplied while USBCLK=1 */
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clkreg |= PLUM_POWER_CLKCONT_USBCLK2;
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#endif
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break;
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case PLUM_PWR_SM:
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clkreg |= PLUM_POWER_CLKCONT_SMCLK;
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break;
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case PLUM_PWR_PCC1:
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clkreg |= PLUM_POWER_CLKCONT_PCCCLK1;
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break;
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case PLUM_PWR_PCC2:
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clkreg |= PLUM_POWER_CLKCONT_PCCCLK2;
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break;
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}
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plum_conf_write(regt, regh, PLUM_POWER_PWRCONT_REG, pwrreg);
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delay(300*1000);
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plum_conf_write(regt, regh, PLUM_POWER_CLKCONT_REG, clkreg);
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delay(300*1000);
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#ifdef PLUMPOWERDEBUG
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plumpower_dump(sc);
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#endif
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return (void*)src;
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}
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void
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plum_power_disestablish(pc, ph)
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plum_chipset_tag_t pc;
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int ph;
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{
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struct plumpower_softc *sc = pc->pc_powert;
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bus_space_tag_t regt = sc->sc_regt;
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bus_space_handle_t regh = sc->sc_regh;
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int src = (int)ph;
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plumreg_t pwrreg, clkreg;
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pwrreg = plum_conf_read(regt, regh, PLUM_POWER_PWRCONT_REG);
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clkreg = plum_conf_read(regt, regh, PLUM_POWER_CLKCONT_REG);
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switch(src) {
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default:
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panic("plum_power_disestablish: unknown power source");
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case PLUM_PWR_LCD:
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pwrreg &= ~(PLUM_POWER_PWRCONT_LCDOE |
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PLUM_POWER_PWRCONT_LCDPWR |
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PLUM_POWER_PWRCONT_LCDDSP);
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break;
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case PLUM_PWR_BKL:
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pwrreg &= ~PLUM_POWER_PWRCONT_BKLIGHT;
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break;
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case PLUM_PWR_IO5:
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pwrreg &= ~(PLUM_POWER_PWRCONT_IO5PWR |
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PLUM_POWER_PWRCONT_IO5OE);
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clkreg &= ~PLUM_POWER_CLKCONT_IO5CLK;
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break;
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case PLUM_PWR_EXTPW0:
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pwrreg &= ~PLUM_POWER_PWRCONT_EXTPW0;
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break;
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case PLUM_PWR_EXTPW1:
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pwrreg &= ~PLUM_POWER_PWRCONT_EXTPW1;
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break;
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case PLUM_PWR_EXTPW2:
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pwrreg &= ~PLUM_POWER_PWRCONT_EXTPW2;
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break;
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case PLUM_PWR_USB:
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pwrreg &= ~PLUM_POWER_PWRCONT_USBEN;
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clkreg &= ~(PLUM_POWER_CLKCONT_USBCLK1 |
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PLUM_POWER_CLKCONT_USBCLK2);
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break;
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case PLUM_PWR_SM:
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clkreg &= ~PLUM_POWER_CLKCONT_SMCLK;
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break;
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case PLUM_PWR_PCC1:
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clkreg &= ~PLUM_POWER_CLKCONT_PCCCLK1;
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break;
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case PLUM_PWR_PCC2:
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clkreg &= ~PLUM_POWER_CLKCONT_PCCCLK2;
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break;
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}
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plum_conf_write(regt, regh, PLUM_POWER_PWRCONT_REG, pwrreg);
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plum_conf_write(regt, regh, PLUM_POWER_CLKCONT_REG, clkreg);
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#ifdef PLUMPOWERDEBUG
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plumpower_dump(sc);
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#endif
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}
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#define ISPOWERSUPPLY(r, m) __is_set_print(r, PLUM_POWER_PWRCONT_##m, #m)
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#define ISCLOCKSUPPLY(r, m) __is_set_print(r, PLUM_POWER_CLKCONT_##m, #m)
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void
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plumpower_dump(sc)
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struct plumpower_softc *sc;
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{
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bus_space_tag_t regt = sc->sc_regt;
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bus_space_handle_t regh = sc->sc_regh;
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plumreg_t reg;
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reg = plum_conf_read(regt, regh, PLUM_POWER_PWRCONT_REG);
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printf(" power:");
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ISPOWERSUPPLY(reg, USBEN);
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ISPOWERSUPPLY(reg, IO5OE);
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ISPOWERSUPPLY(reg, LCDOE);
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ISPOWERSUPPLY(reg, EXTPW2);
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ISPOWERSUPPLY(reg, EXTPW1);
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ISPOWERSUPPLY(reg, EXTPW0);
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ISPOWERSUPPLY(reg, IO5PWR);
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ISPOWERSUPPLY(reg, BKLIGHT);
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ISPOWERSUPPLY(reg, LCDPWR);
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ISPOWERSUPPLY(reg, LCDDSP);
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reg = plum_conf_read(regt, regh, PLUM_POWER_CLKCONT_REG);
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printf("\n clock:");
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ISCLOCKSUPPLY(reg, USBCLK2);
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ISCLOCKSUPPLY(reg, USBCLK1);
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ISCLOCKSUPPLY(reg, IO5CLK);
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ISCLOCKSUPPLY(reg, SMCLK);
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ISCLOCKSUPPLY(reg, PCCCLK2);
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ISCLOCKSUPPLY(reg, PCCCLK1);
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reg = plum_conf_read(regt, regh, PLUM_POWER_INPENA_REG);
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printf("\n MCS interface %sebled",
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reg & PLUM_POWER_INPENA ? "en" : "dis");
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reg = plum_conf_read(regt, regh, PLUM_POWER_RESETC_REG);
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printf("\n IO5 reset:%s %s",
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reg & PLUM_POWER_RESETC_IO5CL0 ? "CLRL" : "",
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reg & PLUM_POWER_RESETC_IO5CL1 ? "CLRH" : "");
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printf("\n");
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}
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