368 lines
9.8 KiB
C
368 lines
9.8 KiB
C
/* $NetBSD: ds1307.c,v 1.8 2007/01/12 19:33:21 cube Exp $ */
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/*
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* Copyright (c) 2003 Wasabi Systems, Inc.
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* All rights reserved.
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*
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* Written by Steve C. Woodford and Jason R. Thorpe for Wasabi Systems, Inc.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed for the NetBSD Project by
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* Wasabi Systems, Inc.
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* 4. The name of Wasabi Systems, Inc. may not be used to endorse
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* or promote products derived from this software without specific prior
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* written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/device.h>
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#include <sys/kernel.h>
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#include <sys/fcntl.h>
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#include <sys/uio.h>
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#include <sys/conf.h>
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#include <sys/event.h>
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#include <dev/clock_subr.h>
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#include <dev/i2c/i2cvar.h>
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#include <dev/i2c/ds1307reg.h>
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struct dsrtc_softc {
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struct device sc_dev;
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i2c_tag_t sc_tag;
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int sc_address;
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int sc_open;
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struct todr_chip_handle sc_todr;
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};
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static void dsrtc_attach(struct device *, struct device *, void *);
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static int dsrtc_match(struct device *, struct cfdata *, void *);
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CFATTACH_DECL(dsrtc, sizeof(struct dsrtc_softc),
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dsrtc_match, dsrtc_attach, NULL, NULL);
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extern struct cfdriver dsrtc_cd;
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dev_type_open(dsrtc_open);
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dev_type_close(dsrtc_close);
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dev_type_read(dsrtc_read);
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dev_type_write(dsrtc_write);
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const struct cdevsw dsrtc_cdevsw = {
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dsrtc_open, dsrtc_close, dsrtc_read, dsrtc_write, noioctl,
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nostop, notty, nopoll, nommap, nokqfilter, D_OTHER
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};
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static int dsrtc_clock_read(struct dsrtc_softc *, struct clock_ymdhms *);
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static int dsrtc_clock_write(struct dsrtc_softc *, struct clock_ymdhms *);
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static int dsrtc_gettime(struct todr_chip_handle *, struct clock_ymdhms *);
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static int dsrtc_settime(struct todr_chip_handle *, struct clock_ymdhms *);
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static int
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dsrtc_match(struct device *parent, struct cfdata *cf, void *arg)
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{
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struct i2c_attach_args *ia = arg;
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if (ia->ia_addr == DS1307_ADDR)
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return (1);
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return (0);
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}
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static void
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dsrtc_attach(struct device *parent, struct device *self, void *arg)
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{
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struct dsrtc_softc *sc = device_private(self);
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struct i2c_attach_args *ia = arg;
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aprint_naive(": Real-time Clock/NVRAM\n");
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aprint_normal(": DS1307 Real-time Clock/NVRAM\n");
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sc->sc_tag = ia->ia_tag;
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sc->sc_address = ia->ia_addr;
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sc->sc_open = 0;
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sc->sc_todr.cookie = sc;
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sc->sc_todr.todr_gettime = NULL;
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sc->sc_todr.todr_settime = NULL;
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sc->sc_todr.todr_gettime_ymdhms = dsrtc_gettime;
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sc->sc_todr.todr_settime_ymdhms = dsrtc_settime;
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sc->sc_todr.todr_setwen = NULL;
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todr_attach(&sc->sc_todr);
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}
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/*ARGSUSED*/
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int
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dsrtc_open(dev_t dev, int flag, int fmt, struct lwp *l)
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{
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struct dsrtc_softc *sc;
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if ((sc = device_lookup(&dsrtc_cd, minor(dev))) == NULL)
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return (ENXIO);
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/* XXX: Locking */
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if (sc->sc_open)
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return (EBUSY);
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sc->sc_open = 1;
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return (0);
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}
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/*ARGSUSED*/
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int
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dsrtc_close(dev_t dev, int flag, int fmt, struct lwp *l)
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{
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struct dsrtc_softc *sc;
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if ((sc = device_lookup(&dsrtc_cd, minor(dev))) == NULL)
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return (ENXIO);
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sc->sc_open = 0;
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return (0);
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}
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/*ARGSUSED*/
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int
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dsrtc_read(dev_t dev, struct uio *uio, int flags)
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{
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struct dsrtc_softc *sc;
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u_int8_t ch, cmdbuf[1];
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int a, error;
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if ((sc = device_lookup(&dsrtc_cd, minor(dev))) == NULL)
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return (ENXIO);
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if (uio->uio_offset >= DS1307_NVRAM_SIZE)
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return (EINVAL);
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if ((error = iic_acquire_bus(sc->sc_tag, 0)) != 0)
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return (error);
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while (uio->uio_resid && uio->uio_offset < DS1307_NVRAM_SIZE) {
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a = (int)uio->uio_offset;
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cmdbuf[0] = a + DS1307_NVRAM_START;
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if ((error = iic_exec(sc->sc_tag, I2C_OP_READ_WITH_STOP,
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sc->sc_address, cmdbuf, 1,
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&ch, 1, 0)) != 0) {
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iic_release_bus(sc->sc_tag, 0);
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printf("%s: dsrtc_read: read failed at 0x%x\n",
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sc->sc_dev.dv_xname, a);
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return (error);
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}
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if ((error = uiomove(&ch, 1, uio)) != 0) {
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iic_release_bus(sc->sc_tag, 0);
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return (error);
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}
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}
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iic_release_bus(sc->sc_tag, 0);
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return (0);
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}
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/*ARGSUSED*/
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int
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dsrtc_write(dev_t dev, struct uio *uio, int flags)
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{
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struct dsrtc_softc *sc;
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u_int8_t cmdbuf[2];
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int a, error;
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if ((sc = device_lookup(&dsrtc_cd, minor(dev))) == NULL)
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return (ENXIO);
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if (uio->uio_offset >= DS1307_NVRAM_SIZE)
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return (EINVAL);
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if ((error = iic_acquire_bus(sc->sc_tag, 0)) != 0)
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return (error);
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while (uio->uio_resid && uio->uio_offset < DS1307_NVRAM_SIZE) {
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a = (int)uio->uio_offset;
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cmdbuf[0] = a + DS1307_NVRAM_START;
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if ((error = uiomove(&cmdbuf[1], 1, uio)) != 0)
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break;
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if ((error = iic_exec(sc->sc_tag,
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uio->uio_resid ? I2C_OP_WRITE : I2C_OP_WRITE_WITH_STOP,
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sc->sc_address, cmdbuf, 1, &cmdbuf[1], 1, 0)) != 0) {
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printf("%s: dsrtc_write: write failed at 0x%x\n",
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sc->sc_dev.dv_xname, a);
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break;
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}
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}
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iic_release_bus(sc->sc_tag, 0);
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return (error);
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}
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static int
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dsrtc_gettime(struct todr_chip_handle *ch, struct clock_ymdhms *dt)
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{
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struct dsrtc_softc *sc = ch->cookie;
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struct clock_ymdhms check;
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int retries;
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memset(dt, 0, sizeof(*dt));
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memset(&check, 0, sizeof(check));
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/*
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* Since we don't support Burst Read, we have to read the clock twice
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* until we get two consecutive identical results.
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*/
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retries = 5;
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do {
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dsrtc_clock_read(sc, dt);
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dsrtc_clock_read(sc, &check);
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} while (memcmp(dt, &check, sizeof(check)) != 0 && --retries);
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return (0);
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}
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static int
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dsrtc_settime(struct todr_chip_handle *ch, struct clock_ymdhms *dt)
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{
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struct dsrtc_softc *sc = ch->cookie;
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if (dsrtc_clock_write(sc, dt) == 0)
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return (-1);
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return (0);
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}
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static int
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dsrtc_clock_read(struct dsrtc_softc *sc, struct clock_ymdhms *dt)
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{
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u_int8_t bcd[DS1307_NRTC_REGS], cmdbuf[1];
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int i;
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if (iic_acquire_bus(sc->sc_tag, I2C_F_POLL)) {
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printf("%s: dsrtc_clock_read: failed to acquire I2C bus\n",
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sc->sc_dev.dv_xname);
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return (0);
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}
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/* Read each RTC register in order. */
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for (i = DS1307_SECONDS; i < DS1307_NRTC_REGS; i++) {
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cmdbuf[0] = i;
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if (iic_exec(sc->sc_tag, I2C_OP_READ_WITH_STOP,
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sc->sc_address, cmdbuf, 1,
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&bcd[i], 1, I2C_F_POLL)) {
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iic_release_bus(sc->sc_tag, I2C_F_POLL);
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printf("%s: dsrtc_clock_read: failed to read rtc "
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"at 0x%x\n", sc->sc_dev.dv_xname, i);
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return (0);
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}
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}
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/* Done with I2C */
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iic_release_bus(sc->sc_tag, I2C_F_POLL);
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/*
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* Convert the DS1307's register values into something useable
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*/
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dt->dt_sec = FROMBCD(bcd[DS1307_SECONDS] & DS1307_SECONDS_MASK);
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dt->dt_min = FROMBCD(bcd[DS1307_MINUTES] & DS1307_MINUTES_MASK);
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if ((bcd[DS1307_HOURS] & DS1307_HOURS_24HRS) == 0) {
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dt->dt_hour = FROMBCD(bcd[DS1307_HOURS] &
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DS1307_HOURS_12MASK);
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if (bcd[DS1307_HOURS] & DS1307_HOURS_12HRS_PM)
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dt->dt_hour += 12;
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} else {
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dt->dt_hour = FROMBCD(bcd[DS1307_HOURS] &
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DS1307_HOURS_24MASK);
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}
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dt->dt_day = FROMBCD(bcd[DS1307_DATE] & DS1307_DATE_MASK);
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dt->dt_mon = FROMBCD(bcd[DS1307_MONTH] & DS1307_MONTH_MASK);
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/* XXX: Should be an MD way to specify EPOCH used by BIOS/Firmware */
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dt->dt_year = FROMBCD(bcd[DS1307_YEAR]) + POSIX_BASE_YEAR;
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return (1);
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}
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static int
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dsrtc_clock_write(struct dsrtc_softc *sc, struct clock_ymdhms *dt)
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{
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uint8_t bcd[DS1307_NRTC_REGS], cmdbuf[2];
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int i;
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/*
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* Convert our time representation into something the DS1307
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* can understand.
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*/
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bcd[DS1307_SECONDS] = TOBCD(dt->dt_sec);
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bcd[DS1307_MINUTES] = TOBCD(dt->dt_min);
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bcd[DS1307_HOURS] = TOBCD(dt->dt_hour) | DS1307_HOURS_24HRS;
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bcd[DS1307_DATE] = TOBCD(dt->dt_day);
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bcd[DS1307_DAY] = TOBCD(dt->dt_wday);
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bcd[DS1307_MONTH] = TOBCD(dt->dt_mon);
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bcd[DS1307_YEAR] = TOBCD((dt->dt_year - POSIX_BASE_YEAR) % 100);
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if (iic_acquire_bus(sc->sc_tag, I2C_F_POLL)) {
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printf("%s: dsrtc_clock_write: failed to acquire I2C bus\n",
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sc->sc_dev.dv_xname);
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return (0);
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}
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/* Stop the clock */
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cmdbuf[0] = DS1307_SECONDS;
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cmdbuf[1] = DS1307_SECONDS_CH;
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if (iic_exec(sc->sc_tag, I2C_OP_WRITE, sc->sc_address,
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cmdbuf, 1, &cmdbuf[1], 1, I2C_F_POLL)) {
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iic_release_bus(sc->sc_tag, I2C_F_POLL);
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printf("%s: dsrtc_clock_write: failed to Hold Clock\n",
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sc->sc_dev.dv_xname);
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return (0);
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}
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/*
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* Write registers in reverse order. The last write (to the Seconds
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* register) will undo the Clock Hold, above.
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*/
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for (i = DS1307_NRTC_REGS - 1; i >= 0; i--) {
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cmdbuf[0] = i;
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if (iic_exec(sc->sc_tag,
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i ? I2C_OP_WRITE : I2C_OP_WRITE_WITH_STOP,
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sc->sc_address, cmdbuf, 1, &bcd[i], 1,
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I2C_F_POLL)) {
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iic_release_bus(sc->sc_tag, I2C_F_POLL);
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printf("%s: dsrtc_clock_write: failed to write rtc "
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" at 0x%x\n", sc->sc_dev.dv_xname, i);
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/* XXX: Clock Hold is likely still asserted! */
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return (0);
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}
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}
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iic_release_bus(sc->sc_tag, I2C_F_POLL);
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return (1);
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}
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