04faabf071
for NEC's MIPS based EWS4800 workstations. Most porting work was done by UCHIYAMA Yasushi <uch@netbsd> http://mail-index.netbsd.org/port-mips/2004/06/27/0000.html and various cleanup, updating, and fixes have been done by me. Currently only EWS4800/350, 360, 360AD, 360ADII, 360EX and 360SX models are supported.
142 lines
3.4 KiB
C
142 lines
3.4 KiB
C
/* $NetBSD: cons_zs.c,v 1.1 2005/12/29 15:20:09 tsutsui Exp $ */
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/*-
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* Copyright (c) 2005 Izumi Tsutsui.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. The name of the author may not be used to endorse or promote products
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* derived from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <lib/libsa/stand.h>
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#include <lib/libkern/libkern.h>
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#include <dev/ic/z8530reg.h>
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#include <machine/sbd.h>
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#include "console.h"
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struct zs zs;
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static void zs_init(void);
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static int zs_cngetc(void);
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static int zs_cnscan(void);
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static void zs_cnputc(int, int, int);
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#define ZS_CONSDEFSPEED 9600
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void
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zs_set_addr(uint32_t csr, uint32_t data, int clock)
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{
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zs.csr = (volatile uint8_t *)csr;
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zs.data = (volatile uint8_t *)data;
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zs.clock = clock;
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cons.init = zs_init;
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cons.getc = zs_cngetc;
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cons.scan = zs_cnscan;
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cons.putc = zs_cnputc;
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}
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#define ZS_WRITE_REG(zs, reg, val) \
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do { \
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*zs.csr = reg; \
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*zs.csr = val; \
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} while (/* CONSTCOND */ 0)
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static void
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zs_init(void)
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{
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ZS_WRITE_REG(zs, 9, 0);
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ZS_WRITE_REG(zs, 9, ZSWR9_HARD_RESET);
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ZS_WRITE_REG(zs, 4, ZSWR4_CLK_X16 | ZSWR4_ONESB | ZSWR4_EVENP);
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ZS_WRITE_REG(zs, 10, 0x00);
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ZS_WRITE_REG(zs, 3, ZSWR3_RX_8);
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ZS_WRITE_REG(zs, 5, ZSWR5_TX_8 | ZSWR5_DTR | ZSWR5_RTS);
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ZS_WRITE_REG(zs, 6, 0x00);
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ZS_WRITE_REG(zs, 7, 0x00);
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ZS_WRITE_REG(zs, 14, ZSWR14_BAUD_FROM_PCLK);
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ZS_WRITE_REG(zs, 11, ZSWR11_RXCLK_BAUD | ZSWR11_TXCLK_BAUD);
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ZS_WRITE_REG(zs, 12, BPS_TO_TCONST(zs.clock / 16, ZS_CONSDEFSPEED));
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ZS_WRITE_REG(zs, 13, 0);
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ZS_WRITE_REG(zs, 14, ZSWR14_BAUD_FROM_PCLK | ZSWR14_BAUD_ENA);
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ZS_WRITE_REG(zs, 15, 0x00);
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*zs.csr = ZSWR0_RESET_STATUS;
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*zs.csr = ZSWR0_RESET_STATUS;
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ZS_WRITE_REG(zs, 3, ZSWR3_RX_8 | ZSWR3_RX_ENABLE);
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ZS_WRITE_REG(zs, 5,
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ZSWR5_TX_8 | ZSWR5_DTR | ZSWR5_RTS | ZSWR5_TX_ENABLE);
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}
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static int
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zs_cngetc(void)
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{
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int csr, data;
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do {
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csr = *zs.csr;
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} while ((csr & ZSRR0_RX_READY) == 0);
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data = *zs.data;
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return data;
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}
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int
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zs_cnscan(void)
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{
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int csr, data;
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csr = *zs.csr;
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if ((csr & ZSRR0_RX_READY) == 0)
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return -1;
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data = *zs.data;
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return data;
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}
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static void
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zs_cnputc(int x, int y, int c)
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{
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int csr;
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do {
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csr = *zs.csr;
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} while ((csr & ZSRR0_TX_READY) == 0);
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*zs.data = c;
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}
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